tree 103455b274fda0d467be62b3401fcb27c9a9445f
parent 0a6f5188e80d888529e2067d02add19f65cb013c
author Shuo Liu <shuo.liu@intel.com> 1718750925 +0800
committer Lean Sheng Tan <sheng.tan@9elements.com> 1719574061 +0000

soc/intel/xeon_sp: Reserve MMIO for Gen1 SoC

For Gen1 SoCs, the range starting from the end of VTd BAR to the end
of 32-bit domain MMIO resource window is reserved for unknown devices.
Get them reserved.

TEST=Build and boot on intel/archercity CRB

Change-Id: Ie133fe3173ce9696769c7247bd2524c7b21b1cf8
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83136
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>