nb/intel/haswell: Use new fixed BAR accessors
There are some cases in `northbridge_topology_init` where condensing the
operation using one macro changes the binary, and have been left as-is.
Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical.
Change-Id: I59c7d1f8d816b95e86d39dcbf7bc7ce8c34f0770
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51865
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c
index 96448f3..15f2c53 100644
--- a/src/northbridge/intel/haswell/acpi.c
+++ b/src/northbridge/intel/haswell/acpi.c
@@ -20,16 +20,16 @@
static unsigned long acpi_fill_dmar(unsigned long current)
{
struct device *const igfx_dev = pcidev_on_root(2, 0);
- const u32 gfxvtbar = MCHBAR32(GFXVTBAR) & ~0xfff;
- const u32 vtvc0bar = MCHBAR32(VTVC0BAR) & ~0xfff;
- const bool gfxvten = MCHBAR32(GFXVTBAR) & 0x1;
- const bool vtvc0en = MCHBAR32(VTVC0BAR) & 0x1;
+ const u32 gfxvtbar = mchbar_read32(GFXVTBAR) & ~0xfff;
+ const u32 vtvc0bar = mchbar_read32(VTVC0BAR) & ~0xfff;
+ const bool gfxvten = mchbar_read32(GFXVTBAR) & 0x1;
+ const bool vtvc0en = mchbar_read32(VTVC0BAR) & 0x1;
/* iGFX has to be enabled; GFXVTBAR set, enabled, in 32-bit space */
const bool emit_igd =
igfx_dev && igfx_dev->enabled &&
gfxvtbar && gfxvten &&
- !MCHBAR32(GFXVTBAR + 4);
+ !mchbar_read32(GFXVTBAR + 4);
/* First, add DRHD entries */
if (emit_igd) {
@@ -42,7 +42,7 @@
}
/* VTVC0BAR has to be set, enabled, and in 32-bit space */
- if (vtvc0bar && vtvc0en && !MCHBAR32(VTVC0BAR + 4)) {
+ if (vtvc0bar && vtvc0en && !mchbar_read32(VTVC0BAR + 4)) {
const unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);