soc/intel/mtl: Change default for debug consent from 3 to 6
USB DBC is very helpful for SoC debug. TraceHub needs to be enabled in
coreboot if debug consent == 2 or 4. Debug consent == 6 enables USB DBC without TraceHub enabled.
This patch updates the Kconfig help text to meet PlatformDebugOption in
MTL and changes debug consent to 6 in default to provide basic SoC
debug capability.
TEST=Boot to OS on screebo and DBC connection is OK.
Change-Id: Ic12528bdd8b1feda7f1b65045c863341f932d3a2
Signed-off-by: Kane Chen <kane.chen@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76880
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index 3fa1347..8f4e3a2 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -345,9 +345,9 @@
config SOC_INTEL_METEORLAKE_DEBUG_CONSENT
int "Debug Consent for MTL"
- # USB DBC is more common for developers so make this default to 3 if
+ # USB DBC is more common for developers so make this default to 6 if
# SOC_INTEL_DEBUG_CONSENT=y
- default 3 if SOC_INTEL_DEBUG_CONSENT
+ default 6 if SOC_INTEL_DEBUG_CONSENT
default 0
help
This is to control debug interface on SOC.
@@ -355,9 +355,8 @@
PlatformDebugConsent in FspmUpd.h has the details.
Desired platform debug type are
- 0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB),
- 3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC),
- 6:Enable (2-wire DCI OOB), 7:Manual
+ 0:Disabled, 2:Enabled Trace Active, 4:Enabled Trace Ready,
+ 6:Enable Trace Power-Off, 7:Manual
config DATA_BUS_WIDTH
int