tree 041298056dae7ac2953b70ac720486234ab15cd6
parent c2891f15fdc1a18220477485e2fe2f8a84a51bc2
author Duncan Laurie <dlaurie@google.com> 1588189208 -0700
committer Duncan Laurie <dlaurie@chromium.org> 1590112119 +0000

soc/intel/tigerlake: Provide SoundWire controller properties

The Intel Tigerlake SoundWire controller has 4 master links which
are configured differently depending on the external crystal oscillator
which is connected to the PCH.

This function will read the PCH PMC EPOC register to determine the
frequency and then fill out the master link entries with the correct
table values.

The frequency is also provided directly in a custom "ip-clock" property
which will be added to the link descriptor and passed to the OS driver
so it can know the clock rate of the master.

BUG=b:146482091

Signed-off-by: Duncan Laurie <dlaurie@google.com>
Change-Id: I98b7df21210c29cd8defeff648f2c2207d629295
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40889
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>