diff --git a/src/northbridge/intel/pineview/bootblock.c b/src/northbridge/intel/pineview/bootblock.c
index 1c04c28..a67cc1a 100644
--- a/src/northbridge/intel/pineview/bootblock.c
+++ b/src/northbridge/intel/pineview/bootblock.c
@@ -1,8 +1,10 @@
 #include <arch/io.h>
 #define PCIEXBAR 0x60
+#define MMCONF_256_BUSSES 16
+#define ENABLE 1
 
 static void bootblock_northbridge_init(void)
 {
 	pci_io_write_config32(PCI_DEV(0,0,0), PCIEXBAR,
-		CONFIG_MMCONF_BASE_ADDRESS | 4 | 1);
+		CONFIG_MMCONF_BASE_ADDRESS | MMCONF_256_BUSSES | ENABLE);
 }