tree 0e160a153bb1cc1e6f88ddbaee891d47b9e68857
parent 1364ac3478c69affce32840d92577f5a8da2eb8c
author Tim Chu <Tim.Chu@quantatw.com> 1670497536 +0000
committer Felix Held <felix-coreboot@felixheld.de> 1674564498 +0000

soc/intel/cmn/block: Add smbus/p2sb device ids for SPR-SP

Intel SPR-SP (Sapphire Rapids Scalable Processor) was product launched
on Jan. 10, 2023. The chipset includes Emmitsburg PCH.

Signed-off-by: Tim Chu <Tim.Chu@quantatw.com>
Change-Id: I05ed8f753bf63b6cb3035e973eb6a7974edfd673
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71944
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>