intel car: Remove references to DCACHE_RAM_ROMSTACK_SIZE
Not referenced in code.
Change-Id: Iea91f4418eb122fb647ec0f4f42cb786e8eadf23
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17268
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index b587988..ddd7051 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -75,9 +75,9 @@
# Cache As RAM region layout:
#
# +-------------+ DCACHE_RAM_BASE + DCACHE_RAM_SIZE
-# | Stack |\
-# | | | * DCACHE_RAM_ROMSTAGE_STACK_SIZE
-# | v |/
+# | Stack |
+# | | |
+# | v |
# +-------------+
# | ^ |
# | | |
@@ -97,13 +97,6 @@
and/or romstage. Note DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE
must add up to a power of 2.
-config DCACHE_RAM_ROMSTAGE_STACK_SIZE
- hex
- default 0x800
- help
- The amount of anticipated stack usage from the data cache
- during pre-ram ROM stage execution.
-
config RESET_ON_INVALID_RAMSTAGE_CACHE
bool "Reset the system on S3 wake when ramstage cache invalid."
default n