##
## This file is part of the coreboot project.
##
## Copyright (C) 2010 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
## GNU General Public License for more details.
##

config NORTHBRIDGE_INTEL_NEHALEM
	bool
	select CPU_INTEL_MODEL_2065X
	select VGA
	select INTEL_EDID
	select INTEL_GMA_ACPI
	select CACHE_MRC_SETTINGS
	select HAVE_DEBUG_RAM_SETUP

if NORTHBRIDGE_INTEL_NEHALEM

config VBOOT
	select VBOOT_MUST_REQUEST_DISPLAY
	select VBOOT_STARTS_IN_ROMSTAGE

config MMCONF_BUS_NUMBER
	int
	default 256

config CBFS_SIZE
	hex
	default 0x100000

config VGA_BIOS_ID
	string
	default "8086,0046"

config DCACHE_RAM_BASE
	hex
	default 0xfefc0000

config DCACHE_RAM_SIZE
	hex
	default 0x10000

config BOOTBLOCK_NORTHBRIDGE_INIT
	string
	default "northbridge/intel/nehalem/bootblock.c"

config MRC_CACHE_SIZE
	hex
	default 0x10000

config MMCONF_BASE_ADDRESS
	hex
	default 0xe0000000

endif