commit 2a6cc959eeeacbecd6bc3370115ab99bb6e886d6
author Elyes Haouas <ehaouas@noos.fr> Fri Feb 11 22:32:44 2022 +0100
committer Felix Held <felix-coreboot@felixheld.de> Tue Feb 22 21:13:43 2022 +0000
tree 71c0121e0de4447c728a626a36283581435e5468
parent f0d4f930a0ab1f54ee03d282fe37c7be4e9a61f9

southbridge/amd/*/*/smbus.c: Reformat code and reduce difference

Change-Id: I43644b757a5a85864162da6a35f7f2a5335f8007
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61880
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

src/southbridge/amd/agesa/hudson/smbus.c

diff --git a/src/southbridge/amd/agesa/hudson/smbus.c b/src/southbridge/amd/agesa/hudson/smbus.c
index c418492..43f8ca7 100644
--- a/src/southbridge/amd/agesa/hudson/smbus.c
+++ b/src/southbridge/amd/agesa/hudson/smbus.c
@@ -10,6 +10,7 @@
 static int smbus_wait_until_ready(u32 smbus_io_base)
 {
 	u32 loops;
+
 	loops = SMBUS_TIMEOUT;
 	do {
 		u8 val;
@@ -20,12 +21,14 @@
 		}
 		outb(val, smbus_io_base + SMBHSTSTAT);
 	} while (--loops);
+
 	return -2;		/* time out */
 }
 
 static int smbus_wait_until_done(u32 smbus_io_base)
 {
 	u32 loops;
+
 	loops = SMBUS_TIMEOUT;
 	do {
 		u8 val;
@@ -40,6 +43,7 @@
 			return 0;
 		}
 	} while (--loops);
+
 	return -3;		/* timeout */
 }
 
@@ -97,8 +101,7 @@
 	return 0;
 }
 
-int do_smbus_read_byte(u32 smbus_io_base, u32 device,
-			      u32 address)
+int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address)
 {
 	u8 byte;
 
@@ -128,8 +131,7 @@
 	return byte;
 }
 
-int do_smbus_write_byte(u32 smbus_io_base, u32 device,
-			       u32 address, u8 val)
+int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val)
 {
 	u8 byte;
 
@@ -159,8 +161,7 @@
 	return 0;
 }
 
-void alink_ab_indx(u32 reg_space, u32 reg_addr,
-			  u32 mask, u32 val)
+void alink_ab_indx(u32 reg_space, u32 reg_addr, u32 mask, u32 val)
 {
 	u32 tmp;
 
@@ -181,8 +182,7 @@
 	outl(0, AB_INDX);
 }
 
-void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port,
-			  u32 mask, u32 val)
+void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port, u32 mask, u32 val)
 {
 	u32 tmp;
 
@@ -206,8 +206,7 @@
 /* space = 0: AX_INDXC, AX_DATAC
  * space = 1: AX_INDXP, AX_DATAP
  */
-void alink_ax_indx(u32 space /*c or p? */, u32 axindc,
-			  u32 mask, u32 val)
+void alink_ax_indx(u32 space /*c or p? */, u32 axindc, u32 mask, u32 val)
 {
 	u32 tmp;