vboot: Separate vboot from chromeos

VBOOT_VERIFY_FIRMWARE should be independent of CHROMEOS. This allows use
of verified boot library without having to stick to CHROMEOS.

BUG=chrome-os-partner:55639

Change-Id: Ia2c328712caedd230ab295b8a613e3c1ed1532d9
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15867
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
diff --git a/Makefile.inc b/Makefile.inc
index 5e564d6..e3f6d0e 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -82,6 +82,7 @@
 subdirs-y += util/futility util/marvell
 subdirs-y += $(wildcard src/arch/*)
 subdirs-y += src/mainboard/$(MAINBOARDDIR)
+subdirs-$(CONFIG_VBOOT) += src/vboot
 subdirs-y += payloads payloads/external
 
 subdirs-y += site-local
diff --git a/src/Kconfig b/src/Kconfig
index 1cc0bfa..1694805 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -453,6 +453,7 @@
 source "src/drivers/intel/fsp1_0/Kconfig"
 
 source "src/southbridge/intel/common/firmware/Kconfig"
+source "src/vboot/Kconfig"
 source "src/vendorcode/*/Kconfig"
 
 source "src/arch/*/Kconfig"
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index 5cd0053..73558db 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -48,7 +48,7 @@
 #include <device/hypertransport.h>
 #include <pc80/i8259.h>
 #include <kconfig.h>
-#include <vendorcode/google/chromeos/chromeos.h>
+#include <vboot/vbnv.h>
 
 u8 pci_moving_config8(struct device *dev, unsigned int reg)
 {
diff --git a/src/ec/google/chromeec/Makefile.inc b/src/ec/google/chromeec/Makefile.inc
index 4f310c8..c4b9c1a 100644
--- a/src/ec/google/chromeec/Makefile.inc
+++ b/src/ec/google/chromeec/Makefile.inc
@@ -22,10 +22,10 @@
 verstage-$(CONFIG_EC_GOOGLE_CHROMEEC_MEC) += ec_mec.c
 verstage-$(CONFIG_EC_GOOGLE_CHROMEEC_SPI) += ec_spi.c
 
-ramstage-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += vboot_storage.c
-smm-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += vboot_storage.c
-romstage-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += vboot_storage.c
-verstage-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += vboot_storage.c
+ramstage-$(CONFIG_VBOOT) += vboot_storage.c
+smm-$(CONFIG_VBOOT) += vboot_storage.c
+romstage-$(CONFIG_VBOOT) += vboot_storage.c
+verstage-$(CONFIG_VBOOT) += vboot_storage.c
 
 # These are Chrome EC firmware images that a payload (such as depthcharge) can
 # use to update the EC. ecrw is the main embedded controller's firmware,
diff --git a/src/lib/bootmode.c b/src/lib/bootmode.c
index c6c29ac..824edfb 100644
--- a/src/lib/bootmode.c
+++ b/src/lib/bootmode.c
@@ -22,7 +22,7 @@
 {
 	if (get_developer_mode_switch())
 		return 1;
-#if CONFIG_VBOOT_VERIFY_FIRMWARE
+#if CONFIG_VBOOT
 	if (vboot_handoff_check_developer_flag())
 		return 1;
 #endif
diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c
index b8575f3..7a0f187 100644
--- a/src/lib/cbfs.c
+++ b/src/lib/cbfs.c
@@ -269,7 +269,7 @@
 extern const struct cbfs_locator vboot_locator;
 
 static const struct cbfs_locator *locators[] = {
-#if CONFIG_VBOOT_VERIFY_FIRMWARE
+#if CONFIG_VBOOT
 	&vboot_locator,
 #endif
 	&cbfs_master_header_locator,
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index 3af2be6..44ae733 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -32,6 +32,7 @@
 #include <cbmem.h>
 #include <bootmem.h>
 #include <spi_flash.h>
+#include <vboot/vbnv_layout.h>
 #if CONFIG_USE_OPTION_TABLE
 #include <option_table.h>
 #endif
@@ -41,7 +42,6 @@
 #endif
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <vendorcode/google/chromeos/gnvs.h>
-#include <vendorcode/google/chromeos/vbnv_layout.h>
 #endif
 #if CONFIG_ARCH_X86
 #include <cpu/x86/mtrr.h>
@@ -221,12 +221,12 @@
 	vbnv = (struct lb_range *)lb_new_record(header);
 	vbnv->tag = LB_TAG_VBNV;
 	vbnv->size = sizeof(*vbnv);
-	vbnv->range_start = CONFIG_VBNV_OFFSET + 14;
-	vbnv->range_size = VBNV_BLOCK_SIZE;
+	vbnv->range_start = CONFIG_VBOOT_VBNV_OFFSET + 14;
+	vbnv->range_size = VBOOT_VBNV_BLOCK_SIZE;
 #endif
 }
 
-#if CONFIG_VBOOT_VERIFY_FIRMWARE
+#if CONFIG_VBOOT
 static void lb_vboot_handoff(struct lb_header *header)
 {
 	void *addr;
@@ -244,7 +244,7 @@
 }
 #else
 static inline void lb_vboot_handoff(struct lb_header *header) {}
-#endif /* CONFIG_VBOOT_VERIFY_FIRMWARE */
+#endif /* CONFIG_VBOOT */
 #endif /* CONFIG_CHROMEOS */
 
 static void lb_board_id(struct lb_header *header)
diff --git a/src/mainboard/google/auron/Kconfig b/src/mainboard/google/auron/Kconfig
index e897d11..f1b1719 100644
--- a/src/mainboard/google/auron/Kconfig
+++ b/src/mainboard/google/auron/Kconfig
@@ -15,10 +15,10 @@
 	select INTEL_INT15
 
 config CHROMEOS
-	select CHROMEOS_VBNV_CMOS
-	select LID_SWITCH
 	select CHROMEOS_RAMOOPS_DYNAMIC
 	select EC_SOFTWARE_SYNC
+	select LID_SWITCH
+	select VBOOT_VBNV_CMOS
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/auron_paine/Kconfig b/src/mainboard/google/auron_paine/Kconfig
index 0b945ee..533c3da 100644
--- a/src/mainboard/google/auron_paine/Kconfig
+++ b/src/mainboard/google/auron_paine/Kconfig
@@ -15,10 +15,10 @@
 	select INTEL_INT15
 
 config CHROMEOS
-	select CHROMEOS_VBNV_CMOS
-	select LID_SWITCH
-	select CHROMEOS_RAMOOPS_DYNAMIC
 	select EC_SOFTWARE_SYNC
+	select CHROMEOS_RAMOOPS_DYNAMIC
+	select LID_SWITCH
+	select VBOOT_VBNV_CMOS
 	select VIRTUAL_DEV_SWITCH
 
 config VBOOT_RAMSTAGE_INDEX
diff --git a/src/mainboard/google/butterfly/Kconfig b/src/mainboard/google/butterfly/Kconfig
index 4240076..09d2157 100644
--- a/src/mainboard/google/butterfly/Kconfig
+++ b/src/mainboard/google/butterfly/Kconfig
@@ -18,7 +18,7 @@
 	select SERIRQ_CONTINUOUS_MODE 	# Workaround for EC/KBC IRQ1.
 
 config CHROMEOS
-	select CHROMEOS_VBNV_CMOS
+	select VBOOT_VBNV_CMOS
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/google/cosmos/Kconfig b/src/mainboard/google/cosmos/Kconfig
index 7588125..19d5955 100644
--- a/src/mainboard/google/cosmos/Kconfig
+++ b/src/mainboard/google/cosmos/Kconfig
@@ -27,7 +27,7 @@
 	select SPI_FLASH_SPANSION
 
 config CHROMEOS
-	select CHROMEOS_VBNV_FLASH
+	select VBOOT_VBNV_FLASH
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/google/cyan/Kconfig b/src/mainboard/google/cyan/Kconfig
index a863c55..782a460 100644
--- a/src/mainboard/google/cyan/Kconfig
+++ b/src/mainboard/google/cyan/Kconfig
@@ -16,10 +16,10 @@
 	select PCIEXP_L1_SUB_STATE
 
 config CHROMEOS
-	select LID_SWITCH
-	select CHROMEOS_VBNV_CMOS
 	select EC_SOFTWARE_SYNC
+	select LID_SWITCH
 	select VBOOT_DYNAMIC_WORK_BUFFER
+	select VBOOT_VBNV_CMOS
 	select VIRTUAL_DEV_SWITCH
 
 config DISPLAY_SPD_DATA
diff --git a/src/mainboard/google/daisy/Kconfig b/src/mainboard/google/daisy/Kconfig
index d02a852..9f6a615 100644
--- a/src/mainboard/google/daisy/Kconfig
+++ b/src/mainboard/google/daisy/Kconfig
@@ -28,7 +28,7 @@
 	select MAINBOARD_DO_NATIVE_VGA_INIT
 
 config CHROMEOS
-	select CHROMEOS_VBNV_EC
+	select VBOOT_VBNV_EC
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/google/falco/Kconfig b/src/mainboard/google/falco/Kconfig
index 5afecaa..d0b911a 100644
--- a/src/mainboard/google/falco/Kconfig
+++ b/src/mainboard/google/falco/Kconfig
@@ -21,9 +21,9 @@
 	select INTEL_INT15
 
 config CHROMEOS
-	select CHROMEOS_VBNV_CMOS
-	select LID_SWITCH
 	select EC_SOFTWARE_SYNC
+	select LID_SWITCH
+	select VBOOT_VBNV_CMOS
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/foster/Kconfig b/src/mainboard/google/foster/Kconfig
index fa7353d..dfe79a5 100644
--- a/src/mainboard/google/foster/Kconfig
+++ b/src/mainboard/google/foster/Kconfig
@@ -27,7 +27,7 @@
 	select SPI_FLASH_WINBOND
 
 config CHROMEOS
-	select CHROMEOS_VBNV_FLASH
+	select VBOOT_VBNV_FLASH
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/gru/Kconfig b/src/mainboard/google/gru/Kconfig
index 0b061af..1b657d9 100644
--- a/src/mainboard/google/gru/Kconfig
+++ b/src/mainboard/google/gru/Kconfig
@@ -39,9 +39,9 @@
 	select SPI_FLASH_WINBOND
 
 config CHROMEOS
-	select CHROMEOS_VBNV_FLASH
 	select EC_SOFTWARE_SYNC
 	select SPI_TPM
+	select VBOOT_VBNV_FLASH
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/guado/Kconfig b/src/mainboard/google/guado/Kconfig
index 4ca573e..09a75b7 100644
--- a/src/mainboard/google/guado/Kconfig
+++ b/src/mainboard/google/guado/Kconfig
@@ -14,10 +14,10 @@
 	select MAINBOARD_HAS_LPC_TPM
 
 config CHROMEOS
-	select CHROMEOS_VBNV_CMOS
 	select CHROMEOS_RAMOOPS_DYNAMIC
-	select VIRTUAL_DEV_SWITCH
 	select PHYSICAL_REC_SWITCH
+	select VBOOT_VBNV_CMOS
+	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/google/jecht/Kconfig b/src/mainboard/google/jecht/Kconfig
index 471e8fd..0c3d3db7 100644
--- a/src/mainboard/google/jecht/Kconfig
+++ b/src/mainboard/google/jecht/Kconfig
@@ -15,9 +15,9 @@
 	select INTEL_INT15
 
 config CHROMEOS
-	select CHROMEOS_VBNV_CMOS
-	select PHYSICAL_REC_SWITCH
 	select CHROMEOS_RAMOOPS_DYNAMIC
+	select PHYSICAL_REC_SWITCH
+	select VBOOT_VBNV_CMOS
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/link/Kconfig b/src/mainboard/google/link/Kconfig
index 8fe3a87..d1e1140 100644
--- a/src/mainboard/google/link/Kconfig
+++ b/src/mainboard/google/link/Kconfig
@@ -17,8 +17,8 @@
 	select MAINBOARD_HAS_NATIVE_VGA_INIT
 
 config CHROMEOS
-	select CHROMEOS_VBNV_CMOS
 	select LID_SWITCH
+	select VBOOT_VBNV_CMOS
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/google/ninja/Kconfig b/src/mainboard/google/ninja/Kconfig
index 232b75d..ce32d3d 100644
--- a/src/mainboard/google/ninja/Kconfig
+++ b/src/mainboard/google/ninja/Kconfig
@@ -15,6 +15,8 @@
 
 config CHROMEOS
 	select EC_SOFTWARE_SYNC
+	select LID_SWITCH
+	select VBOOT_VBNV_CMOS
 	select VIRTUAL_DEV_SWITCH
 	select PHYSICAL_REC_SWITCH
 
diff --git a/src/mainboard/google/nyan/Kconfig b/src/mainboard/google/nyan/Kconfig
index 21f42da..2c39a1a 100644
--- a/src/mainboard/google/nyan/Kconfig
+++ b/src/mainboard/google/nyan/Kconfig
@@ -32,8 +32,8 @@
 	select SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B
 
 config CHROMEOS
-	select CHROMEOS_VBNV_EC
 	select EC_SOFTWARE_SYNC
+	select VBOOT_VBNV_EC
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c
index 2388f95..4ec0164 100644
--- a/src/mainboard/google/nyan/romstage.c
+++ b/src/mainboard/google/nyan/romstage.c
@@ -83,7 +83,7 @@
 	cbmem_initialize_empty();
 
 	/* This was already called from verstage in vboot context. */
-	if (!IS_ENABLED(CONFIG_VBOOT_VERIFY_FIRMWARE))
+	if (!IS_ENABLED(CONFIG_VBOOT))
 		early_mainboard_init();
 
 	run_ramstage();
diff --git a/src/mainboard/google/nyan_big/Kconfig b/src/mainboard/google/nyan_big/Kconfig
index 7af9657..c9b8aed 100644
--- a/src/mainboard/google/nyan_big/Kconfig
+++ b/src/mainboard/google/nyan_big/Kconfig
@@ -34,7 +34,7 @@
 
 config CHROMEOS
 	select EC_SOFTWARE_SYNC
-	select CHROMEOS_VBNV_EC
+	select VBOOT_VBNV_EC
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/nyan_big/romstage.c b/src/mainboard/google/nyan_big/romstage.c
index 2388f95..4ec0164 100644
--- a/src/mainboard/google/nyan_big/romstage.c
+++ b/src/mainboard/google/nyan_big/romstage.c
@@ -83,7 +83,7 @@
 	cbmem_initialize_empty();
 
 	/* This was already called from verstage in vboot context. */
-	if (!IS_ENABLED(CONFIG_VBOOT_VERIFY_FIRMWARE))
+	if (!IS_ENABLED(CONFIG_VBOOT))
 		early_mainboard_init();
 
 	run_ramstage();
diff --git a/src/mainboard/google/nyan_blaze/Kconfig b/src/mainboard/google/nyan_blaze/Kconfig
index 9fa99d8..3541da1 100644
--- a/src/mainboard/google/nyan_blaze/Kconfig
+++ b/src/mainboard/google/nyan_blaze/Kconfig
@@ -35,7 +35,7 @@
 
 config CHROMEOS
 	select EC_SOFTWARE_SYNC
-	select CHROMEOS_VBNV_EC
+	select VBOOT_VBNV_EC
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c
index e91fa33..e3d7116 100644
--- a/src/mainboard/google/nyan_blaze/romstage.c
+++ b/src/mainboard/google/nyan_blaze/romstage.c
@@ -53,7 +53,7 @@
 	u32 dram_end_mb = sdram_max_addressable_mb();
 	u32 dram_size_mb = dram_end_mb - dram_start_mb;
 
-#if !CONFIG_VBOOT_VERIFY_FIRMWARE
+#if !CONFIG_VBOOT
 	configure_l2_cache();
 	mmu_init();
 	/* Device memory below DRAM is uncached. */
@@ -87,7 +87,7 @@
 	cbmem_initialize_empty();
 
 	/* This was already called from verstage in vboot context. */
-	if (!IS_ENABLED(CONFIG_VBOOT_VERIFY_FIRMWARE))
+	if (!IS_ENABLED(CONFIG_VBOOT))
 		early_mainboard_init();
 
 	run_ramstage();
@@ -96,7 +96,7 @@
 /* Stub to force arm_init_caches to the top, before any stack/memory accesses */
 void main(void)
 {
-#if !CONFIG_VBOOT_VERIFY_FIRMWARE
+#if !CONFIG_VBOOT
 	asm volatile ("bl arm_init_caches"
 		      ::: "r0","r1","r2","r3","r4","r5","ip");
 #endif
diff --git a/src/mainboard/google/oak/Kconfig b/src/mainboard/google/oak/Kconfig
index 5ab6f2d..975cdab 100644
--- a/src/mainboard/google/oak/Kconfig
+++ b/src/mainboard/google/oak/Kconfig
@@ -34,10 +34,10 @@
 	select SPI_FLASH
 
 config CHROMEOS
-	select CHROMEOS_VBNV_FLASH
 	select EC_SOFTWARE_SYNC
 	select VBOOT_EC_SLOW_UPDATE
 	select VBOOT_OPROM_MATTERS
+	select VBOOT_VBNV_FLASH
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/panther/Kconfig b/src/mainboard/google/panther/Kconfig
index b70b6cb..0aa8927 100644
--- a/src/mainboard/google/panther/Kconfig
+++ b/src/mainboard/google/panther/Kconfig
@@ -19,7 +19,7 @@
 
 config CHROMEOS
 	select PHYSICAL_REC_SWITCH
-	select CHROMEOS_VBNV_CMOS
+	select VBOOT_VBNV_CMOS
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/parrot/Kconfig b/src/mainboard/google/parrot/Kconfig
index fa94ab6..974c58f 100644
--- a/src/mainboard/google/parrot/Kconfig
+++ b/src/mainboard/google/parrot/Kconfig
@@ -16,7 +16,7 @@
 	select INTEL_INT15
 
 config CHROMEOS
-	select CHROMEOS_VBNV_CMOS
+	select VBOOT_VBNV_CMOS
 
 	# Workaround for EC/KBC IRQ1.
 	select SERIRQ_CONTINUOUS_MODE
diff --git a/src/mainboard/google/peach_pit/Kconfig b/src/mainboard/google/peach_pit/Kconfig
index 69ac1ae..125333c 100644
--- a/src/mainboard/google/peach_pit/Kconfig
+++ b/src/mainboard/google/peach_pit/Kconfig
@@ -26,7 +26,7 @@
 	select DRIVER_PARADE_PS8625
 
 config CHROMEOS
-	select CHROMEOS_VBNV_EC
+	select VBOOT_VBNV_EC
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/google/peppy/Kconfig b/src/mainboard/google/peppy/Kconfig
index 47e715e..8829371 100644
--- a/src/mainboard/google/peppy/Kconfig
+++ b/src/mainboard/google/peppy/Kconfig
@@ -22,10 +22,10 @@
 	select INTEL_INT15
 
 config CHROMEOS
-	select MAINBOARD_DO_NATIVE_VGA_INIT
-	select CHROMEOS_VBNV_CMOS
-	select LID_SWITCH
 	select EC_SOFTWARE_SYNC
+	select LID_SWITCH
+	select MAINBOARD_DO_NATIVE_VGA_INIT
+	select VBOOT_VBNV_CMOS
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/purin/Kconfig b/src/mainboard/google/purin/Kconfig
index aca20e3..d415211 100644
--- a/src/mainboard/google/purin/Kconfig
+++ b/src/mainboard/google/purin/Kconfig
@@ -29,7 +29,7 @@
 	select SPI_ATOMIC_SEQUENCING
 
 config CHROMEOS
-	select CHROMEOS_VBNV_FLASH
+	select VBOOT_VBNV_FLASH
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/google/rambi/Kconfig b/src/mainboard/google/rambi/Kconfig
index 3539f0e..48af3b3 100644
--- a/src/mainboard/google/rambi/Kconfig
+++ b/src/mainboard/google/rambi/Kconfig
@@ -13,9 +13,9 @@
 	select MAINBOARD_HAS_LPC_TPM
 
 config CHROMEOS
-	select CHROMEOS_VBNV_CMOS
-	select LID_SWITCH
 	select EC_SOFTWARE_SYNC
+	select LID_SWITCH
+	select VBOOT_VBNV_CMOS
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/rikku/Kconfig b/src/mainboard/google/rikku/Kconfig
index 83a99bd..a421e77 100644
--- a/src/mainboard/google/rikku/Kconfig
+++ b/src/mainboard/google/rikku/Kconfig
@@ -14,10 +14,10 @@
 	select MAINBOARD_HAS_LPC_TPM
 
 config CHROMEOS
-	select CHROMEOS_VBNV_CMOS
 	select CHROMEOS_RAMOOPS_DYNAMIC
-	select VIRTUAL_DEV_SWITCH
 	select PHYSICAL_REC_SWITCH
+	select VBOOT_VBNV_CMOS
+	select VIRTUAL_DEV_SWITCH
 
 config VBOOT_RAMSTAGE_INDEX
 	hex
diff --git a/src/mainboard/google/rush/Kconfig b/src/mainboard/google/rush/Kconfig
index cb00ba7..09d9ebf 100644
--- a/src/mainboard/google/rush/Kconfig
+++ b/src/mainboard/google/rush/Kconfig
@@ -29,8 +29,8 @@
 	select BOARD_ROMSIZE_KB_4096
 
 config CHROMEOS
-	select CHROMEOS_VBNV_EC
 	select EC_SOFTWARE_SYNC
+	select VBOOT_VBNV_EC
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/rush_ryu/Kconfig b/src/mainboard/google/rush_ryu/Kconfig
index efcb2d9..7b559a9 100644
--- a/src/mainboard/google/rush_ryu/Kconfig
+++ b/src/mainboard/google/rush_ryu/Kconfig
@@ -30,8 +30,8 @@
 	select BOARD_ROMSIZE_KB_8192
 
 config CHROMEOS
-	select CHROMEOS_VBNV_EC
 	select EC_SOFTWARE_SYNC
+	select VBOOT_VBNV_EC
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/rush_ryu/mainboard.c b/src/mainboard/google/rush_ryu/mainboard.c
index 85034b3..b53b0ff 100644
--- a/src/mainboard/google/rush_ryu/mainboard.c
+++ b/src/mainboard/google/rush_ryu/mainboard.c
@@ -35,8 +35,8 @@
 #include <vendorcode/google/chromeos/cros_vpd.h>
 #if IS_ENABLED(CONFIG_CHROMEOS)
 #include <vboot_struct.h>
-#include <vendorcode/google/chromeos/vboot2/misc.h>
-#include <vendorcode/google/chromeos/vboot_common.h>
+#include <vboot/misc.h>
+#include <vboot/vboot_common.h>
 #endif
 
 #include "gpio.h"
diff --git a/src/mainboard/google/samus/Kconfig b/src/mainboard/google/samus/Kconfig
index 329fa1f..0275189 100644
--- a/src/mainboard/google/samus/Kconfig
+++ b/src/mainboard/google/samus/Kconfig
@@ -16,12 +16,12 @@
 	select INTEL_INT15
 
 config CHROMEOS
-	select CHROMEOS_VBNV_CMOS
-	select LID_SWITCH
+	select CHROMEOS_RAMOOPS_DYNAMIC
 	select EC_SOFTWARE_SYNC
+	select LID_SWITCH
 	select VBOOT_EC_SLOW_UPDATE
 	select VBOOT_OPROM_MATTERS
-	select CHROMEOS_RAMOOPS_DYNAMIC
+	select VBOOT_VBNV_CMOS
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/smaug/Kconfig b/src/mainboard/google/smaug/Kconfig
index a2d47a4..03e8bd4 100644
--- a/src/mainboard/google/smaug/Kconfig
+++ b/src/mainboard/google/smaug/Kconfig
@@ -33,8 +33,8 @@
 	select RAM_CODE_SUPPORT
 
 config CHROMEOS
-	select CHROMEOS_VBNV_FLASH
 	select EC_SOFTWARE_SYNC
+	select VBOOT_VBNV_FLASH
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/stout/Kconfig b/src/mainboard/google/stout/Kconfig
index 3a2250d..571cbce 100644
--- a/src/mainboard/google/stout/Kconfig
+++ b/src/mainboard/google/stout/Kconfig
@@ -18,7 +18,7 @@
 	select SANDYBRIDGE_IVYBRIDGE_LVDS
 
 config CHROMEOS
-	select CHROMEOS_VBNV_CMOS
+	select VBOOT_VBNV_CMOS
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/google/tidus/Kconfig b/src/mainboard/google/tidus/Kconfig
index 196bd76..fd841a9 100644
--- a/src/mainboard/google/tidus/Kconfig
+++ b/src/mainboard/google/tidus/Kconfig
@@ -14,10 +14,10 @@
 	select MAINBOARD_HAS_LPC_TPM
 
 config CHROMEOS
-	select CHROMEOS_VBNV_CMOS
 	select CHROMEOS_RAMOOPS_DYNAMIC
-	select VIRTUAL_DEV_SWITCH
 	select PHYSICAL_REC_SWITCH
+	select VBOOT_VBNV_CMOS
+	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/google/veyron/Kconfig b/src/mainboard/google/veyron/Kconfig
index 27b3fee..c21cd3f 100644
--- a/src/mainboard/google/veyron/Kconfig
+++ b/src/mainboard/google/veyron/Kconfig
@@ -36,8 +36,8 @@
 	select SPI_FLASH_WINBOND
 
 config CHROMEOS
-	select CHROMEOS_VBNV_EC
 	select EC_SOFTWARE_SYNC
+	select VBOOT_VBNV_EC
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/veyron_brain/Kconfig b/src/mainboard/google/veyron_brain/Kconfig
index e16d9d5..41a7456 100644
--- a/src/mainboard/google/veyron_brain/Kconfig
+++ b/src/mainboard/google/veyron_brain/Kconfig
@@ -31,8 +31,8 @@
 	select SPI_FLASH_WINBOND
 
 config CHROMEOS
-	select CHROMEOS_VBNV_FLASH
 	select PHYSICAL_REC_SWITCH
+	select VBOOT_VBNV_FLASH
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/veyron_danger/Kconfig b/src/mainboard/google/veyron_danger/Kconfig
index 2544205..cb1dc71 100644
--- a/src/mainboard/google/veyron_danger/Kconfig
+++ b/src/mainboard/google/veyron_danger/Kconfig
@@ -33,8 +33,8 @@
 	select MAINBOARD_HAS_CHROMEOS
 
 config CHROMEOS
-	select CHROMEOS_VBNV_FLASH
 	select PHYSICAL_REC_SWITCH
+	select VBOOT_VBNV_FLASH
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/google/veyron_emile/Kconfig b/src/mainboard/google/veyron_emile/Kconfig
index 895953c..059dd1f 100644
--- a/src/mainboard/google/veyron_emile/Kconfig
+++ b/src/mainboard/google/veyron_emile/Kconfig
@@ -31,8 +31,8 @@
 	select MAINBOARD_HAS_NATIVE_VGA_INIT
 
 config CHROMEOS
-	select CHROMEOS_VBNV_FLASH
 	select PHYSICAL_REC_SWITCH
+	select VBOOT_VBNV_FLASH
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/veyron_mickey/Kconfig b/src/mainboard/google/veyron_mickey/Kconfig
index 3bf59f2..6f489ff 100644
--- a/src/mainboard/google/veyron_mickey/Kconfig
+++ b/src/mainboard/google/veyron_mickey/Kconfig
@@ -31,8 +31,8 @@
 	select SPI_FLASH_WINBOND
 
 config CHROMEOS
-	select CHROMEOS_VBNV_FLASH
 	select PHYSICAL_REC_SWITCH
+	select VBOOT_VBNV_FLASH
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/veyron_rialto/Kconfig b/src/mainboard/google/veyron_rialto/Kconfig
index 7b15310..9321812 100644
--- a/src/mainboard/google/veyron_rialto/Kconfig
+++ b/src/mainboard/google/veyron_rialto/Kconfig
@@ -31,8 +31,8 @@
 	select SPI_FLASH_WINBOND
 
 config CHROMEOS
-	select CHROMEOS_VBNV_FLASH
 	select PHYSICAL_REC_SWITCH
+	select VBOOT_VBNV_FLASH
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/google/veyron_romy/Kconfig b/src/mainboard/google/veyron_romy/Kconfig
index ec15026..c151727 100644
--- a/src/mainboard/google/veyron_romy/Kconfig
+++ b/src/mainboard/google/veyron_romy/Kconfig
@@ -31,8 +31,8 @@
 	select SPI_FLASH_WINBOND
 
 config CHROMEOS
-	select CHROMEOS_VBNV_FLASH
 	select PHYSICAL_REC_SWITCH
+	select VBOOT_VBNV_FLASH
 	select VIRTUAL_DEV_SWITCH
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/intel/baskingridge/Kconfig b/src/mainboard/intel/baskingridge/Kconfig
index 47aca1a..df5d312 100644
--- a/src/mainboard/intel/baskingridge/Kconfig
+++ b/src/mainboard/intel/baskingridge/Kconfig
@@ -15,7 +15,7 @@
 	select INTEL_INT15
 
 config CHROMEOS
-	select CHROMEOS_VBNV_CMOS
+	select VBOOT_VBNV_CMOS
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/intel/emeraldlake2/Kconfig b/src/mainboard/intel/emeraldlake2/Kconfig
index dd9a7c7..9ee41e8 100644
--- a/src/mainboard/intel/emeraldlake2/Kconfig
+++ b/src/mainboard/intel/emeraldlake2/Kconfig
@@ -14,7 +14,7 @@
 	#select MAINBOARD_HAS_CHROMEOS
 
 config CHROMEOS
-	#select CHROMEOS_VBNV_CMOS
+	#select VBOOT_VBNV_CMOS
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/intel/strago/Kconfig b/src/mainboard/intel/strago/Kconfig
index 3faa1bf..42118f9 100644
--- a/src/mainboard/intel/strago/Kconfig
+++ b/src/mainboard/intel/strago/Kconfig
@@ -16,10 +16,10 @@
 	select PCIEXP_L1_SUB_STATE
 
 config CHROMEOS
-	select LID_SWITCH
-	select CHROMEOS_VBNV_CMOS
 	select EC_SOFTWARE_SYNC
+	select LID_SWITCH
 	select VBOOT_DYNAMIC_WORK_BUFFER
+	select VBOOT_VBNV_CMOS
 	select VIRTUAL_DEV_SWITCH
 
 config DYNAMIC_VNN_SUPPORT
diff --git a/src/mainboard/intel/wtm2/Kconfig b/src/mainboard/intel/wtm2/Kconfig
index e739efa..f57cb23 100644
--- a/src/mainboard/intel/wtm2/Kconfig
+++ b/src/mainboard/intel/wtm2/Kconfig
@@ -15,7 +15,7 @@
 
 config CHROMEOS
 	select CHROMEOS_RAMOOPS_DYNAMIC
-	select CHROMEOS_VBNV_CMOS
+	select VBOOT_VBNV_CMOS
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/samsung/lumpy/Kconfig b/src/mainboard/samsung/lumpy/Kconfig
index adeb9fb..7cb00e5 100644
--- a/src/mainboard/samsung/lumpy/Kconfig
+++ b/src/mainboard/samsung/lumpy/Kconfig
@@ -21,7 +21,7 @@
 	select INTEL_INT15
 
 config CHROMEOS
-	select CHROMEOS_VBNV_CMOS
+	select VBOOT_VBNV_CMOS
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/samsung/stumpy/Kconfig b/src/mainboard/samsung/stumpy/Kconfig
index 699e58e..3777f69 100644
--- a/src/mainboard/samsung/stumpy/Kconfig
+++ b/src/mainboard/samsung/stumpy/Kconfig
@@ -19,7 +19,7 @@
 
 config CHROMEOS
 	select PHYSICAL_REC_SWITCH
-	select CHROMEOS_VBNV_CMOS
+	select VBOOT_VBNV_CMOS
 
 config MAINBOARD_DIR
 	string
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 3f14880..0745679 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -59,13 +59,13 @@
 
 config CHROMEOS
 	select CHROMEOS_RAMOOPS_DYNAMIC
-	select CHROMEOS_VBNV_CMOS
-	select CHROMEOS_VBNV_CMOS_BACKUP_TO_FLASH
 	select EC_SOFTWARE_SYNC if EC_GOOGLE_CHROMEEC
 	select SEPARATE_VERSTAGE
 	select VBOOT_OPROM_MATTERS
 	select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT
 	select VBOOT_STARTS_IN_BOOTBLOCK
+	select VBOOT_VBNV_CMOS
+	select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH
 	select VIRTUAL_DEV_SWITCH
 
 config TPM_ON_FAST_SPI
diff --git a/src/soc/intel/apollolake/lpc.c b/src/soc/intel/apollolake/lpc.c
index cc4de88..5455ded 100644
--- a/src/soc/intel/apollolake/lpc.c
+++ b/src/soc/intel/apollolake/lpc.c
@@ -25,7 +25,7 @@
 #include <soc/lpc.h>
 #include <soc/pci_ids.h>
 #include <soc/pm.h>
-#include <vendorcode/google/chromeos/chromeos.h>
+#include <vboot/vbnv.h>
 
 #include "chip.h"
 
@@ -60,7 +60,7 @@
 	rtc_fail = !!(ps->gen_pmcon1 & RPS);
 	/* Ensure the date is set including century byte. */
 	cmos_check_update_date();
-	if (IS_ENABLED(CONFIG_CHROMEOS_VBNV_CMOS))
+	if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS))
 		init_vbnv_cmos(rtc_fail);
 	else
 		cmos_init(rtc_fail);
diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c
index e23feb2..61aa637 100644
--- a/src/soc/intel/apollolake/pmutil.c
+++ b/src/soc/intel/apollolake/pmutil.c
@@ -27,7 +27,7 @@
 #include <soc/pm.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <vendorcode/google/chromeos/vboot_common.h>
+#include <vboot/vboot_common.h>
 
 static uintptr_t read_pmc_mmio_bar(void)
 {
diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c
index 599a95c..d25ddcc 100644
--- a/src/soc/intel/broadwell/igd.c
+++ b/src/soc/intel/broadwell/igd.c
@@ -30,7 +30,7 @@
 #include <soc/ramstage.h>
 #include <soc/systemagent.h>
 #include <soc/intel/broadwell/chip.h>
-#include <vendorcode/google/chromeos/chromeos.h>
+#include <vboot/vbnv.h>
 
 #define GT_RETRY 		1000
 #define GT_CDCLK_337		0
diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c
index 7e57b23..20fa345 100644
--- a/src/soc/intel/broadwell/lpc.c
+++ b/src/soc/intel/broadwell/lpc.c
@@ -44,11 +44,8 @@
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <cpu/cpu.h>
-
-#if IS_ENABLED(CONFIG_CHROMEOS)
-#include <vendorcode/google/chromeos/chromeos.h>
-#include <vendorcode/google/chromeos/vbnv_layout.h>
-#endif
+#include <vboot/vbnv.h>
+#include <vboot/vbnv_layout.h>
 
 static void pch_enable_ioapic(struct device *dev)
 {
@@ -175,14 +172,14 @@
 	enable_alt_smi(config->alt_gp_smi_en);
 }
 
-#if IS_ENABLED(CONFIG_CHROMEOS) && IS_ENABLED(CONFIG_CHROMEOS_VBNV_CMOS)
+#if IS_ENABLED(CONFIG_CHROMEOS) && IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS)
 /*
  * Preserve Vboot NV data when clearing CMOS as it will
  * have been re-initialized already by Vboot firmware init.
  */
 static void pch_cmos_init_preserve(int reset)
 {
-	uint8_t vbnv[VBNV_BLOCK_SIZE];
+	uint8_t vbnv[VBOOT_VBNV_BLOCK_SIZE];
 
 	if (reset)
 		read_vbnv(vbnv);
@@ -207,7 +204,7 @@
 		printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed);
 	}
 
-#if IS_ENABLED(CONFIG_CHROMEOS) && IS_ENABLED(CONFIG_CHROMEOS_VBNV_CMOS)
+#if IS_ENABLED(CONFIG_CHROMEOS) && IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS)
 	pch_cmos_init_preserve(rtc_failed);
 #else
 	cmos_init(rtc_failed);
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 4c055ea..b86d002 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -53,12 +53,12 @@
 
 config CHROMEOS
 	select CHROMEOS_RAMOOPS_DYNAMIC
-	select CHROMEOS_VBNV_CMOS
-	select CHROMEOS_VBNV_CMOS_BACKUP_TO_FLASH
 	select EC_SOFTWARE_SYNC if EC_GOOGLE_CHROMEEC
 	select VBOOT_EC_SLOW_UPDATE
 	select VBOOT_OPROM_MATTERS
 	select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT
+	select VBOOT_VBNV_CMOS
+	select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH
 	select VIRTUAL_DEV_SWITCH
 
 config BOOTBLOCK_CPU_INIT
diff --git a/src/soc/intel/skylake/igd.c b/src/soc/intel/skylake/igd.c
index 4bb597c..209d22c 100644
--- a/src/soc/intel/skylake/igd.c
+++ b/src/soc/intel/skylake/igd.c
@@ -16,6 +16,7 @@
 
 #include <arch/acpi.h>
 #include <arch/io.h>
+#include <bootmode.h>
 #include <chip.h>
 #include <console/console.h>
 #include <delay.h>
@@ -31,7 +32,7 @@
 #include <soc/systemagent.h>
 #include <stdlib.h>
 #include <string.h>
-#include <vendorcode/google/chromeos/chromeos.h>
+#include <vboot/vbnv.h>
 
 u32 map_oprom_vendev(u32 vendev)
 {
diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c
index 6b7a17b..a8ec7b6 100644
--- a/src/soc/intel/skylake/pmc.c
+++ b/src/soc/intel/skylake/pmc.c
@@ -35,10 +35,8 @@
 #include <cpu/x86/smm.h>
 #include <soc/pcr.h>
 #include <soc/ramstage.h>
-#if IS_ENABLED(CONFIG_CHROMEOS)
-#include <vendorcode/google/chromeos/chromeos.h>
-#include <vendorcode/google/chromeos/vbnv_layout.h>
-#endif
+#include <vboot/vbnv.h>
+#include <vboot/vbnv_layout.h>
 
 static const struct reg_script pch_pmc_misc_init_script[] = {
 	/* SLP_S4=4s, SLP_S3=50ms, disable SLP_X stretching after SUS loss. */
@@ -108,14 +106,14 @@
 	}
 }
 
-#if IS_ENABLED(CONFIG_CHROMEOS_VBNV_CMOS)
+#if IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS)
 /*
  * Preserve Vboot NV data when clearing CMOS as it will
  * have been re-initialized already by Vboot firmware init.
  */
 static void pch_cmos_init_preserve(int reset)
 {
-	uint8_t vbnv[VBNV_BLOCK_SIZE];
+	uint8_t vbnv[VBOOT_VBNV_BLOCK_SIZE];
 	if (reset)
 		read_vbnv(vbnv);
 
@@ -143,7 +141,7 @@
 	/* Ensure the date is set including century byte. */
 	cmos_check_update_date();
 
-#if IS_ENABLED(CONFIG_CHROMEOS_VBNV_CMOS)
+#if IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS)
 	pch_cmos_init_preserve(rtc_failed);
 #else
 	cmos_init(rtc_failed);
diff --git a/src/soc/intel/skylake/romstage/power_state.c b/src/soc/intel/skylake/romstage/power_state.c
index 209beeb..cf75ccb 100644
--- a/src/soc/intel/skylake/romstage/power_state.c
+++ b/src/soc/intel/skylake/romstage/power_state.c
@@ -30,7 +30,7 @@
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
 #include <soc/romstage.h>
-#include <vendorcode/google/chromeos/vboot_common.h>
+#include <vboot/vboot_common.h>
 
 static struct chipset_power_state power_state CAR_GLOBAL;
 
diff --git a/src/soc/marvell/bg4cd/Kconfig b/src/soc/marvell/bg4cd/Kconfig
index 2e5b15c..cdd8597 100644
--- a/src/soc/marvell/bg4cd/Kconfig
+++ b/src/soc/marvell/bg4cd/Kconfig
@@ -17,7 +17,7 @@
 	bool
 	default n
 	select ARCH_BOOTBLOCK_ARMV7_M
-	select BOOTBLOCK_CUSTOM if VBOOT_VERIFY_FIRMWARE
+	select BOOTBLOCK_CUSTOM if VBOOT
 	select ARCH_RAMSTAGE_ARMV7
 	select ARCH_ROMSTAGE_ARMV7
 	select ARCH_VERSTAGE_ARMV7_M
diff --git a/src/soc/marvell/bg4cd/Makefile.inc b/src/soc/marvell/bg4cd/Makefile.inc
index 717cb3b..86aa764 100644
--- a/src/soc/marvell/bg4cd/Makefile.inc
+++ b/src/soc/marvell/bg4cd/Makefile.inc
@@ -15,8 +15,8 @@
 
 ifeq ($(CONFIG_SOC_MARVELL_BG4CD),y)
 
-bootblock-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += bootblock_asm.S
-bootblock-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += bootblock.c
+bootblock-$(CONFIG_VBOOT) += bootblock_asm.S
+bootblock-$(CONFIG_VBOOT) += bootblock.c
 
 bootblock-y += cbmem.c
 bootblock-y += i2c.c
diff --git a/src/soc/qualcomm/ipq40xx/Kconfig b/src/soc/qualcomm/ipq40xx/Kconfig
index 605cea2..f738622 100644
--- a/src/soc/qualcomm/ipq40xx/Kconfig
+++ b/src/soc/qualcomm/ipq40xx/Kconfig
@@ -14,9 +14,9 @@
 if SOC_QC_IPQ40XX
 
 config CHROMEOS
-	select CHROMEOS_VBNV_FLASH
-	select SEPARATE_VERSTAGE
 	select RETURN_FROM_VERSTAGE
+	select SEPARATE_VERSTAGE
+	select VBOOT_VBNV_FLASH
 
 config IPQ_QFN_PART
 	bool
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index aeb59ff..7ba5df5 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -13,7 +13,7 @@
 if SOC_QC_IPQ806X
 
 config CHROMEOS
-	select CHROMEOS_VBNV_FLASH
+	select VBOOT_VBNV_FLASH
 	select SEPARATE_VERSTAGE
 	select RETURN_FROM_VERSTAGE
 
diff --git a/src/vendorcode/google/chromeos/vboot2/Kconfig b/src/vboot/Kconfig
similarity index 62%
rename from src/vendorcode/google/chromeos/vboot2/Kconfig
rename to src/vboot/Kconfig
index 5aaf932..6f9e3b9 100644
--- a/src/vendorcode/google/chromeos/vboot2/Kconfig
+++ b/src/vboot/Kconfig
@@ -12,26 +12,59 @@
 ## GNU General Public License for more details.
 ##
 
+config VBOOT_VBNV_OFFSET
+	hex
+	default 0x26
+	depends on PC80_SYSTEM
+	help
+	  CMOS offset for VbNv data. This value must match cmos.layout
+	  in the mainboard directory, minus 14 bytes for the RTC.
+
+config VBOOT_VBNV_CMOS
+	bool "Vboot non-volatile storage in CMOS."
+	default n
+	help
+	  VBNV is stored in CMOS
+
+config VBOOT_VBNV_CMOS_BACKUP_TO_FLASH
+	bool "Back up Vboot non-volatile storage from CMOS to flash."
+	default n
+	depends on VBOOT_VBNV_CMOS
+	help
+	  Vboot non-volatile storage data will be backed up from CMOS to flash
+	  and restored from flash if the CMOS is invalid due to power loss.
+
+config VBOOT_VBNV_EC
+	bool "Vboot non-volatile storage in EC."
+	default n
+	help
+	  VBNV is stored in EC
+
+config VBOOT_VBNV_FLASH
+	def_bool n
+	help
+	  VBNV is stored in flash storage
+
 config VBOOT_STARTS_IN_BOOTBLOCK
 	bool "Vboot starts verifying in bootblock"
 	default n
-	depends on VBOOT_VERIFY_FIRMWARE
+	depends on VBOOT
 	help
 	  Firmware verification happens during or at the end of bootblock.
 
 config VBOOT_STARTS_IN_ROMSTAGE
 	bool "Vboot starts verifying in romstage"
 	default n
-	depends on VBOOT_VERIFY_FIRMWARE && !VBOOT_STARTS_IN_BOOTBLOCK
+	depends on VBOOT && !VBOOT_STARTS_IN_BOOTBLOCK
 	help
 	  Firmware verification happens during or at the end of romstage.
 
-config VBOOT2_MOCK_SECDATA
+config VBOOT_MOCK_SECDATA
 	bool "Mock secdata for firmware verification"
 	default n
-	depends on VBOOT_VERIFY_FIRMWARE
+	depends on VBOOT
 	help
-	  Enabling VBOOT2_MOCK_SECDATA will mock secdata for the firmware
+	  Enabling VBOOT_MOCK_SECDATA will mock secdata for the firmware
 	  verification to avoid access to a secdata storage (typically TPM).
 	  All operations for a secdata storage will be successful. This option
 	  can be used during development when a TPM is not present or broken.
@@ -40,7 +73,7 @@
 config VBOOT_DISABLE_DEV_ON_RECOVERY
 	bool "Disable dev mode on recovery requests"
 	default n
-	depends on VBOOT_VERIFY_FIRMWARE
+	depends on VBOOT
 	help
 	  When this option is enabled, the Chrome OS device leaves the
 	  developer mode as soon as recovery request is detected. This is
@@ -49,7 +82,7 @@
 config SEPARATE_VERSTAGE
 	bool "Vboot verification is built into a separate stage"
 	default n
-	depends on VBOOT_VERIFY_FIRMWARE
+	depends on VBOOT
 
 config RETURN_FROM_VERSTAGE
 	bool "The separate verification stage returns to its caller"
@@ -72,7 +105,7 @@
 	bool "Vboot's work buffer is dynamically allocated."
 	default y if ARCH_ROMSTAGE_X86_32 && !SEPARATE_VERSTAGE
 	default n
-	depends on VBOOT_VERIFY_FIRMWARE
+	depends on VBOOT
 	help
 	  This option is used when there isn't enough pre-main memory
 	  ram to allocate the vboot work buffer. That means vboot verification
@@ -82,8 +115,29 @@
 config VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT
 	bool
 	default n
-	depends on VBOOT_VERIFY_FIRMWARE
+	depends on VBOOT
 	help
 	  This option ensures that the recovery request is not lost because of
 	  reboots caused after vboot verification is run. e.g. reboots caused by
 	  FSP components on Intel platforms.
+
+config VBOOT_OPROM_MATTERS
+	bool "Video option ROM matters (= can skip display init)"
+	default n
+	depends on VBOOT
+	help
+	  Set this option to indicate to vboot that this platform will skip its
+	  display initialization on a normal (non-recovery, non-developer) boot.
+	  Vboot calls this "oprom matters" because on x86 devices this
+	  traditionally meant that the video option ROM will not be loaded, but
+	  it works functionally the same for other platforms that can skip their
+	  native display initialization code instead.
+
+config VBOOT
+	bool "Verify firmware with vboot."
+	default n
+	depends on HAVE_HARD_RESET
+	help
+	  Enabling VBOOT will use vboot to verify the components of the firmware
+	  (stages, payload, etc).
+
diff --git a/src/vendorcode/google/chromeos/vboot2/Makefile.inc b/src/vboot/Makefile.inc
similarity index 74%
rename from src/vendorcode/google/chromeos/vboot2/Makefile.inc
rename to src/vboot/Makefile.inc
index bf13fd6..c43af72 100644
--- a/src/vendorcode/google/chromeos/vboot2/Makefile.inc
+++ b/src/vboot/Makefile.inc
@@ -16,17 +16,42 @@
 libverstage-generic-ccopts += -D__PRE_RAM__ -D__VERSTAGE__
 verstage-generic-ccopts += -D__PRE_RAM__ -D__VERSTAGE__
 
+bootblock-y += vbnv.c
+verstage-y += vbnv.c
+romstage-y += vbnv.c
+ramstage-y += vbnv.c
+
+bootblock-$(CONFIG_VBOOT_VBNV_CMOS) += vbnv_cmos.c
+verstage-$(CONFIG_VBOOT_VBNV_CMOS) += vbnv_cmos.c
+romstage-$(CONFIG_VBOOT_VBNV_CMOS) += vbnv_cmos.c
+ramstage-$(CONFIG_VBOOT_VBNV_CMOS) += vbnv_cmos.c
+
+bootblock-$(CONFIG_VBOOT_VBNV_CMOS_BACKUP_TO_FLASH) += vbnv_flash.c
+verstage-$(CONFIG_VBOOT_VBNV_CMOS_BACKUP_TO_FLASH) += vbnv_flash.c
+romstage-$(CONFIG_VBOOT_VBNV_CMOS_BACKUP_TO_FLASH) += vbnv_flash.c
+ramstage-$(CONFIG_VBOOT_VBNV_CMOS_BACKUP_TO_FLASH) += vbnv_flash.c
+
+bootblock-$(CONFIG_VBOOT_VBNV_EC) += vbnv_ec.c
+verstage-$(CONFIG_VBOOT_VBNV_EC) += vbnv_ec.c
+romstage-$(CONFIG_VBOOT_VBNV_EC) += vbnv_ec.c
+ramstage-$(CONFIG_VBOOT_VBNV_EC) += vbnv_ec.c
+
+bootblock-$(CONFIG_VBOOT_VBNV_FLASH) += vbnv_flash.c
+verstage-$(CONFIG_VBOOT_VBNV_FLASH) += vbnv_flash.c
+romstage-$(CONFIG_VBOOT_VBNV_FLASH) += vbnv_flash.c
+ramstage-$(CONFIG_VBOOT_VBNV_FLASH) += vbnv_flash.c
+
 bootblock-y += vboot_loader.c
 romstage-y += vboot_loader.c
 ramstage-y += vboot_loader.c
 verstage-y += vboot_loader.c
 postcar-y += vboot_loader.c
 
-bootblock-y += ../vboot_common.c
-verstage-y += ../vboot_common.c
-romstage-y += ../vboot_common.c
-ramstage-y += ../vboot_common.c
-postcar-y += ../vboot_common.c
+bootblock-y += vboot_common.c
+verstage-y += vboot_common.c
+romstage-y += vboot_common.c
+ramstage-y += vboot_common.c
+postcar-y += vboot_common.c
 
 bootblock-y += recovery.c
 romstage-y += recovery.c
@@ -38,10 +63,10 @@
 libverstage-y += vboot_logic.c
 verstage-y += common.c
 verstage-y += verstage.c
-ifeq (${CONFIG_VBOOT2_MOCK_SECDATA},y)
+ifeq (${CONFIG_VBOOT_MOCK_SECDATA},y)
 libverstage-y += secdata_mock.c
 else
-libverstage-y += antirollback.c
+libverstage-y += secdata_tpm.c
 endif
 romstage-y += vboot_handoff.c common.c
 
diff --git a/src/vendorcode/google/chromeos/vboot2/common.c b/src/vboot/common.c
similarity index 97%
rename from src/vendorcode/google/chromeos/vboot2/common.c
rename to src/vboot/common.c
index 58ea95d..3fa9657 100644
--- a/src/vendorcode/google/chromeos/vboot2/common.c
+++ b/src/vboot/common.c
@@ -20,10 +20,9 @@
 #include <reset.h>
 #include <string.h>
 #include <vb2_api.h>
-#include "../chromeos.h"
-#include "../symbols.h"
-#include "../vboot_common.h"
-#include "misc.h"
+#include <vboot/misc.h>
+#include <vboot/symbols.h>
+#include <vboot/vboot_common.h>
 
 struct selected_region {
 	uint32_t offset;
diff --git a/src/vendorcode/google/chromeos/vboot2/misc.h b/src/vboot/misc.h
similarity index 88%
rename from src/vendorcode/google/chromeos/vboot2/misc.h
rename to src/vboot/misc.h
index 9b771a2..dc94720 100644
--- a/src/vendorcode/google/chromeos/vboot2/misc.h
+++ b/src/vboot/misc.h
@@ -13,10 +13,10 @@
  * GNU General Public License for more details.
  */
 
-#ifndef __CHROMEOS_VBOOT2_MISC_H__
-#define __CHROMEOS_VBOOT2_MISC_H__
+#ifndef __VBOOT_MISC_H__
+#define __VBOOT_MISC_H__
 
-#include "../vboot_common.h"
+#include <vboot/vboot_common.h>
 
 struct vb2_context;
 struct vb2_shared_data;
@@ -37,4 +37,4 @@
 
 void vb2_save_recovery_reason_vbnv(void);
 
-#endif /* __CHROMEOS_VBOOT2_MISC_H__ */
+#endif /* __VBOOT_MISC_H__ */
diff --git a/src/vendorcode/google/chromeos/vboot2/recovery.c b/src/vboot/recovery.c
similarity index 97%
rename from src/vendorcode/google/chromeos/vboot2/recovery.c
rename to src/vboot/recovery.c
index 94a8cc3..6e6eb0e 100644
--- a/src/vendorcode/google/chromeos/vboot2/recovery.c
+++ b/src/vboot/recovery.c
@@ -14,13 +14,14 @@
  */
 
 #include <assert.h>
+#include <bootmode.h>
 #include <bootstate.h>
 #include <rules.h>
 #include <string.h>
 #include <vb2_api.h>
-
-#include "misc.h"
-#include "../vboot_common.h"
+#include <vboot/misc.h>
+#include <vboot/vbnv.h>
+#include <vboot/vboot_common.h>
 
 static int vb2_get_recovery_reason_shared_data(void)
 {
@@ -88,9 +89,6 @@
  */
 static int vboot_possibly_executed(void)
 {
-	if (!IS_ENABLED(CONFIG_VBOOT_VERIFY_FIRMWARE))
-		return 0;
-
 	if (IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)) {
 		if (ENV_BOOTBLOCK && IS_ENABLED(CONFIG_SEPARATE_VERSTAGE))
 			return 0;
diff --git a/src/vendorcode/google/chromeos/vboot2/secdata_mock.c b/src/vboot/secdata_mock.c
similarity index 100%
rename from src/vendorcode/google/chromeos/vboot2/secdata_mock.c
rename to src/vboot/secdata_mock.c
diff --git a/src/vendorcode/google/chromeos/vboot2/antirollback.c b/src/vboot/secdata_tpm.c
similarity index 100%
rename from src/vendorcode/google/chromeos/vboot2/antirollback.c
rename to src/vboot/secdata_tpm.c
diff --git a/src/vboot/symbols.h b/src/vboot/symbols.h
new file mode 100644
index 0000000..fb3d654
--- /dev/null
+++ b/src/vboot/symbols.h
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __VBOOT_SYMBOLS_H__
+#define __VBOOT_SYMBOLS_H__
+
+extern u8 _vboot2_work[];
+extern u8 _evboot2_work[];
+#define _vboot2_work_size (_evboot2_work - _vboot2_work)
+
+/* Careful: _e<stage> and _<stage>_size only defined for the current stage! */
+extern u8 _verstage[];
+extern u8 _everstage[];
+#define _verstage_size (_everstage - _verstage)
+
+#endif /* __VBOOT_SYMBOLS_H__ */
diff --git a/src/vendorcode/google/chromeos/vbnv.c b/src/vboot/vbnv.c
similarity index 86%
rename from src/vendorcode/google/chromeos/vbnv.c
rename to src/vboot/vbnv.c
index 9fd97a0..ce64928 100644
--- a/src/vendorcode/google/chromeos/vbnv.c
+++ b/src/vboot/vbnv.c
@@ -16,12 +16,11 @@
 #include <arch/early_variables.h>
 #include <string.h>
 #include <types.h>
-#include "chromeos.h"
-#include "vbnv.h"
-#include "vbnv_layout.h"
+#include <vboot/vbnv.h>
+#include <vboot/vbnv_layout.h>
 
 static int vbnv_initialized CAR_GLOBAL;
-static uint8_t vbnv[VBNV_BLOCK_SIZE] CAR_GLOBAL;
+static uint8_t vbnv[VBOOT_VBNV_BLOCK_SIZE] CAR_GLOBAL;
 
 /* Wrappers for accessing the variables marked as CAR_GLOBAL. */
 static inline int is_vbnv_initialized(void)
@@ -61,7 +60,7 @@
 
 static void reset_vbnv(uint8_t *vbnv_copy)
 {
-	memset(vbnv_copy, 0, VBNV_BLOCK_SIZE);
+	memset(vbnv_copy, 0, VBOOT_VBNV_BLOCK_SIZE);
 }
 
 /* Read VBNV data into cache. */
@@ -86,11 +85,11 @@
  */
 void read_vbnv(uint8_t *vbnv_copy)
 {
-	if (IS_ENABLED(CONFIG_CHROMEOS_VBNV_CMOS))
+	if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS))
 		read_vbnv_cmos(vbnv_copy);
-	else if (IS_ENABLED(CONFIG_CHROMEOS_VBNV_EC))
+	else if (IS_ENABLED(CONFIG_VBOOT_VBNV_EC))
 		read_vbnv_ec(vbnv_copy);
-	else if (IS_ENABLED(CONFIG_CHROMEOS_VBNV_FLASH))
+	else if (IS_ENABLED(CONFIG_VBOOT_VBNV_FLASH))
 		read_vbnv_flash(vbnv_copy);
 
 	/* Check data for consistency */
@@ -104,11 +103,11 @@
  */
 void save_vbnv(const uint8_t *vbnv_copy)
 {
-	if (IS_ENABLED(CONFIG_CHROMEOS_VBNV_CMOS))
+	if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS))
 		save_vbnv_cmos(vbnv_copy);
-	else if (IS_ENABLED(CONFIG_CHROMEOS_VBNV_EC))
+	else if (IS_ENABLED(CONFIG_VBOOT_VBNV_EC))
 		save_vbnv_ec(vbnv_copy);
-	else if (IS_ENABLED(CONFIG_CHROMEOS_VBNV_FLASH))
+	else if (IS_ENABLED(CONFIG_VBOOT_VBNV_FLASH))
 		save_vbnv_flash(vbnv_copy);
 
 	/* Clear initialized flag to force cached data to be updated */
@@ -118,7 +117,7 @@
 /* Save a recovery reason into VBNV. */
 void set_recovery_mode_into_vbnv(int recovery_reason)
 {
-	uint8_t vbnv_copy[VBNV_BLOCK_SIZE];
+	uint8_t vbnv_copy[VBOOT_VBNV_BLOCK_SIZE];
 
 	read_vbnv(vbnv_copy);
 
diff --git a/src/vendorcode/google/chromeos/vbnv.h b/src/vboot/vbnv.h
similarity index 93%
rename from src/vendorcode/google/chromeos/vbnv.h
rename to src/vboot/vbnv.h
index 5d21cc8..78ca8f6 100644
--- a/src/vendorcode/google/chromeos/vbnv.h
+++ b/src/vboot/vbnv.h
@@ -13,8 +13,8 @@
  * GNU General Public License for more details.
  */
 
-#ifndef __CHROMEOS_VBNV_H__
-#define __CHROMEOS_VBNV_H__
+#ifndef __VBOOT_VBNV_H__
+#define __VBOOT_VBNV_H__
 
 #include <types.h>
 
@@ -39,4 +39,4 @@
 void read_vbnv_ec(uint8_t *vbnv_copy);
 void save_vbnv_ec(const uint8_t *vbnv_copy);
 
-#endif
+#endif /* __VBOOT_VBNV_H__ */
diff --git a/src/vendorcode/google/chromeos/vbnv_cmos.c b/src/vboot/vbnv_cmos.c
similarity index 76%
rename from src/vendorcode/google/chromeos/vbnv_cmos.c
rename to src/vboot/vbnv_cmos.c
index da0d300..5eda8e6 100644
--- a/src/vendorcode/google/chromeos/vbnv_cmos.c
+++ b/src/vboot/vbnv_cmos.c
@@ -17,17 +17,17 @@
 #include <console/console.h>
 #include <types.h>
 #include <pc80/mc146818rtc.h>
-#include "vbnv.h"
-#include "vbnv_layout.h"
+#include <vboot/vbnv.h>
+#include <vboot/vbnv_layout.h>
 
 void read_vbnv_cmos(uint8_t *vbnv_copy)
 {
 	int i;
 
-	for (i = 0; i < VBNV_BLOCK_SIZE; i++)
-		vbnv_copy[i] = cmos_read(CONFIG_VBNV_OFFSET + 14 + i);
+	for (i = 0; i < VBOOT_VBNV_BLOCK_SIZE; i++)
+		vbnv_copy[i] = cmos_read(CONFIG_VBOOT_VBNV_OFFSET + 14 + i);
 
-	if (IS_ENABLED(CONFIG_CHROMEOS_VBNV_CMOS_BACKUP_TO_FLASH)) {
+	if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS_BACKUP_TO_FLASH)) {
 		if (verify_vbnv(vbnv_copy))
 			return;
 
@@ -47,13 +47,13 @@
 {
 	int i;
 
-	for (i = 0; i < VBNV_BLOCK_SIZE; i++)
-		cmos_write(vbnv_copy[i], CONFIG_VBNV_OFFSET + 14 + i);
+	for (i = 0; i < VBOOT_VBNV_BLOCK_SIZE; i++)
+		cmos_write(vbnv_copy[i], CONFIG_VBOOT_VBNV_OFFSET + 14 + i);
 }
 
 void init_vbnv_cmos(int rtc_fail)
 {
-	uint8_t vbnv[VBNV_BLOCK_SIZE];
+	uint8_t vbnv[VBOOT_VBNV_BLOCK_SIZE];
 
 	if (rtc_fail)
 		read_vbnv_cmos(vbnv);
@@ -64,10 +64,10 @@
 		save_vbnv_cmos(vbnv);
 }
 
-#if IS_ENABLED(CONFIG_CHROMEOS_VBNV_CMOS_BACKUP_TO_FLASH)
+#if IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS_BACKUP_TO_FLASH)
 static void back_up_vbnv_cmos(void *unused)
 {
-	uint8_t vbnv_cmos[VBNV_BLOCK_SIZE];
+	uint8_t vbnv_cmos[VBOOT_VBNV_BLOCK_SIZE];
 
 	/* Read current VBNV from CMOS. */
 	read_vbnv_cmos(vbnv_cmos);
diff --git a/src/vendorcode/google/chromeos/vbnv_ec.c b/src/vboot/vbnv_ec.c
similarity index 77%
rename from src/vendorcode/google/chromeos/vbnv_ec.c
rename to src/vboot/vbnv_ec.c
index 0b7b7b5..99e2b82 100644
--- a/src/vendorcode/google/chromeos/vbnv_ec.c
+++ b/src/vboot/vbnv_ec.c
@@ -15,15 +15,16 @@
 
 #include <types.h>
 #include <ec/google/chromeec/ec.h>
-#include "vbnv.h"
-#include "vbnv_layout.h"
+#include <vboot/vbnv.h>
+#include <vboot/vbnv_layout.h>
 
 void read_vbnv_ec(uint8_t *vbnv_copy)
 {
-	google_chromeec_vbnv_context(1, vbnv_copy, VBNV_BLOCK_SIZE);
+	google_chromeec_vbnv_context(1, vbnv_copy, VBOOT_VBNV_BLOCK_SIZE);
 }
 
 void save_vbnv_ec(const uint8_t *vbnv_copy)
 {
-	google_chromeec_vbnv_context(0, (uint8_t *)vbnv_copy, VBNV_BLOCK_SIZE);
+	google_chromeec_vbnv_context(0, (uint8_t *)vbnv_copy,
+				     VBOOT_VBNV_BLOCK_SIZE);
 }
diff --git a/src/vendorcode/google/chromeos/vbnv_flash.c b/src/vboot/vbnv_flash.c
similarity index 97%
rename from src/vendorcode/google/chromeos/vbnv_flash.c
rename to src/vboot/vbnv_flash.c
index 88f39b0..8b60be2 100644
--- a/src/vendorcode/google/chromeos/vbnv_flash.c
+++ b/src/vboot/vbnv_flash.c
@@ -15,14 +15,15 @@
 
 #include <arch/early_variables.h>
 #include <assert.h>
+#include <commonlib/region.h>
 #include <console/console.h>
 #include <spi_flash.h>
 #include <string.h>
 #include <vb2_api.h>
 #include <vboot_nvstorage.h>
-#include "chromeos.h"
-#include "vbnv.h"
-#include "vbnv_layout.h"
+#include <vboot/vboot_common.h>
+#include <vboot/vbnv.h>
+#include <vboot/vbnv_layout.h>
 
 #define BLOB_SIZE VB2_NVDATA_SIZE
 
diff --git a/src/vendorcode/google/chromeos/vbnv_layout.h b/src/vboot/vbnv_layout.h
similarity index 88%
rename from src/vendorcode/google/chromeos/vbnv_layout.h
rename to src/vboot/vbnv_layout.h
index d7e7845..59acd0c 100644
--- a/src/vendorcode/google/chromeos/vbnv_layout.h
+++ b/src/vboot/vbnv_layout.h
@@ -13,10 +13,10 @@
  * GNU General Public License for more details.
  */
 
-#ifndef VBNV_LAYOUT_H
-#define VBNV_LAYOUT_H
+#ifndef __VBOOT_VBNV_LAYOUT_H__
+#define __VBOOT_VBNV_LAYOUT_H__
 
-#define VBNV_BLOCK_SIZE 16	/* Size of NV storage block in bytes */
+#define VBOOT_VBNV_BLOCK_SIZE 16	/* Size of NV storage block in bytes */
 
 /* Constants for NV storage.  We use this rather than structs and
  * bitfields so the data format is consistent across platforms and
@@ -44,4 +44,4 @@
 #define KERNEL_FIELD_OFFSET         11
 #define CRC_OFFSET                  15
 
-#endif /* VBNV_LAYOUT_H */
+#endif /* __VBOOT_VBNV_LAYOUT_H__ */
diff --git a/src/vendorcode/google/chromeos/vboot_common.c b/src/vboot/vboot_common.c
similarity index 97%
rename from src/vendorcode/google/chromeos/vboot_common.c
rename to src/vboot/vboot_common.c
index 66800ed..319e0de 100644
--- a/src/vendorcode/google/chromeos/vboot_common.c
+++ b/src/vboot/vboot_common.c
@@ -23,9 +23,7 @@
 #include <rules.h>
 #include <stddef.h>
 #include <string.h>
-
-#include "chromeos.h"
-#include "vboot_common.h"
+#include <vboot/vboot_common.h>
 
 int vboot_named_region_device(const char *name, struct region_device *rdev)
 {
diff --git a/src/vendorcode/google/chromeos/vboot_common.h b/src/vboot/vboot_common.h
similarity index 96%
rename from src/vendorcode/google/chromeos/vboot_common.h
rename to src/vboot/vboot_common.h
index 266ce4f..684a66b 100644
--- a/src/vendorcode/google/chromeos/vboot_common.h
+++ b/src/vboot/vboot_common.h
@@ -12,16 +12,14 @@
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */
-#ifndef VBOOT_COMMON_H
-#define VBOOT_COMMON_H
+#ifndef __VBOOT_VBOOT_COMMON_H__
+#define __VBOOT_VBOOT_COMMON_H__
 
 #include <commonlib/region.h>
 #include <stdint.h>
 #include <vboot_api.h>
 #include <vboot_struct.h>
 
-#include "chromeos.h"
-
 /* Locate vboot area by name. Returns 0 on success and -1 on error. */
 int vboot_named_region_device(const char *name, struct region_device *rdev);
 
@@ -103,4 +101,4 @@
 void verstage(void);
 void verstage_mainboard_init(void);
 
-#endif /* VBOOT_COMMON_H */
+#endif /* __VBOOT_VBOOT_COMMON_H__ */
diff --git a/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c b/src/vboot/vboot_handoff.c
similarity index 97%
rename from src/vendorcode/google/chromeos/vboot2/vboot_handoff.c
rename to src/vboot/vboot_handoff.c
index 0e2cb84..b0bd04c 100644
--- a/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c
+++ b/src/vboot/vboot_handoff.c
@@ -15,6 +15,7 @@
 
 #include <arch/stages.h>
 #include <assert.h>
+#include <bootmode.h>
 #include <stdint.h>
 #include <stddef.h>
 #include <string.h>
@@ -28,8 +29,8 @@
 #define NEED_VB20_INTERNALS  /* TODO: remove me! */
 #include <vb2_api.h>
 #include <vboot_struct.h>
-#include "../chromeos.h"
-#include "misc.h"
+#include <vboot/vbnv.h>
+#include <vboot/misc.h>
 
 /**
  * Sets vboot_handoff based on the information in vb2_shared_data
@@ -91,7 +92,7 @@
 		 * Inform vboot if the display was enabled by dev/rec
 		 * mode or was requested by vboot kernel phase.
 		 */
-		if (*oflags & VB_INIT_OUT_ENABLE_DISPLAY ||
+		if ((*oflags & VB_INIT_OUT_ENABLE_DISPLAY) ||
 		    vboot_wants_oprom()) {
 			vb_sd->flags |= VBSD_OPROM_LOADED;
 			*oflags |= VB_INIT_OUT_ENABLE_DISPLAY;
diff --git a/src/vendorcode/google/chromeos/vboot2/vboot_loader.c b/src/vboot/vboot_loader.c
similarity index 97%
rename from src/vendorcode/google/chromeos/vboot2/vboot_loader.c
rename to src/vboot/vboot_loader.c
index b76d20b..7395fd7 100644
--- a/src/vendorcode/google/chromeos/vboot2/vboot_loader.c
+++ b/src/vboot/vboot_loader.c
@@ -20,9 +20,9 @@
 #include <rmodule.h>
 #include <rules.h>
 #include <string.h>
-#include "misc.h"
-#include "../vboot_common.h"
-#include "../symbols.h"
+#include <vboot/misc.h>
+#include <vboot/symbols.h>
+#include <vboot/vboot_common.h>
 
 /* The stage loading code is compiled and entered from multiple stages. The
  * helper functions below attempt to provide more clarity on when certain
diff --git a/src/vendorcode/google/chromeos/vboot2/vboot_logic.c b/src/vboot/vboot_logic.c
similarity index 98%
rename from src/vendorcode/google/chromeos/vboot2/vboot_logic.c
rename to src/vboot/vboot_logic.c
index 4c799c9..bc6ab48 100644
--- a/src/vendorcode/google/chromeos/vboot2/vboot_logic.c
+++ b/src/vboot/vboot_logic.c
@@ -16,15 +16,15 @@
 #include <antirollback.h>
 #include <arch/exception.h>
 #include <assert.h>
+#include <bootmode.h>
 #include <console/console.h>
 #include <console/vtxprintf.h>
 #include <delay.h>
 #include <string.h>
 #include <timestamp.h>
 #include <vb2_api.h>
-
-#include "../chromeos.h"
-#include "misc.h"
+#include <vboot/misc.h>
+#include <vboot/vbnv.h>
 
 /* The max hash size to expect is for SHA512. */
 #define VBOOT_MAX_HASH_SIZE VB2_SHA512_DIGEST_SIZE
diff --git a/src/vendorcode/google/chromeos/vboot2/verstage.c b/src/vboot/verstage.c
similarity index 96%
rename from src/vendorcode/google/chromeos/vboot2/verstage.c
rename to src/vboot/verstage.c
index 99bc28d..0ec9ca6 100644
--- a/src/vendorcode/google/chromeos/vboot2/verstage.c
+++ b/src/vboot/verstage.c
@@ -17,7 +17,7 @@
 #include <arch/hlt.h>
 #include <console/console.h>
 #include <program_loading.h>
-#include "../vboot_common.h"
+#include <vboot/vboot_common.h>
 
 void __attribute__((weak)) verstage_mainboard_init(void)
 {
diff --git a/src/vendorcode/google/Kconfig b/src/vendorcode/google/Kconfig
index 74c573a..f275e6c 100644
--- a/src/vendorcode/google/Kconfig
+++ b/src/vendorcode/google/Kconfig
@@ -13,4 +13,3 @@
 ##
 
 source src/vendorcode/google/chromeos/Kconfig
-
diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig
index f97a4e1..944a706 100644
--- a/src/vendorcode/google/chromeos/Kconfig
+++ b/src/vendorcode/google/chromeos/Kconfig
@@ -28,7 +28,7 @@
 	select BOOTMODE_STRAPS
 	select ELOG if SPI_FLASH
 	select COLLECT_TIMESTAMPS
-	select VBOOT_VERIFY_FIRMWARE
+	select VBOOT
 	select MULTIPLE_CBFS_INSTANCES
 	help
 	  Enable ChromeOS specific features like the GPIO sub table in
@@ -37,39 +37,6 @@
 
 if CHROMEOS
 
-config VBNV_OFFSET
-	hex
-	default 0x26
-	depends on PC80_SYSTEM
-	help
-	  CMOS offset for VbNv data. This value must match cmos.layout
-	  in the mainboard directory, minus 14 bytes for the RTC.
-
-config CHROMEOS_VBNV_CMOS
-	bool "Vboot non-volatile storage in CMOS."
-	default n
-	help
-	  VBNV is stored in CMOS
-
-config CHROMEOS_VBNV_CMOS_BACKUP_TO_FLASH
-	bool "Back up Vboot non-volatile storage from CMOS to flash."
-	default n
-	depends on CHROMEOS_VBNV_CMOS
-	help
-	  Vboot non-volatile storage data will be backed up from CMOS to flash
-	  and restored from flash if the CMOS is invalid due to power loss.
-
-config CHROMEOS_VBNV_EC
-	bool "Vboot non-volatile storage in EC."
-	default n
-	help
-	  VBNV is stored in EC
-
-config CHROMEOS_VBNV_FLASH
-	def_bool n
-	help
-	  VBNV is stored in flash storage
-
 config CHROMEOS_RAMOOPS
 	bool "Reserve space for Chrome OS ramoops"
 	default y
@@ -97,7 +64,7 @@
 config EC_SOFTWARE_SYNC
 	bool "Enable EC software sync"
 	default n
-	depends on VBOOT_VERIFY_FIRMWARE
+	depends on VBOOT
 	help
 	  EC software sync is a mechanism where the AP helps the EC verify its
 	  firmware similar to how vboot verifies the main system firmware. This
@@ -111,33 +78,13 @@
 	  Whether the EC (or PD) is slow to update and needs to display a
 	  screen that informs the user the update is happening.
 
-config VBOOT_OPROM_MATTERS
-	bool "Video option ROM matters (= can skip display init)"
-	default n
-	depends on VBOOT_VERIFY_FIRMWARE
-	help
-	  Set this option to indicate to vboot that this platform will skip its
-	  display initialization on a normal (non-recovery, non-developer) boot.
-	  Vboot calls this "oprom matters" because on x86 devices this
-	  traditionally meant that the video option ROM will not be loaded, but
-	  it works functionally the same for other platforms that can skip their
-	  native display initialization code instead.
-
 config VIRTUAL_DEV_SWITCH
 	bool "Virtual developer switch support"
 	default n
-	depends on VBOOT_VERIFY_FIRMWARE
+	depends on VBOOT
 	help
 	  Whether this platform has a virtual developer switch.
 
-config VBOOT_VERIFY_FIRMWARE
-	bool "Verify firmware with vboot."
-	default n
-	depends on HAVE_HARD_RESET
-	help
-	  Enabling VBOOT_VERIFY_FIRMWARE will use vboot to verify the components
-	  of the firmware (stages, payload, etc).
-
 config NO_TPM_RESUME
 	bool
 	default n
@@ -172,8 +119,6 @@
 	help
 	 This option is needed to add ACPI regulatory domain methods
 
-source src/vendorcode/google/chromeos/vboot2/Kconfig
-
 menu "GBB configuration"
 
 config GBB_HWID
diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc
index 18ce13e..253c30e 100644
--- a/src/vendorcode/google/chromeos/Makefile.inc
+++ b/src/vendorcode/google/chromeos/Makefile.inc
@@ -18,31 +18,6 @@
 romstage-y += chromeos.c
 ramstage-y += chromeos.c
 
-bootblock-y += vbnv.c
-verstage-y += vbnv.c
-romstage-y += vbnv.c
-ramstage-y += vbnv.c
-
-bootblock-$(CONFIG_CHROMEOS_VBNV_CMOS) += vbnv_cmos.c
-verstage-$(CONFIG_CHROMEOS_VBNV_CMOS) += vbnv_cmos.c
-romstage-$(CONFIG_CHROMEOS_VBNV_CMOS) += vbnv_cmos.c
-ramstage-$(CONFIG_CHROMEOS_VBNV_CMOS) += vbnv_cmos.c
-
-bootblock-$(CONFIG_CHROMEOS_VBNV_CMOS_BACKUP_TO_FLASH) += vbnv_flash.c
-verstage-$(CONFIG_CHROMEOS_VBNV_CMOS_BACKUP_TO_FLASH) += vbnv_flash.c
-romstage-$(CONFIG_CHROMEOS_VBNV_CMOS_BACKUP_TO_FLASH) += vbnv_flash.c
-ramstage-$(CONFIG_CHROMEOS_VBNV_CMOS_BACKUP_TO_FLASH) += vbnv_flash.c
-
-bootblock-$(CONFIG_CHROMEOS_VBNV_EC) += vbnv_ec.c
-verstage-$(CONFIG_CHROMEOS_VBNV_EC) += vbnv_ec.c
-romstage-$(CONFIG_CHROMEOS_VBNV_EC) += vbnv_ec.c
-ramstage-$(CONFIG_CHROMEOS_VBNV_EC) += vbnv_ec.c
-
-bootblock-$(CONFIG_CHROMEOS_VBNV_FLASH) += vbnv_flash.c
-verstage-$(CONFIG_CHROMEOS_VBNV_FLASH) += vbnv_flash.c
-romstage-$(CONFIG_CHROMEOS_VBNV_FLASH) += vbnv_flash.c
-ramstage-$(CONFIG_CHROMEOS_VBNV_FLASH) += vbnv_flash.c
-
 ramstage-$(CONFIG_ELOG) += elog.c
 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += gnvs.c
 ramstage-$(CONFIG_CHROMEOS_RAMOOPS) += ramoops.c
@@ -60,8 +35,6 @@
 CFLAGS_common += -DMOCK_TPM=0
 endif
 
-subdirs-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += vboot2
-
 CONFIG_GBB_HWID := $(call strip_quotes,$(CONFIG_GBB_HWID))
 CONFIG_GBB_BMPFV_FILE := $(call strip_quotes,$(CONFIG_GBB_BMPFV_FILE))
 CONFIG_VBOOT_KEYBLOCK := $(call strip_quotes,$(CONFIG_VBOOT_KEYBLOCK))
diff --git a/src/vendorcode/google/chromeos/acpi/chromeos.asl b/src/vendorcode/google/chromeos/acpi/chromeos.asl
index 66ebbc1..7d62f4a 100644
--- a/src/vendorcode/google/chromeos/acpi/chromeos.asl
+++ b/src/vendorcode/google/chromeos/acpi/chromeos.asl
@@ -13,7 +13,7 @@
  * GNU General Public License for more details.
  */
 
-#include <vendorcode/google/chromeos/vbnv_layout.h>
+#include <vboot/vbnv_layout.h>
 
 Device (CRHW)
 {
@@ -71,8 +71,8 @@
 		Name(VNBV, Package() {
 			// See src/vendorcode/google/chromeos/Kconfig
 			// for the definition of these:
-			CONFIG_VBNV_OFFSET,
-			VBNV_BLOCK_SIZE
+			CONFIG_VBOOT_VBNV_OFFSET,
+			VBOOT_VBNV_BLOCK_SIZE
 		})
 		Return(VNBV)
 	}
diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h
index ad9ef2f..92c943c 100644
--- a/src/vendorcode/google/chromeos/chromeos.h
+++ b/src/vendorcode/google/chromeos/chromeos.h
@@ -20,9 +20,8 @@
 #include <stdint.h>
 #include <bootmode.h>
 #include <rules.h>
-#include "vbnv.h"
-#include "vboot_common.h"
-#include "vboot2/misc.h"
+#include <vboot/misc.h>
+#include <vboot/vboot_common.h>
 
 void save_chromeos_gpios(void);
 
diff --git a/src/vendorcode/google/chromeos/elog.c b/src/vendorcode/google/chromeos/elog.c
index 710d6f6..0d835b8 100644
--- a/src/vendorcode/google/chromeos/elog.c
+++ b/src/vendorcode/google/chromeos/elog.c
@@ -17,8 +17,9 @@
 #include <console/console.h>
 #include <elog.h>
 #include <vendorcode/google/chromeos/chromeos.h>
-#if CONFIG_VBOOT_VERIFY_FIRMWARE
-#include "vboot_common.h"
+#if CONFIG_VBOOT
+#include <vboot/vbnv.h>
+#include <vboot/vboot_common.h>
 #include <vboot_struct.h>
 #endif
 
@@ -29,7 +30,7 @@
 		printk(BIOS_DEBUG, "%s: Logged dev mode boot\n", __func__);
 	} else if (recovery_mode_enabled()) {
 		u8 reason = 0;
-#if CONFIG_VBOOT_VERIFY_FIRMWARE
+#if CONFIG_VBOOT
 		struct vboot_handoff *vbho = cbmem_find(CBMEM_ID_VBOOT_HANDOFF);
 
 		reason = get_recovery_mode_from_vbnv();
diff --git a/src/vendorcode/google/chromeos/gnvs.c b/src/vendorcode/google/chromeos/gnvs.c
index 48668e8..f5ccd65 100644
--- a/src/vendorcode/google/chromeos/gnvs.c
+++ b/src/vendorcode/google/chromeos/gnvs.c
@@ -23,8 +23,9 @@
 
 #include "chromeos.h"
 #include "gnvs.h"
-#if CONFIG_VBOOT_VERIFY_FIRMWARE
-#include "vboot_common.h"
+#if CONFIG_VBOOT
+#include <vboot/vbnv.h>
+#include <vboot/vboot_common.h>
 #include <vboot_struct.h>
 #endif
 
@@ -38,7 +39,7 @@
 	/* Copy saved ME hash into NVS */
 	memcpy(vboot_data->mehh, me_hash_saved, sizeof(vboot_data->mehh));
 
-#if CONFIG_VBOOT_VERIFY_FIRMWARE
+#if CONFIG_VBOOT
 	/* Save the vdat from the vboot handoff structure. Downstream software
 	 * consumes the data located in the ACPI table. Ensure it reflects
 	 * the shared data from VbInit() and VbSelectFirmware(). */
@@ -57,7 +58,7 @@
 		elog_add_event(ELOG_TYPE_CROS_DEVELOPER_MODE);
 	if (recovery_mode_enabled()) {
 		int reason = get_recovery_mode_from_vbnv();
-#if CONFIG_VBOOT_VERIFY_FIRMWARE
+#if CONFIG_VBOOT
 		if (vboot_handoff && !reason) {
 			VbSharedDataHeader *sd = (VbSharedDataHeader *)
 				vboot_handoff->shared_data;
diff --git a/src/vendorcode/google/chromeos/symbols.h b/src/vendorcode/google/chromeos/symbols.h
index 78b28e2..d8e1ead 100644
--- a/src/vendorcode/google/chromeos/symbols.h
+++ b/src/vendorcode/google/chromeos/symbols.h
@@ -16,15 +16,6 @@
 #ifndef __CHROMEOS_SYMBOLS_H
 #define __CHROMEOS_SYMBOLS_H
 
-extern u8 _vboot2_work[];
-extern u8 _evboot2_work[];
-#define _vboot2_work_size (_evboot2_work - _vboot2_work)
-
-/* Careful: _e<stage> and _<stage>_size only defined for the current stage! */
-extern u8 _verstage[];
-extern u8 _everstage[];
-#define _verstage_size (_everstage - _verstage)
-
 extern u8 _watchdog_tombstone[];
 extern u8 _ewatchdog_tombstone[];
 #define _watchdog_tombstone_size (_ewatchdog_tombstone - _watchdog_tombstone)