| commit | 29cd350c46c10044fa47de26588b619adf1df446 | [log] [tgz] |
|---|---|---|
| author | Angel Pons <th3fanbus@gmail.com> | Tue Jul 07 12:54:15 2020 +0200 |
| committer | Angel Pons <th3fanbus@gmail.com> | Wed Jul 08 22:07:38 2020 +0000 |
| tree | 9cb32984f6713ca928c666a4cf210688e2e0e3d6 | |
| parent | d85d7e2329a354093c34a69c4134572240d7c74f [diff] [blame] |
nb/intel/gm45: Use ASL 2.0 syntax Tested with BUILD_TIMELESS=1, Roda RK9 does not change. Change-Id: Ibb9b627de85eb09bdc977af55880366e4e49f3ac Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43173 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
diff --git a/src/northbridge/intel/gm45/acpi/hostbridge.asl b/src/northbridge/intel/gm45/acpi/hostbridge.asl index d96a7d5..2a8a137 100644 --- a/src/northbridge/intel/gm45/acpi/hostbridge.asl +++ b/src/northbridge/intel/gm45/acpi/hostbridge.asl
@@ -208,8 +208,8 @@ * Enter actual TOLUD. The TOLUD register contains bits 20-31 of * the top of memory address. */ - ShiftLeft (^MCHC.TLUD, 20, PMIN) - Add(Subtract(PMAX, PMIN), 1, PLEN) + PMIN = ^MCHC.TLUD << 20 + PLEN = PMAX - PMIN + 1 Return (MCRS) }