soc/intel/tigerlake: Replace TcssD3ColdDisable with D3COLD_SUPPORT
Remove the `TcssD3ColdDisable` option in devicetree, as it exists
in Kconfig. The setting is only used on `starlabs/starbook` which
selects D3COLD_SUPPORT so the UPDs will not change.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I50e49e900c96748edd5b678765e47cc0e0d9b280
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74476
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb
index cd8c480..c3a3f45 100644
--- a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb
+++ b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb
@@ -19,7 +19,6 @@
register "CnviBtAudioOffload" = "1"
register "enable_c6dram" = "1"
register "SaGv" = "SaGv_Enabled"
- register "TcssD3ColdDisable" = "1"
# FSP Silicon
# Serial I/O
diff --git a/src/mainboard/starlabs/starbook/variants/tgl/devtree.c b/src/mainboard/starlabs/starbook/variants/tgl/devtree.c
index 1c280c4..0077a63 100644
--- a/src/mainboard/starlabs/starbook/variants/tgl/devtree.c
+++ b/src/mainboard/starlabs/starbook/variants/tgl/devtree.c
@@ -60,7 +60,6 @@
if (get_uint_option("thunderbolt", 1) == 0) {
cfg->UsbTcPortEn = 0;
cfg->TcssXhciEn = 0;
- cfg->TcssD3ColdDisable = 0;
tbt_pci_dev->enabled = 0;
tbt_dma_dev->enabled = 0;
}
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index 6aa0408..3de8ffa 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -148,8 +148,6 @@
/* Support for TCSS xhci, xdci, TBT PCIe root ports and DMA controllers */
uint8_t TcssD3HotDisable;
- /* Support for TBT PCIe root ports and DMA controllers with D3Hot->D3Cold */
- uint8_t TcssD3ColdDisable;
/* Enable DPTF support */
int dptf_enable;
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c
index b823f50..358536e 100644
--- a/src/soc/intel/tigerlake/fsp_params.c
+++ b/src/soc/intel/tigerlake/fsp_params.c
@@ -327,7 +327,7 @@
if (cpu_id == CPUID_TIGERLAKE_A0)
params->D3ColdEnable = 0;
else
- params->D3ColdEnable = !config->TcssD3ColdDisable;
+ params->D3ColdEnable = CONFIG(D3COLD_SUPPORT);
params->UsbTcPortEn = config->UsbTcPortEn;
params->TcssAuxOri = config->TcssAuxOri;