soc/intel/alderlake/romstage: Skip GPIO configuration from FSP
Set GpioOverride UPD to 1 to skip GPIO configuration in FSP phases
TEST=Able to build and boot ADLRVP to OS.
Change-Id: Ie965a85d9da9b6a23b385536313b852e66909cf4
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46696
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c
index 38c1a1b..868d75e 100644
--- a/src/soc/intel/alderlake/romstage/fsp_params.c
+++ b/src/soc/intel/alderlake/romstage/fsp_params.c
@@ -157,6 +157,9 @@
m_cfg->CpuPcieRpEnableMask = is_dev_enabled(dev);
m_cfg->TmeEnable = CONFIG(INTEL_TME);
+
+ /* Skip GPIO configuration from FSP */
+ m_cfg->GpioOverride = 0x1;
}
void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)