mainboard/ms7721: Add MSI MS-7721 (FM2-A57MA-E35)
Adds support for the MSI MS-7721 (FM2-A75MA-E35) motherboard.
Tested by building coreboot with:
- VGA bios (needed for onboard video)
- XHCI firmware
- SeaBIOS payload
CPU: AMD A8-6500 APU
RAM: 2x 2GB Samsung M378B5673EH1
Confirmed booting using:
- USB stick with Arch Linux (kernel 4.7.5)
- Gentoo live CD from SATA dvd drive
- Gentoo installation from SATA harddisk (kernel 4.4.26)
Change-Id: I757e011de01ca9f340fd524b10e7fa3f291d53e3
Signed-off-by: Renze Nicolai <renze@rnplus.nl>
Reviewed-on: https://review.coreboot.org/17495
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
diff --git a/src/mainboard/msi/ms7721/dsdt.asl b/src/mainboard/msi/ms7721/dsdt.asl
index 0028855..f1840f6 100644
--- a/src/mainboard/msi/ms7721/dsdt.asl
+++ b/src/mainboard/msi/ms7721/dsdt.asl
@@ -3,6 +3,7 @@
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
* Copyright (C) 2013 Sage Electronic Engineering, LLC
+ * Copyright (C) 2016 Renze Nicolai <renze@rnplus.nl>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,12 +20,12 @@
"DSDT.AML", /* Output filename */
"DSDT", /* Signature */
0x02, /* DSDT Revision, needs to be 2 for 64bit */
- "ASUS ", /* OEMID */
+ "MSI ", /* OEMID */
"COREBOOT", /* TABLE ID */
0x00010001 /* OEM Revision */
)
{ /* Start of ASL file */
- /* #include <arch/x86/acpi/debug.asl> */ /* Include global debug methods if needed */
+ #include <arch/x86/acpi/debug.asl> /* Include global debug methods if needed */
/* Globals for the platform */
#include "acpi/mainboard.asl"
@@ -61,33 +62,14 @@
/* Describe the AMD Fusion Controller Hub Southbridge */
#include <southbridge/amd/agesa/hudson/acpi/fch.asl>
-
- /**
- * TODO: The devices listed here (SBR0 and SBR1) do not appear to
- * be referenced anywhere and could possibly be removed.
- */
- Device(SBR0) { /* PCIe 1x SB */
- Name(_ADR, 0x00150000)
- Name(_PRW, Package() {0x18, 4})
- Method(_PRT,0) {
- If(PMOD){ Return(ABR0) } /* APIC mode */
- Return (PBR0) /* PIC mode */
- }
- }
-
- Device(SBR1) { /* Onboard network */
- Name(_ADR, 0x00150001)
- Name(_PRW, Package() {0x18, 4})
- Method(_PRT, 0) {
- If(PMOD){ Return(ABR1) } /* APIC mode */
- Return (PBR1) /* PIC mode */
- }
- }
}
/* Describe PCI INT[A-H] for the Southbridge */
#include <southbridge/amd/agesa/hudson/acpi/pci_int.asl>
+ /* Describe USB for the Southbridge */
+ #include <southbridge/amd/agesa/hudson/acpi/usb.asl>
+
} /* End Scope(_SB) */
/* Describe SMBUS for the Southbridge */