diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index 83039a8..d2a8742 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -103,7 +103,7 @@
 	printk(BIOS_INFO, "Available memory below 4GB: %uM\n", tomk >> 10);
 
 	/* Report lowest memory region */
-	ram_resource(dev, idx++, 0, 0xa0000 / KiB);
+	ram_resource_kb(dev, idx++, 0, 0xa0000 / KiB);
 
 	/*
 	 * Reserve everything between A segment and 1MB:
@@ -111,11 +111,11 @@
 	 * 0xa0000 - 0xbffff: Legacy VGA
 	 * 0xc0000 - 0xfffff: RAM
 	 */
-	mmio_resource(dev, idx++, 0xa0000 / KiB, (0xc0000 - 0xa0000) / KiB);
-	reserved_ram_resource(dev, idx++, 0xc0000 / KiB, (1*MiB - 0xc0000) / KiB);
+	mmio_resource_kb(dev, idx++, 0xa0000 / KiB, (0xc0000 - 0xa0000) / KiB);
+	reserved_ram_resource_kb(dev, idx++, 0xc0000 / KiB, (1*MiB - 0xc0000) / KiB);
 
 	/* Report < 4GB memory */
-	ram_resource(dev, idx++, 1*MiB / KiB, tomk - 1*MiB / KiB);
+	ram_resource_kb(dev, idx++, 1*MiB / KiB, tomk - 1*MiB / KiB);
 
 	/*
 	 * If >= 4GB installed then memory from TOLUD to 4GB
@@ -123,15 +123,15 @@
 	 */
 	touud >>= 10; /* Convert to KB */
 	if (touud > 4096 * 1024) {
-		ram_resource(dev, idx++, 4096 * 1024, touud - (4096 * 1024));
+		ram_resource_kb(dev, idx++, 4096 * 1024, touud - (4096 * 1024));
 		printk(BIOS_INFO, "Available memory above 4GB: %lluM\n",
 		       (touud >> 10) - 4096);
 	}
 
 	printk(BIOS_DEBUG, "Adding UMA memory area base=0x%llx "
 	       "size=0x%llx\n", ((u64)tomk) << 10, ((u64)uma_sizek) << 10);
-	/* Don't use uma_resource() as our UMA touches the PCI hole. */
-	fixed_mem_resource(dev, idx++, tomk, uma_sizek, IORESOURCE_RESERVE);
+	/* Don't use uma_resource_kb() as our UMA touches the PCI hole. */
+	fixed_mem_resource_kb(dev, idx++, tomk, uma_sizek, IORESOURCE_RESERVE);
 
 	mmconf_resource(dev, idx++);
 }