drivers: add GIC support
The GIC is ARM's "Generic Interrupt Controller". This
change essentially implements the rudimentary support
for a GICv2 implementation that routes all interrupts
to Group1. This should also work for GICv1 with security
extensions.
BUG=chrome-os-partner:31945
BRANCH=None
TEST=Built and booted kernel using the code.
Change-Id: I9c9202c1309ca9e711e00d742085a6728552c54b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d1cd9b6b76035af107b7dc876f90777698162d34
Original-Change-Id: I4c5b84bfe888ac33fa01c8d64a3dffe1b5ddc823
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/217512
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9075
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
diff --git a/src/include/gic.h b/src/include/gic.h
new file mode 100644
index 0000000..22c5631
--- /dev/null
+++ b/src/include/gic.h
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef GIC_H
+#define GIC_H
+
+#if IS_ENABLED(CONFIG_GIC)
+
+/* Initialize the GIC on the currently processor, including GICD and GICC. */
+void gic_init(void);
+
+/* Return a pointer to the base of the GIC distributor mmio region. */
+void *gicd_base(void);
+
+/* Return a pointer to the base of the GIC cpu mmio region. */
+void *gicc_base(void);
+
+#else /* CONFIG_GIC */
+
+static inline void gic_init(void) {}
+
+#endif /* CONFIG_GIC */
+
+#endif /* GIC_H */