tree 16cd31cd458da50046de687605d251e5b912e724
parent a21797a51ed06dc9a5bff81a9e50c177e7ac23fa
author Yidi Lin <yidi.lin@mediatek.com> 1616665814 +0800
committer Hung-Te Lin <hungte@chromium.org> 1620382830 +0000

soc/mediatek/mt8195: Turn off L2C SRAM and reconfigure as L2 cache

Mediatek SoC uses part of the L2 cache as SRAM before DRAM is ready.
After DRAM is ready, we should invoke disable_l2c_sram to reconfigure
the L2C SRAM as L2 cache.

Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: I8777b0c8471fe17ffffdcb6ad5b7c00fb1d35db1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52925
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>