src/soc to src/superio: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for
finding spelling errors.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ieafbc93e49fcef198ac6e31fc8a3b708c395e08e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58082
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/sifive/fu540/ux00ddr.h b/src/soc/sifive/fu540/ux00ddr.h
index 14a628d..cc67508 100644
--- a/src/soc/sifive/fu540/ux00ddr.h
+++ b/src/soc/sifive/fu540/ux00ddr.h
@@ -82,14 +82,14 @@
static inline void ux00ddr_mask_outofrange_interrupts(size_t ahbregaddr) {
// Mask off Bit 8, Bit 2 and Bit 1 of Interrupt Status
- // Bit [2] Multiple accesses outside the defined PHYSICAL memory space have occured
- // Bit [1] A memory access outside the defined PHYSICAL memory space has occured
+ // Bit [2] Multiple accesses outside the defined PHYSICAL memory space have occurred
+ // Bit [1] A memory access outside the defined PHYSICAL memory space has occurred
_REG32(136<<2, ahbregaddr) |= ((1<<OUT_OF_RANGE_OFFSET) | (1<<MULTIPLE_OUT_OF_RANGE_OFFSET));
}
static inline void ux00ddr_mask_port_command_error_interrupt(size_t ahbregaddr) {
// Mask off Bit 7 of Interrupt Status
- // Bit [7] An error occured on the port command channel
+ // Bit [7] An error occurred on the port command channel
_REG32(136<<2, ahbregaddr) |= (1<<PORT_COMMAND_CHANNEL_ERROR_OFFSET);
}