commit | 263f129a8e1d012c53733170acaf9d0a01886b10 | [log] [tgz] |
---|---|---|
author | rkanabar <ronak.kanabar@intel.com> | Thu Nov 28 10:41:45 2019 +0530 |
committer | Patrick Georgi <pgeorgi@google.com> | Tue Dec 10 11:18:48 2019 +0000 |
tree | 7ab47619106e38f29a88bffeceded5860cf09424 | |
parent | 200d213d1bae614fcd35913c1d46fec7e495717f [diff] [blame] |
soc/intel/common: Add Jasperlake Device IDs Add Jasperlake SA and PCH IDs Change-Id: I2c9ec1ee4236184b986d99250f263172c80f7117 Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37434 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <lean.sheng.tan@intel.com> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: V Sowmya <v.sowmya@intel.com>
diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c index 981ad07..75c74f2 100644 --- a/src/soc/intel/common/block/p2sb/p2sb.c +++ b/src/soc/intel/common/block/p2sb/p2sb.c
@@ -180,6 +180,7 @@ PCI_DEVICE_ID_INTEL_ICL_P2SB, PCI_DEVICE_ID_INTEL_CMP_P2SB, PCI_DEVICE_ID_INTEL_TGL_P2SB, + PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_P2SB, 0, };