mb/google/trulo/var/orisa: Enable HDA Codec ALC256
We use ALC256 as HDA codec on orisa. Add verb table and the
related device tree changes for HDA related registers.
BUG=b:338523452
BRANCH=firmware-nissa-15217.B
TEST=emerge-nissa coreboot
Change-Id: I92051886341bd317cce6061ece83439d156b0f90
Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82719
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
diff --git a/src/mainboard/google/brya/variants/orisa/overridetree.cb b/src/mainboard/google/brya/variants/orisa/overridetree.cb
index 63bff0e..6427222 100644
--- a/src/mainboard/google/brya/variants/orisa/overridetree.cb
+++ b/src/mainboard/google/brya/variants/orisa/overridetree.cb
@@ -91,6 +91,15 @@
# Bit 1,3 - AUX lines are not swapped on the motherboard for either C0 or C1.
register "tcss_aux_ori" = "0"
+ # HD Audio
+ register "pch_hda_dsp_enable" = "1"
+ register "pch_hda_sdi_enable[0]" = "1"
+ register "pch_hda_sdi_enable[1]" = "1"
+ register "pch_hda_audio_link_hda_enable" = "1"
+ register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T"
+ register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"
+ register "pch_hda_idisp_codec_enable" = "1"
+
# Configure external V1P05/Vnn/VnnSx Rails
register "ext_fivr_settings" = "{
.configure_ext_fivr = 1,
@@ -527,5 +536,13 @@
end
end
end
+ device ref hda on
+ chip drivers/sof
+ register "spkr_tplg" = "max98360a"
+ register "jack_tplg" = "rt5682"
+ register "mic_tplg" = "_2ch_pdm0"
+ device generic 0 on end
+ end
+ end
end
end