commit 24b4df5f9904216e1651b087e4e7a57f8d5220f9
author Stefan Reinauer <stepan@coresystems.de> Sun Jan 17 13:47:35 2010 +0000
committer Stefan Reinauer <stepan@openbios.org> Sun Jan 17 13:47:35 2010 +0000
tree 45be5e6dbd876ba3023687f2a644c96f7b8a36e7
parent e6cf7c0d4f1ce7dc5933956e744fa9bf44c7c3bc

Support a few more i945 variants. With this framework in place it should
be possible to support i955 and i975 relatively easy, too.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5025 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/northbridge/intel/i945/early_init.c

diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index e8dea60..d16f77a 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -92,22 +92,29 @@
 	u8 reg8;
 
 	printk_info("\nIntel(R) ");
-	reg8 = pci_read_config8(PCI_DEV(0, 0x00, 0), 0x8);
+
+	reg8 = ((pci_read_config8(PCI_DEV(0, 0x00, 0), 0xe7) >> 5) & 4) | ((pci_read_config8(PCI_DEV(0, 0x00, 0), 0xe4) >> 4) & 3);
 	switch (reg8) {
 	case 0:
 	case 1:
 		printk_info("82945G");
 		break;
 	case 2:
-		printk_info("82945G/GZ/GC");
+	case 3:
+		printk_info("82945P");
 		break;
-	case 0x80:
-	case 0x81:
-	case 0x82:
-		printk_info("82945P/PL");
+	case 4:
+		printk_info("82945GC");
+		break;
+	case 5:
+		printk_info("82945GZ");
+		break;
+	case 6:
+	case 7:
+		printk_info("82945PL");
 		break;
 	default:
-		printk_info("Unknown (%02x)", reg8);	/* Others unknown. */
+		break;
 	}
 	printk_info(" Chipset\n");
 
@@ -794,32 +801,26 @@
 	reg32 |= (1 << 16);
 	EPBAR32(EPESD) = reg32;
 
-	EPBAR32(EPLE1D) |= (1 << 16);
-
-	EPBAR32(EPLE1D) |= (1 << 0);
+	EPBAR32(EPLE1D) |= (1 << 16) | (1 << 0);
 
 	EPBAR32(EPLE1A) = DEFAULT_DMIBAR;
-#if 0
-	EPBAR32(EPLE2D) |= (1 << 16);
-#endif
 
-	EPBAR32(EPLE2D) |= (1 << 0);
+	EPBAR32(EPLE2D) |= (1 << 16) | (1 << 0);
 
 	/* DMI Port Root Topology */
+
 	reg32 = DMIBAR32(DMILE1D);
 	reg32 &= 0x00ffffff;
-	DMIBAR32(DMILE1D) = reg32;
 
-	reg32 = DMIBAR32(DMILE1D);
 	reg32 &= 0xff00ffff;
 	reg32 |= (2 << 16);
-	DMIBAR32(DMILE1D) = reg32;
 
-	DMIBAR32(DMILE1D) |= (1 << 0);
+	reg32 |= (1 << 0);
+	DMIBAR32(DMILE1D) = reg32;
 
 	DMIBAR32(DMILE1A) = DEFAULT_RCBA;
 
-	DMIBAR32(DMILE2D) |= (1 << 0);
+	DMIBAR32(DMILE2D) |= (1 << 16) | (1 << 0);
 
 	DMIBAR32(DMILE2A) = DEFAULT_EPBAR;