mb/google/nissa/var/craaskov: Remove TOF function

Based on schematics and confirm with EE to remove TOF function.

BUG=b:290891557
BRANCH=firmware-nissa-15217.B
TEST=emerge-nissa coreboot

Change-Id: I1ae6a6562d87f8da5f41691a7606a1aa10989443
Signed-off-by: Rex Chou <rex_chou@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78147
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/google/brya/variants/craaskov/gpio.c b/src/mainboard/google/brya/variants/craaskov/gpio.c
index f3ed2c5..8b1446d 100644
--- a/src/mainboard/google/brya/variants/craaskov/gpio.c
+++ b/src/mainboard/google/brya/variants/craaskov/gpio.c
@@ -11,10 +11,10 @@
 	PAD_NC(GPP_A21, NONE),
 	/* A21 : GPP_A22 ==> NC */
 	PAD_NC(GPP_A22, NONE),
-	/* B5  : I2C2_SDA ==> TOF_I2C_DAT */
-	PAD_CFG_NF_LOCK(GPP_B5, NONE, NF1, LOCK_CONFIG),
-	/* B6  : I2C2_SCL ==> TOF_I2C_CLK */
-	PAD_CFG_NF_LOCK(GPP_B6, NONE, NF1, LOCK_CONFIG),
+	/* B5  : GPP_B5 ==> NC */
+	PAD_NC_LOCK(GPP_B5, NONE, LOCK_CONFIG),
+	/* B6  : GPP_B6 ==> NC */
+	PAD_NC_LOCK(GPP_B6, NONE, LOCK_CONFIG),
 	/* D3  : ISH_GP3 ==> NC */
 	PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG),
 	/* D8  : SRCCLKREQ3# ==> NC */
@@ -37,8 +37,6 @@
 	PAD_NC_LOCK(GPP_H12, NONE, LOCK_CONFIG),
 	/* H13 : UART0_CTS# ==> NC */
 	PAD_NC_LOCK(GPP_H13, NONE, LOCK_CONFIG),
-	/* H19 : SRCCLKREQ4# ==> TOF_INT# */
-	PAD_CFG_GPI_INT(GPP_H19, NONE, PLTRST, EDGE_BOTH),
 	/* H22 : IMGCLKOUT3 ==> NC */
 	PAD_NC(GPP_H22, NONE),
 	/* R6  : DMIC_CLK_A_1A ==> NC */
diff --git a/src/mainboard/google/brya/variants/craaskov/overridetree.cb b/src/mainboard/google/brya/variants/craaskov/overridetree.cb
index 748abd6..f3ac95f 100644
--- a/src/mainboard/google/brya/variants/craaskov/overridetree.cb
+++ b/src/mainboard/google/brya/variants/craaskov/overridetree.cb
@@ -23,6 +23,15 @@
 		.vnn_icc_max_ma = 500,
 	}"
 
+	register "serial_io_i2c_mode" = "{
+		[PchSerialIoIndexI2C0] = PchSerialIoPci,
+		[PchSerialIoIndexI2C1] = PchSerialIoPci,
+		[PchSerialIoIndexI2C2] = PchSerialIoDisabled,
+		[PchSerialIoIndexI2C3] = PchSerialIoPci,
+		[PchSerialIoIndexI2C4] = PchSerialIoDisabled,
+		[PchSerialIoIndexI2C5] = PchSerialIoPci,
+	}"
+
 	# Intel Common SoC Config
 	#+-------------------+---------------------------+
 	#| Field             |  Value                    |
@@ -31,7 +40,6 @@
 	#|                   | required to set up a BAR  |
 	#|                   | for TPM communication     |
 	#| I2C1              | Touchscreen               |
-	#| I2C2              | TOF/ALS                   |
 	#| I2C3              | Audio                     |
 	#| I2C5              | Trackpad                  |
 	#+-------------------+---------------------------+
@@ -55,15 +63,6 @@
 				.sda_hold = 7,
 			}
 		},
-		.i2c[2] = {
-			.speed = I2C_SPEED_FAST,
-			.speed_config[0] = {
-				.speed = I2C_SPEED_FAST,
-				.scl_lcnt = 158,
-				.scl_hcnt = 79,
-				.sda_hold = 7,
-			}
-		},
 		.i2c[3] = {
 			.speed = I2C_SPEED_FAST,
 			.speed_config[0] = {