arch/x86: Drop CBMEM_TOP_BACKUP
Code has evolved such that there seems to be little
use for global definition of cbmem_top_chipset().
Even for AMD we had three different implementations.
Change-Id: I44805aa49eab526b940e57bd51cd1d9ae0377b4b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43326
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/common/block/acpimmio/biosram.c b/src/soc/amd/common/block/acpimmio/biosram.c
index b01c196..06bbed9 100644
--- a/src/soc/amd/common/block/acpimmio/biosram.c
+++ b/src/soc/amd/common/block/acpimmio/biosram.c
@@ -2,7 +2,6 @@
#include <amdblocks/acpimmio.h>
#include <amdblocks/biosram.h>
-#include <cbmem.h>
#include <device/mmio.h>
#include <stdint.h>
diff --git a/src/soc/amd/common/block/include/amdblocks/biosram.h b/src/soc/amd/common/block/include/amdblocks/biosram.h
index 39ce112..226fc17 100644
--- a/src/soc/amd/common/block/include/amdblocks/biosram.h
+++ b/src/soc/amd/common/block/include/amdblocks/biosram.h
@@ -5,6 +5,14 @@
#include <stdint.h>
+/* Any new chipset and board must implement cbmem_top() for both
+ * romstage and ramstage to support early features like COLLECT_TIMESTAMPS
+ * and CBMEM_CONSOLE. With AMD it is necessary to have cbmem_top()
+ * value stored in nvram to enable early recovery on S3 path.
+ */
+void backup_top_of_low_cacheable(uintptr_t ramtop);
+uintptr_t restore_top_of_low_cacheable(void);
+
/* Returns the bootblock C entry point for APs */
void *get_ap_entry_ptr(void);
/* Used by BSP to store the bootblock entry point for APs */
diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c
index de9144c..ff52fbd 100644
--- a/src/soc/amd/common/block/pi/agesawrapper.c
+++ b/src/soc/amd/common/block/pi/agesawrapper.c
@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h>
-#include <cbmem.h>
#include <console/console.h>
#include <timestamp.h>
#include <amdblocks/biosram.h>
diff --git a/src/soc/amd/stoneyridge/memmap.c b/src/soc/amd/stoneyridge/memmap.c
index 9807905..67a4319 100644
--- a/src/soc/amd/stoneyridge/memmap.c
+++ b/src/soc/amd/stoneyridge/memmap.c
@@ -13,7 +13,7 @@
#include <arch/bert_storage.h>
#include <soc/northbridge.h>
#include <soc/iomap.h>
-#include <amdblocks/acpimmio.h>
+#include <amdblocks/biosram.h>
#if CONFIG(ACPI_BERT)
#if CONFIG_SMM_TSEG_SIZE == 0x0