The number of cores is got by reading the bit 15,13,12 of [0,24,3,e8].
The bit 15 seems to be a new feature when CPU started to have more than 4
cores.
Zheng
Yes, this was add for revD.
Marc Jones
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5684 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/northbridge/amd/amdht/h3ncmn.c b/src/northbridge/amd/amdht/h3ncmn.c
index 5222e0f..1fcb07d 100644
--- a/src/northbridge/amd/amdht/h3ncmn.c
+++ b/src/northbridge/amd/amdht/h3ncmn.c
@@ -555,16 +555,17 @@
u8 i;
ASSERT((node < nb->maxNodes));
- /* Read CmpCap */
+ /* Read CmpCap [2][1:0] */
AmdPCIReadBits(MAKE_SBDFO(makePCISegmentFromNode(node),
makePCIBusFromNode(node),
makePCIDeviceFromNode(node),
CPU_NB_FUNC_03,
REG_NB_CAPABILITY_3XE8),
- 13, 12, &temp);
+ 15, 12, &temp);
+ /* bits[15,13,12] specify the cores */
/* Support Downcoring */
- cores = temp + 1;
+ cores = ((temp & 8) >> 1) + (temp & 3) + 1;
AmdPCIReadBits (MAKE_SBDFO(makePCISegmentFromNode(node),
makePCIBusFromNode(node),
makePCIDeviceFromNode(node),