soc/amd: introduce and use get_uvolts_from_vid for SVI2 and SVI3
Instead of implementing the conversion from the raw serial voltage ID
value to the voltage in microvolts in every SoC, introduce the
SOC_AMD_COMMON_BLOCK_SVI[2,3] Kconfig options for the SoC to select the
correct version, implement get_uvolts_from_vid for both cases and only
include the selected implementation in the build.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I344641217e6e4654fd281d434b88e346e0482f57
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73995
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 325a65a..746b4fb 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -59,6 +59,7 @@
select SOC_AMD_COMMON_BLOCK_SMU
select SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY
select SOC_AMD_COMMON_BLOCK_SPI
+ select SOC_AMD_COMMON_BLOCK_SVI2
select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
select SOC_AMD_COMMON_BLOCK_UART
select SOC_AMD_COMMON_BLOCK_UCODE
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c
index b7d954d..d1232e3 100644
--- a/src/soc/amd/picasso/acpi.c
+++ b/src/soc/amd/picasso/acpi.c
@@ -150,13 +150,7 @@
current_divisor = pstate_reg.idd_div;
/* Voltage */
- if ((core_vid >= 0xF8) && (core_vid <= 0xFF)) {
- /* Voltage off for VID codes 0xF8 to 0xFF */
- voltage_in_uvolts = 0;
- } else {
- voltage_in_uvolts = SERIAL_VID_2_MAX_MICROVOLTS -
- (SERIAL_VID_2_DECODE_MICROVOLTS * core_vid);
- }
+ voltage_in_uvolts = get_uvolts_from_vid(core_vid);
/* Power in mW */
power_in_mw = (voltage_in_uvolts) / 10 * current_value_amps;
diff --git a/src/soc/amd/picasso/include/soc/msr.h b/src/soc/amd/picasso/include/soc/msr.h
index 2f02372..0747b84 100644
--- a/src/soc/amd/picasso/include/soc/msr.h
+++ b/src/soc/amd/picasso/include/soc/msr.h
@@ -26,8 +26,4 @@
#define PSTATE_DEF_FREQ_DIV_MAX 0x3E
#define PSTATE_DEF_CORE_FREQ_BASE 25
-/* Value defined in Serial VID Interface 2.0 spec (#48022, NDA only) */
-#define SERIAL_VID_2_DECODE_MICROVOLTS 6250
-#define SERIAL_VID_2_MAX_MICROVOLTS 1550000L
-
#endif /* AMD_PICASSO_MSR_H */