soc/amd: introduce and use get_uvolts_from_vid for SVI2 and SVI3

Instead of implementing the conversion from the raw serial voltage ID
value to the voltage in microvolts in every SoC, introduce the
SOC_AMD_COMMON_BLOCK_SVI[2,3] Kconfig options for the SoC to select the
correct version, implement get_uvolts_from_vid for both cases and only
include the selected implementation in the build.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I344641217e6e4654fd281d434b88e346e0482f57
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73995
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/phoenix/Kconfig b/src/soc/amd/phoenix/Kconfig
index cb54306..96a287c 100644
--- a/src/soc/amd/phoenix/Kconfig
+++ b/src/soc/amd/phoenix/Kconfig
@@ -69,6 +69,7 @@
 	select SOC_AMD_COMMON_BLOCK_SMU
 	select SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY
 	select SOC_AMD_COMMON_BLOCK_SPI
+	select SOC_AMD_COMMON_BLOCK_SVI3
 	select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
 	select SOC_AMD_COMMON_BLOCK_UART
 	select SOC_AMD_COMMON_BLOCK_UCODE
diff --git a/src/soc/amd/phoenix/acpi.c b/src/soc/amd/phoenix/acpi.c
index e3996ba..e147e88 100644
--- a/src/soc/amd/phoenix/acpi.c
+++ b/src/soc/amd/phoenix/acpi.c
@@ -149,13 +149,7 @@
 	current_divisor = pstate_reg.idd_div;
 
 	/* Voltage */
-	if (core_vid == 0x00) {
-		/* Voltage off for VID code 0x00 */
-		voltage_in_uvolts = 0;
-	} else {
-		voltage_in_uvolts = SERIAL_VID_3_BASE_MICROVOLTS +
-					(SERIAL_VID_3_DECODE_MICROVOLTS * core_vid);
-	}
+	voltage_in_uvolts = get_uvolts_from_vid(core_vid);
 
 	/* Power in mW */
 	power_in_mw = (voltage_in_uvolts) / 10 * current_value_amps;
diff --git a/src/soc/amd/phoenix/include/soc/msr.h b/src/soc/amd/phoenix/include/soc/msr.h
index 8eee068..173ee09 100644
--- a/src/soc/amd/phoenix/include/soc/msr.h
+++ b/src/soc/amd/phoenix/include/soc/msr.h
@@ -25,10 +25,6 @@
 #define PSTATE_DEF_FREQ_DIV_MAX		0x3E
 #define PSTATE_DEF_CORE_FREQ_BASE	25
 
-/* Value defined in Serial VID Interface 3.0 spec (#56413, NDA only) */
-#define  SERIAL_VID_3_DECODE_MICROVOLTS	5000
-#define  SERIAL_VID_3_BASE_MICROVOLTS	245000L
-
 #define MSR_CPPC_CAPABILITY_1				0xc00102b0
 #define SHIFT_CPPC_CAPABILITY_1_HIGHEST_PERF		24
 #define SHIFT_CPPC_CAPABILITY_1_NOMINAL_PERF		16