nb/intel/i945/rcven.c: Correct comment
The offset between registers has to be between different channels.
Change-Id: Ic6d959c31c78073a3ecbf7a17dfb73ac36340599
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42284
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
diff --git a/src/northbridge/intel/i945/rcven.c b/src/northbridge/intel/i945/rcven.c
index ea37d9c..0b58904 100644
--- a/src/northbridge/intel/i945/rcven.c
+++ b/src/northbridge/intel/i945/rcven.c
@@ -253,7 +253,7 @@
}
/**
- * Here we use a trick. The RCVEN channel 0 registers are all at an
+ * Here we use a trick. The RCVEN channel 1 registers are all at an
* offset of 0x80 to the channel 0 registers. We don't want to waste
* a lot of if ()s so let's just pass 0 or 0x80 for the channel offset.
*/