AGESA: Move romstage-ramstage splitline

In AGESA specification AmdInitEnv() is to be called once
host memory allocator has started. In coreboot context this
could mean either availability of CBMEM or malloc heap.

As for AmdS3LateRestore(), there is no requirement to have
it run as part of the romstage either.

Change-Id: Icc8d97b82df89e2480e601d5c2e094de0365b0a5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/18888
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
diff --git a/src/northbridge/amd/agesa/state_machine.c b/src/northbridge/amd/agesa/state_machine.c
index 0406eee..6892990 100644
--- a/src/northbridge/amd/agesa/state_machine.c
+++ b/src/northbridge/amd/agesa/state_machine.c
@@ -19,6 +19,7 @@
 
 #include <arch/acpi.h>
 #include <bootstate.h>
+#include <cbmem.h>
 
 #include <northbridge/amd/agesa/state_machine.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
@@ -122,7 +123,9 @@
 			platform_AfterInitResume(cb, param);
 			break;
 		}
+#endif
 
+#if ENV_RAMSTAGE
 		case AMD_INIT_ENV:
 		{
 			AMD_ENV_PARAMS *param = (void *)StdHeader;
@@ -141,8 +144,7 @@
 			platform_AfterS3LateRestore(cb, param);
 			break;
 		}
-#endif
-#if ENV_RAMSTAGE
+
 		case AMD_INIT_MID:
 		{
 			AMD_MID_PARAMS *param = (void *)StdHeader;
@@ -214,6 +216,7 @@
 	AMD_INTERFACE_PARAMS aip;
 	union {
 		AMD_RESET_PARAMS reset;
+		AMD_S3LATE_PARAMS s3late;
 	} agesa_params;
 	void *buf = NULL;
 	size_t len = 0;
@@ -228,7 +231,7 @@
 	aip.StdHeader = cb->StdHeader;
 
 	/* For these calls, heap is not available. */
-	if (func == AMD_INIT_RESET) {
+	if (func == AMD_INIT_RESET || func == AMD_S3LATE_RESTORE) {
 		buf = (void *) &agesa_params;
 		len = sizeof(agesa_params);
 		memcpy(buf, &cb->StdHeader, sizeof(cb->StdHeader));
@@ -261,6 +264,15 @@
 	struct sysinfo *cb = arg;
 
 	agesa_set_interface(cb);
+
+	if (!acpi_is_wakeup_s3())
+		agesa_execute_state(cb, AMD_INIT_ENV);
+	else {
+		/* We need HEAP from CBMEM early. */
+		if (IS_ENABLED(CONFIG_LATE_CBMEM_INIT))
+			cbmem_initialize();
+		agesa_execute_state(cb, AMD_S3LATE_RESTORE);
+	}
 }
 
 void sb_After_Pci_Restore_Init(void);