Remove various .c #includes from Intel i810/i82801ax/i82801bx boards.
This is pretty much the same mechanism as in r5929.
- Use 'romstage-y' to turn i82801ax_early_smbus.c and i82801bx_early_smbus.c
into distinct compilation units, and don't #include the files anymore
in romstage.c files.
- Ditto for northbridge/intel/i82810/raminit.c, and
northbridge/intel/i82810/debug.c.
- Add various header files which are now needed, drop unused includes.
- Make functions that need to be visible non-static.
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5951 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/mainboard/asus/mew-am/romstage.c b/src/mainboard/asus/mew-am/romstage.c
index 402789c..aad5ed3 100644
--- a/src/mainboard/asus/mew-am/romstage.c
+++ b/src/mainboard/asus/mew-am/romstage.c
@@ -23,22 +23,20 @@
#include <device/pci_def.h>
#include <arch/io.h>
#include <device/pnp_def.h>
-#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <console/console.h>
-#include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"
+#include "southbridge/intel/i82801ax/i82801ax.h"
#include "northbridge/intel/i82810/raminit.h"
-#include "lib/debug.c"
#include "pc80/udelay_io.c"
-#include "lib/delay.c"
#include "cpu/x86/bist.h"
#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
-#include "northbridge/intel/i82810/raminit.c"
-/* #include "northbridge/intel/i82810/debug.c" */
#include <lib.h>
#define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
+void enable_smbus(void);
+int smbus_read_byte(u8 device, u8 address);
+
void main(unsigned long bist)
{
smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
@@ -46,7 +44,7 @@
console_init();
report_bist_failure(bist);
enable_smbus();
- /* dump_spd_registers(); */
+ dump_spd_registers();
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
diff --git a/src/mainboard/asus/mew-vm/romstage.c b/src/mainboard/asus/mew-vm/romstage.c
index e4c551e..87aca12 100644
--- a/src/mainboard/asus/mew-vm/romstage.c
+++ b/src/mainboard/asus/mew-vm/romstage.c
@@ -22,23 +22,21 @@
#include <device/pci_def.h>
#include <arch/io.h>
#include <device/pnp_def.h>
-#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <stdlib.h>
#include <console/console.h>
#include "superio/smsc/lpc47b272/lpc47b272_early_serial.c"
#include "northbridge/intel/i82810/raminit.h"
#include "cpu/x86/bist.h"
-#include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"
-#include "lib/debug.c"
+#include "southbridge/intel/i82801ax/i82801ax.h"
#include "pc80/udelay_io.c"
-#include "lib/delay.c"
-#include "northbridge/intel/i82810/raminit.c"
-#include "northbridge/intel/i82810/debug.c"
#include <lib.h>
#define SERIAL_DEV PNP_DEV(0x2e, LPC47B272_SP1)
+void enable_smbus(void);
+int smbus_read_byte(u8 device, u8 address);
+
void main(unsigned long bist)
{
lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/ecs/p6iwp-fe/romstage.c b/src/mainboard/ecs/p6iwp-fe/romstage.c
index b899d93..a3c1f20 100644
--- a/src/mainboard/ecs/p6iwp-fe/romstage.c
+++ b/src/mainboard/ecs/p6iwp-fe/romstage.c
@@ -24,20 +24,18 @@
#include <device/pci_def.h>
#include <arch/io.h>
#include <device/pnp_def.h>
-#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <console/console.h>
-#include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"
+#include "southbridge/intel/i82801ax/i82801ax.h"
#include "northbridge/intel/i82810/raminit.h"
-#include "lib/debug.c"
#include "pc80/udelay_io.c"
-#include "lib/delay.c"
#include "cpu/x86/bist.h"
#include "superio/ite/it8712f/it8712f_early_serial.c"
-#include "northbridge/intel/i82810/raminit.c"
-#include "northbridge/intel/i82810/debug.c"
#include <lib.h>
+void enable_smbus(void);
+int smbus_read_byte(u8 device, u8 address);
+
void main(unsigned long bist)
{
it8712f_24mhz_clkin();
diff --git a/src/mainboard/hp/e_vectra_p2706t/romstage.c b/src/mainboard/hp/e_vectra_p2706t/romstage.c
index 39cb266..776b841 100644
--- a/src/mainboard/hp/e_vectra_p2706t/romstage.c
+++ b/src/mainboard/hp/e_vectra_p2706t/romstage.c
@@ -31,15 +31,16 @@
/* TODO: It's i810E actually! */
#include "northbridge/intel/i82810/raminit.h"
#include "cpu/x86/bist.h"
-#include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"
+#include "southbridge/intel/i82801ax/i82801ax.h"
#include "pc80/udelay_io.c"
-#include "lib/debug.c"
-#include "northbridge/intel/i82810/raminit.c"
#include <lib.h>
/* TODO: It's a PC87364 actually! */
#define SERIAL_DEV PNP_DEV(0x2e, PC87360_SP1)
+void enable_smbus(void);
+int smbus_read_byte(u8 device, u8 address);
+
void main(unsigned long bist)
{
/* TODO: It's a PC87364 actually! */
@@ -48,7 +49,7 @@
console_init();
enable_smbus();
report_bist_failure(bist);
- /* dump_spd_registers(); */
+ dump_spd_registers();
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
diff --git a/src/mainboard/intel/d810e2cb/romstage.c b/src/mainboard/intel/d810e2cb/romstage.c
index 94f1170..fcdbb31 100644
--- a/src/mainboard/intel/d810e2cb/romstage.c
+++ b/src/mainboard/intel/d810e2cb/romstage.c
@@ -23,24 +23,21 @@
#include <device/pci_def.h>
#include <arch/io.h>
#include <device/pnp_def.h>
-#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <console/console.h>
#include "southbridge/intel/i82801bx/i82801bx.h"
-#include "southbridge/intel/i82801bx/i82801bx_early_smbus.c"
#include "northbridge/intel/i82810/raminit.h"
-#include "lib/debug.c"
#include "pc80/udelay_io.c"
-#include "lib/delay.c"
#include "cpu/x86/bist.h"
#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
#include "gpio.c"
-#include "northbridge/intel/i82810/raminit.c"
-/* #include "northbridge/intel/i82810/debug.c" */
#include <lib.h>
#define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
+void enable_smbus(void);
+int smbus_read_byte(u8 device, u8 address);
+
void main(unsigned long bist)
{
/* Set southbridge and Super I/O GPIOs. */
@@ -52,7 +49,7 @@
report_bist_failure(bist);
enable_smbus();
- /* dump_spd_registers(); */
+ dump_spd_registers();
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
diff --git a/src/mainboard/mitac/6513wu/romstage.c b/src/mainboard/mitac/6513wu/romstage.c
index 1a2d7c4..a46e567 100644
--- a/src/mainboard/mitac/6513wu/romstage.c
+++ b/src/mainboard/mitac/6513wu/romstage.c
@@ -23,22 +23,21 @@
#include <device/pci_def.h>
#include <arch/io.h>
#include <device/pnp_def.h>
-#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <console/console.h>
-#include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"
+#include "southbridge/intel/i82801ax/i82801ax.h"
#include "northbridge/intel/i82810/raminit.h"
-#include "lib/debug.c"
#include "pc80/udelay_io.c"
#include "lib/delay.c"
#include "cpu/x86/bist.h"
#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
-#include "northbridge/intel/i82810/raminit.c"
-/* #include "northbridge/intel/i82810/debug.c" */
#include <lib.h>
#define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
+void enable_smbus(void);
+int smbus_read_byte(u8 device, u8 address);
+
void main(unsigned long bist)
{
smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
@@ -47,7 +46,7 @@
report_bist_failure(bist);
enable_smbus();
- /* dump_spd_registers(); */
+ dump_spd_registers();
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
diff --git a/src/mainboard/msi/ms6178/romstage.c b/src/mainboard/msi/ms6178/romstage.c
index 5aab983..30bddde 100644
--- a/src/mainboard/msi/ms6178/romstage.c
+++ b/src/mainboard/msi/ms6178/romstage.c
@@ -22,21 +22,21 @@
#include <device/pci_def.h>
#include <arch/io.h>
#include <device/pnp_def.h>
-#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <stdlib.h>
#include <console/console.h>
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "northbridge/intel/i82810/raminit.h"
#include "cpu/x86/bist.h"
-#include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"
+#include "southbridge/intel/i82801ax/i82801ax.h"
#include "pc80/udelay_io.c"
-#include "lib/debug.c"
-#include "northbridge/intel/i82810/raminit.c"
#include <lib.h>
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
+void enable_smbus(void);
+int smbus_read_byte(u8 device, u8 address);
+
void main(unsigned long bist)
{
/* FIXME */
@@ -48,12 +48,9 @@
uart_init();
console_init();
-
enable_smbus();
-
report_bist_failure(bist);
-
- /* dump_spd_registers(); */
+ dump_spd_registers();
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
diff --git a/src/mainboard/nec/powermate2000/romstage.c b/src/mainboard/nec/powermate2000/romstage.c
index 8f71cc9..0444b08 100644
--- a/src/mainboard/nec/powermate2000/romstage.c
+++ b/src/mainboard/nec/powermate2000/romstage.c
@@ -22,20 +22,21 @@
#include <device/pci_def.h>
#include <arch/io.h>
#include <device/pnp_def.h>
-#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <stdlib.h>
#include <console/console.h>
#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
#include "northbridge/intel/i82810/raminit.h"
#include "cpu/x86/bist.h"
-#include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"
+#include "southbridge/intel/i82801ax/i82801ax.h"
#include "pc80/udelay_io.c"
-#include "northbridge/intel/i82810/raminit.c"
#include <lib.h>
#define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
+void enable_smbus(void);
+int smbus_read_byte(u8 device, u8 address);
+
void main(unsigned long bist)
{
smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
@@ -43,7 +44,7 @@
console_init();
enable_smbus();
report_bist_failure(bist);
- /* dump_spd_registers(); */
+ dump_spd_registers();
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();