commit 20fe2ee50274b583c8594f5253ae0db0263b24af
author Yu-Ping Wu <yupingso@chromium.org> Thu Nov 25 14:43:13 2021 +0800
committer Felix Held <felix-coreboot@felixheld.de> Fri Nov 26 11:30:12 2021 +0000
tree 6dd26d4b54ac36b7b646eba9a7add719e497b302
parent 8422740933962b27fc6678a2dff5e9bc31e66dc1

soc/mediatek/i2c: Return negative values on error

Following coreboot's convention, return negative error codes from
platform_i2c_transfer().

BUG=none
TEST=emerge-asurada coreboot
BRANCH=none

Change-Id: I955b9aae11e20d75fac414d15714330e364dad2f
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59539
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

src/soc/mediatek/common/i2c.c

diff --git a/src/soc/mediatek/common/i2c.c b/src/soc/mediatek/common/i2c.c
index b9b02cd..c47e08e 100644
--- a/src/soc/mediatek/common/i2c.c
+++ b/src/soc/mediatek/common/i2c.c
@@ -106,10 +106,10 @@
 	mtk_i2c_dump_more_info(regs);
 }
 
-static uint32_t mtk_i2c_transfer(uint8_t bus, struct i2c_msg *seg,
-				 enum i2c_modes mode)
+static int mtk_i2c_transfer(uint8_t bus, struct i2c_msg *seg,
+			    enum i2c_modes mode)
 {
-	uint32_t ret_code = I2C_OK;
+	int ret = I2C_OK;
 	uint16_t status;
 	uint16_t dma_sync = 0;
 	uint32_t time_out_val = 0;
@@ -245,23 +245,23 @@
 	while (1) {
 		status = read32(&regs->intr_stat);
 		if (status & I2C_HS_NACKERR) {
-			ret_code = I2C_TRANSFER_FAIL_HS_NACKERR;
+			ret = I2C_TRANSFER_FAIL_HS_NACKERR;
 			printk(BIOS_ERR, "[i2c%d] transfer NACK error\n", bus);
 			mtk_i2c_dump_info(regs);
 			break;
 		} else if (status & I2C_ACKERR) {
-			ret_code = I2C_TRANSFER_FAIL_ACKERR;
+			ret = I2C_TRANSFER_FAIL_ACKERR;
 			printk(BIOS_ERR, "[i2c%d] transfer ACK error\n", bus);
 			mtk_i2c_dump_info(regs);
 			break;
 		} else if (status & I2C_TRANSAC_COMP) {
-			ret_code = I2C_OK;
+			ret = I2C_OK;
 			memcpy(read_buffer, _dma_coherent, read_len);
 			break;
 		}
 
 		if (stopwatch_expired(&sw)) {
-			ret_code = I2C_TRANSFER_FAIL_TIMEOUT;
+			ret = I2C_TRANSFER_FAIL_TIMEOUT;
 			printk(BIOS_ERR, "[i2c%d] transfer timeout:%d\n", bus,
 			       time_out_val);
 			mtk_i2c_dump_info(regs);
@@ -279,7 +279,7 @@
 	/* reset the i2c controller for next i2c transfer. */
 	i2c_hw_reset(bus);
 
-	return ret_code;
+	return ret;
 }
 
 static bool mtk_i2c_should_combine(struct i2c_msg *seg, int left_count)
@@ -301,7 +301,7 @@
 int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segments,
 			  int seg_count)
 {
-	int ret = 0;
+	int ret;
 	int i;
 	int mode;
 
@@ -314,15 +314,14 @@
 		}
 
 		ret = mtk_i2c_transfer(bus, &segments[i], mode);
-
-		if (ret)
-			break;
+		if (ret < 0)
+			return ret;
 
 		if (mode == I2C_WRITE_READ_MODE)
 			i++;
 	}
 
-	return ret;
+	return 0;
 }
 
 /*

src/soc/mediatek/common/include/soc/i2c_common.h

diff --git a/src/soc/mediatek/common/include/soc/i2c_common.h b/src/soc/mediatek/common/include/soc/i2c_common.h
index 7df1ac5..4f4449c 100644
--- a/src/soc/mediatek/common/include/soc/i2c_common.h
+++ b/src/soc/mediatek/common/include/soc/i2c_common.h
@@ -88,12 +88,12 @@
 /* I2C Status Code */
 enum {
 	I2C_OK = 0x0000,
-	I2C_SET_SPEED_FAIL_OVER_SPEED = 0xA001,
-	I2C_TRANSFER_INVALID_LENGTH = 0xA002,
-	I2C_TRANSFER_FAIL_HS_NACKERR = 0xA003,
-	I2C_TRANSFER_FAIL_ACKERR = 0xA004,
-	I2C_TRANSFER_FAIL_TIMEOUT = 0xA005,
-	I2C_TRANSFER_INVALID_ARGUMENT = 0xA006
+	I2C_SET_SPEED_FAIL_OVER_SPEED = -0xA001,
+	I2C_TRANSFER_INVALID_LENGTH = -0xA002,
+	I2C_TRANSFER_FAIL_HS_NACKERR = -0xA003,
+	I2C_TRANSFER_FAIL_ACKERR = -0xA004,
+	I2C_TRANSFER_FAIL_TIMEOUT = -0xA005,
+	I2C_TRANSFER_INVALID_ARGUMENT = -0xA006,
 };
 
 struct mtk_i2c_ac_timing {