| commit | 20ee22c2ccf344b66f91b5c2e739f2d4c1dcfd8f | [log] [tgz] |
|---|---|---|
| author | Cliff Huang <cliff.huang@intel.com> | Fri Feb 11 18:08:32 2022 -0800 |
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | Mon Mar 07 15:47:52 2022 +0000 |
| tree | 4c7f755133fa86d91b1eea0af77e4d71fad98344 | |
| parent | 3fe7653c33e259bf95f5a575132669352411da2d [diff] |
mb/google/brya: Move ACPI MPTS method from DSDT to SSDT for Brya and Redrix
This change is to move MPTS (Mainboard Prepare To Sleep) method from
wwan_power.asl to SSDT.
MPTS is mainboard-specific method, while wwan_power.asl is meant for
WWAN from its name.
Having fixed MPTS method (i.e. DSDT) can not cover the case where device
only presents and certain CBI bit(s) is(are) set.
In Redrix and Brya, there are SKUs with or without 5G, 4G device. For
those with 4G, MPTS method should be different. For those with no WWAN
device, no MPTS is needed.
Having MPTS generating in SSDT also eliminates the need for introducing
Kconfig flags to support different devices in the future.
MPTS method is created inside mainboard_fill_ssdt function in which the
corresponding variant function is called.
This will generate the following for the mainboard:
Scope (\_SB)
{
Method (MPTS, 1, Serialized)
{
Local0 = \_SB.PCI0.RP01.RTD3._STA ()
If ((Local0 == One))
{
\_SB.PCI0.RP01.PXSX.DPTS (Arg0)
}
}
}
Test:
Check the SSDT for MPTS method under \_SB after boot to OS
Use shutdown command and check the GPIO pins from logical analyzer
Signed-off-by: Cliff Huang <cliff.huang@intel.com>
Change-Id: I0f0b7638e90a7862173fca99305398bb250373e9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61887
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
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See https://www.coreboot.org/Payloads for a list of supported payloads.
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For details please consult:
ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).Optional:
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