commit 1ec23c9b52ed95bfcc71ed0637cca1c302e7a815
author Kyösti Mälkki <kyosti.malkki@gmail.com> Fri May 29 06:18:18 2015 +0300
committer Kyösti Mälkki <kyosti.malkki@gmail.com> Fri May 29 17:05:08 2015 +0200
tree f26d1294f6bdb575bc70f0b05afd58a20b7be9fb
parent 315a7b83836954917e993f5ce59b29cfe7c99470

intel/broadwell: Hide use of acpi_slp_type

Change-Id: I106779571df5168ec358ad1cc4dc4195639a7a7d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/10359
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/soc/intel/broadwell/igd.c

diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c
index 93c9e3c..987d56c 100644
--- a/src/soc/intel/broadwell/igd.c
+++ b/src/soc/intel/broadwell/igd.c
@@ -489,7 +489,7 @@
 		return;
 
 	/* Wait for any configured pre-graphics delay */
-	if (acpi_slp_type != SLEEP_STATE_S3) {
+	if (!acpi_is_wakeup_s3()) {
 #if IS_ENABLED(CONFIG_CHROMEOS)
 		if (developer_mode_enabled() || recovery_mode_enabled() ||
 		    vboot_wants_oprom())
@@ -542,7 +542,7 @@
 		memset((void *)((u32)fb->base), 0, 64);
 	}
 
-	if (!gfx_get_init_done() && acpi_slp_type != 3) {
+	if (!gfx_get_init_done() && !acpi_is_wakeup_s3()) {
 		/*
 		 * Enable DDI-A if the Option ROM did not execute:
 		 *

src/soc/intel/broadwell/me.c

diff --git a/src/soc/intel/broadwell/me.c b/src/soc/intel/broadwell/me.c
index ecfa1dd..8cd605f 100644
--- a/src/soc/intel/broadwell/me.c
+++ b/src/soc/intel/broadwell/me.c
@@ -1053,13 +1053,11 @@
 
 static void intel_me_enable(device_t dev)
 {
-#if CONFIG_HAVE_ACPI_RESUME
 	/* Avoid talking to the device in S3 path */
-	if (acpi_slp_type == 3) {
+	if (acpi_is_wakeup_s3()) {
 		dev->enabled = 0;
 		pch_disable_devfn(dev);
 	}
-#endif
 }
 
 static struct device_operations device_ops = {

src/soc/intel/broadwell/refcode.c

diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c
index 2fb365d..722669b 100644
--- a/src/soc/intel/broadwell/refcode.c
+++ b/src/soc/intel/broadwell/refcode.c
@@ -32,6 +32,7 @@
 #endif
 #include <soc/pei_data.h>
 #include <soc/pei_wrapper.h>
+#include <soc/pm.h>
 #include <soc/ramstage.h>
 
 static pei_wrapper_entry_t load_refcode_from_cache(void)
@@ -128,7 +129,7 @@
 	mainboard_fill_pei_data(&pei_data);
 	broadwell_fill_pei_data(&pei_data);
 
-	pei_data.boot_mode = acpi_slp_type;
+	pei_data.boot_mode = acpi_is_wakeup_s3() ? SLEEP_STATE_S3 : 0;
 	pei_data.saved_data = (void *) &dummy;
 
 	entry = load_reference_code();