nb/amd/agesa/family15tn: define macros for GNB and IOMMU devices
Follow the example of newer AMD code for Stoneyridge and Picasso.
Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Change-Id: I9c17d4cb4953b28a47483f5d7db308ccc89e9281
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47848
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/northbridge/amd/agesa/family15tn/pci_devs.h b/src/northbridge/amd/agesa/family15tn/pci_devs.h
index 22ce8f5..5613843 100644
--- a/src/northbridge/amd/agesa/family15tn/pci_devs.h
+++ b/src/northbridge/amd/agesa/family15tn/pci_devs.h
@@ -7,6 +7,16 @@
#define BUS0 0
+/* GNB Root Complex */
+#define GNB_DEV 0x0
+#define GNB_FUNC 0
+#define GNB_DEVFN PCI_DEVFN(GNB_DEV, GNB_FUNC)
+
+/* IOMMU */
+#define IOMMU_DEV 0x0
+#define IOMMU_FUNC 2
+#define IOMMU_DEVFN PCI_DEVFN(IOMMU_DEV, IOMMU_FUNC)
+
/* Graphics and Display */
#define GFX_DEV 0x1
#define GFX_FUNC 0