armv8/secmon: Disable and Enable GIC in PSCI path
Disable and enable GIC before switching off a CPU and after bringing
it up back respectively.
BUG=None
BRANCH=None
TEST=Compiles successfully and psci commands work for ryu.
Change-Id: Ib43af60e994e3d072e897a59595775d0b2dcef83
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d5271d731f0a569583c2b32ef6726dadbfa846d3
Original-Change-Id: I672945fcb0ff416008a1aad5ed625cfa91bb9cbd
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/265623
Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9926
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
diff --git a/src/include/gic.h b/src/include/gic.h
index 22c5631..2514420 100644
--- a/src/include/gic.h
+++ b/src/include/gic.h
@@ -24,6 +24,8 @@
/* Initialize the GIC on the currently processor, including GICD and GICC. */
void gic_init(void);
+void gic_disable(void);
+void gic_enable(void);
/* Return a pointer to the base of the GIC distributor mmio region. */
void *gicd_base(void);
@@ -34,6 +36,7 @@
#else /* CONFIG_GIC */
static inline void gic_init(void) {}
+static inline void gic_disable(void) {}
#endif /* CONFIG_GIC */