| commit | 1cfafe25e37d3a396a19bfe524af16284ff41070 | [log] [tgz] |
|---|---|---|
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | Tue Jan 07 12:00:31 2020 +0200 |
| committer | Patrick Georgi <pgeorgi@google.com> | Tue Jan 14 18:13:15 2020 +0000 |
| tree | fa48bc17e9070649105b4ee48ffd7c20700e6332 | |
| parent | 7adc370dc79af1aacd6f811b9b28d01d595da702 [diff] [blame] |
intel/{gm45,x4x},i82801{ix|jx}: Move enable_smbus() call
Change-Id: Idc7631abb550b31af722ccf3b69afdc01fdb616e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38268
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/southbridge/intel/i82801ix/early_init.c b/src/southbridge/intel/i82801ix/early_init.c index 92db7d8..4ce4fbe 100644 --- a/src/southbridge/intel/i82801ix/early_init.c +++ b/src/southbridge/intel/i82801ix/early_init.c
@@ -23,6 +23,9 @@ { const pci_devfn_t d31f0 = PCI_DEV(0, 0x1f, 0); + if (ENV_ROMSTAGE) + enable_smbus(); + /* Set up RCBA. */ pci_write_config32(d31f0, RCBA, (uintptr_t)DEFAULT_RCBA | 1);