device,sb/intel: Move SMBus host controller prototypes
Also change some of the types to match the register widths
of the controller. It is expected that these prototypes
will be used with SMBus host controllers inside AMD chipsets
as well, thus the change of location.
Change-Id: I88fe834f3eee7b7bfeff02f91a1c25bb5aee9b65
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38226
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/southbridge/intel/bd82x6x/early_smbus.c b/src/southbridge/intel/bd82x6x/early_smbus.c
index f570040..61625cc 100644
--- a/src/southbridge/intel/bd82x6x/early_smbus.c
+++ b/src/southbridge/intel/bd82x6x/early_smbus.c
@@ -19,6 +19,7 @@
#include <console/console.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
#include "pch.h"
void enable_smbus(void)
diff --git a/src/southbridge/intel/bd82x6x/smbus.c b/src/southbridge/intel/bd82x6x/smbus.c
index 4fb7539..0a9c175 100644
--- a/src/southbridge/intel/bd82x6x/smbus.c
+++ b/src/southbridge/intel/bd82x6x/smbus.c
@@ -22,6 +22,7 @@
#include <device/pci_ops.h>
#include <arch/io.h>
#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
#include "pch.h"
static void pch_smbus_init(struct device *dev)
diff --git a/src/southbridge/intel/common/smbus.c b/src/southbridge/intel/common/smbus.c
index 962a762..1b005d7 100644
--- a/src/southbridge/intel/common/smbus.c
+++ b/src/southbridge/intel/common/smbus.c
@@ -19,6 +19,7 @@
#include <arch/io.h>
#include <console/console.h>
#include <device/smbus_def.h>
+#include <device/smbus_host.h>
#include <types.h>
#include "smbus.h"
@@ -332,30 +333,27 @@
return bytes;
}
-int do_smbus_read_byte(unsigned int smbus_base, u8 device, unsigned int address)
+int do_smbus_read_byte(uintptr_t smbus_base, u8 device, u8 address)
{
return smbus_read_cmd(smbus_base, I801_BYTE_DATA, device, address);
}
-int do_smbus_read_word(unsigned int smbus_base, u8 device, unsigned int address)
+int do_smbus_read_word(uintptr_t smbus_base, u8 device, u8 address)
{
return smbus_read_cmd(smbus_base, I801_WORD_DATA, device, address);
}
-int do_smbus_write_byte(unsigned int smbus_base, u8 device, unsigned int address,
- unsigned int data)
+int do_smbus_write_byte(uintptr_t smbus_base, u8 device, u8 address, u8 data)
{
return smbus_write_cmd(smbus_base, I801_BYTE_DATA, device, address, data);
}
-int do_smbus_write_word(unsigned int smbus_base, u8 device, unsigned int address,
- unsigned int data)
+int do_smbus_write_word(uintptr_t smbus_base, u8 device, u8 address, u16 data)
{
return smbus_write_cmd(smbus_base, I801_WORD_DATA, device, address, data);
}
-int do_smbus_block_read(unsigned int smbus_base, u8 device, u8 cmd,
- unsigned int max_bytes, u8 *buf)
+int do_smbus_block_read(uintptr_t smbus_base, u8 device, u8 cmd, size_t max_bytes, u8 *buf)
{
int ret, slave_bytes;
@@ -382,8 +380,7 @@
return ret;
}
-int do_smbus_block_write(unsigned int smbus_base, u8 device, u8 cmd,
- const unsigned int bytes, const u8 *buf)
+int do_smbus_block_write(uintptr_t smbus_base, u8 device, u8 cmd, const size_t bytes, const u8 *buf)
{
int ret;
@@ -418,8 +415,7 @@
return 1;
}
-int do_i2c_eeprom_read(unsigned int smbus_base, u8 device,
- unsigned int offset, const unsigned int bytes, u8 *buf)
+int do_i2c_eeprom_read(uintptr_t smbus_base, u8 device, u8 offset, const size_t bytes, u8 *buf)
{
int ret;
@@ -456,8 +452,7 @@
* The caller is responsible of settings HOSTC I2C_EN bit prior to making this
* call!
*/
-int do_i2c_block_write(unsigned int smbus_base, u8 device,
- unsigned int bytes, u8 *buf)
+int do_i2c_block_write(uintptr_t smbus_base, u8 device, size_t bytes, u8 *buf)
{
u8 cmd;
int ret;
diff --git a/src/southbridge/intel/common/smbus.h b/src/southbridge/intel/common/smbus.h
index c70a3ee..20443e1 100644
--- a/src/southbridge/intel/common/smbus.h
+++ b/src/southbridge/intel/common/smbus.h
@@ -32,22 +32,4 @@
#define SMBUS_PIN_CTL 0xf
#define SMBSLVCMD 0x11
-int do_smbus_read_byte(unsigned int smbus_base, u8 device,
- unsigned int address);
-int do_smbus_write_byte(unsigned int smbus_base, u8 device,
- unsigned int address, unsigned int data);
-int do_smbus_read_word(unsigned int smbus_base, u8 device,
- unsigned int address);
-int do_smbus_write_word(unsigned int smbus_base, u8 device,
- unsigned int address, unsigned int data);
-
-int do_smbus_block_read(unsigned int smbus_base, u8 device,
- u8 cmd, unsigned int max_bytes, u8 *buf);
-int do_smbus_block_write(unsigned int smbus_base, u8 device,
- u8 cmd, unsigned int bytes, const u8 *buf);
-/* Only since ICH5 */
-int do_i2c_eeprom_read(unsigned int smbus_base, u8 device,
- unsigned int offset, unsigned int bytes, u8 *buf);
-int do_i2c_block_write(unsigned int smbus_base, u8 device,
- unsigned int bytes, u8 *buf);
#endif
diff --git a/src/southbridge/intel/i82371eb/early_smbus.c b/src/southbridge/intel/i82371eb/early_smbus.c
index b8b6dba..4168a05 100644
--- a/src/southbridge/intel/i82371eb/early_smbus.c
+++ b/src/southbridge/intel/i82371eb/early_smbus.c
@@ -21,6 +21,7 @@
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
#include "i82371eb.h"
void enable_smbus(void)
diff --git a/src/southbridge/intel/i82371eb/smbus.c b/src/southbridge/intel/i82371eb/smbus.c
index 36a9f56..9d71074 100644
--- a/src/southbridge/intel/i82371eb/smbus.c
+++ b/src/southbridge/intel/i82371eb/smbus.c
@@ -25,7 +25,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/smbus.h>
-#include <southbridge/intel/common/smbus.h>
#include "chip.h"
#include "i82371eb.h"
diff --git a/src/southbridge/intel/i82801dx/early_smbus.c b/src/southbridge/intel/i82801dx/early_smbus.c
index 83fd9a1..5e82ded 100644
--- a/src/southbridge/intel/i82801dx/early_smbus.c
+++ b/src/southbridge/intel/i82801dx/early_smbus.c
@@ -19,6 +19,7 @@
#include <device/pci_def.h>
#include <console/console.h>
#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
#include "i82801dx.h"
diff --git a/src/southbridge/intel/i82801gx/early_smbus.c b/src/southbridge/intel/i82801gx/early_smbus.c
index e970937..49056eb 100644
--- a/src/southbridge/intel/i82801gx/early_smbus.c
+++ b/src/southbridge/intel/i82801gx/early_smbus.c
@@ -19,6 +19,7 @@
#include <console/console.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
#include "i82801gx.h"
void enable_smbus(void)
diff --git a/src/southbridge/intel/i82801gx/smbus.c b/src/southbridge/intel/i82801gx/smbus.c
index b2341a1..9261690 100644
--- a/src/southbridge/intel/i82801gx/smbus.c
+++ b/src/southbridge/intel/i82801gx/smbus.c
@@ -19,7 +19,7 @@
#include <device/smbus.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
#include "i82801gx.h"
static int lsmbus_read_byte(struct device *dev, u8 address)
diff --git a/src/southbridge/intel/i82801ix/early_smbus.c b/src/southbridge/intel/i82801ix/early_smbus.c
index e686d48..e067733 100644
--- a/src/southbridge/intel/i82801ix/early_smbus.c
+++ b/src/southbridge/intel/i82801ix/early_smbus.c
@@ -21,6 +21,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
#include "i82801ix.h"
void enable_smbus(void)
diff --git a/src/southbridge/intel/i82801ix/smbus.c b/src/southbridge/intel/i82801ix/smbus.c
index b8e9cfd..bd84807 100644
--- a/src/southbridge/intel/i82801ix/smbus.c
+++ b/src/southbridge/intel/i82801ix/smbus.c
@@ -20,7 +20,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
#include "i82801ix.h"
static void pch_smbus_init(struct device *dev)
diff --git a/src/southbridge/intel/i82801jx/early_smbus.c b/src/southbridge/intel/i82801jx/early_smbus.c
index adba27c..f841355 100644
--- a/src/southbridge/intel/i82801jx/early_smbus.c
+++ b/src/southbridge/intel/i82801jx/early_smbus.c
@@ -20,6 +20,7 @@
#include <console/console.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
#include "i82801jx.h"
void enable_smbus(void)
diff --git a/src/southbridge/intel/i82801jx/smbus.c b/src/southbridge/intel/i82801jx/smbus.c
index d366703..68f2317 100644
--- a/src/southbridge/intel/i82801jx/smbus.c
+++ b/src/southbridge/intel/i82801jx/smbus.c
@@ -20,7 +20,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
#include "i82801jx.h"
static void pch_smbus_init(struct device *dev)
diff --git a/src/southbridge/intel/ibexpeak/early_smbus.c b/src/southbridge/intel/ibexpeak/early_smbus.c
index bd130c0..0d18ed0 100644
--- a/src/southbridge/intel/ibexpeak/early_smbus.c
+++ b/src/southbridge/intel/ibexpeak/early_smbus.c
@@ -19,6 +19,7 @@
#include <console/console.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
#include "pch.h"
void enable_smbus(void)
diff --git a/src/southbridge/intel/ibexpeak/smbus.c b/src/southbridge/intel/ibexpeak/smbus.c
index dd3abfe..9168cff 100644
--- a/src/southbridge/intel/ibexpeak/smbus.c
+++ b/src/southbridge/intel/ibexpeak/smbus.c
@@ -22,6 +22,7 @@
#include <device/pci_ops.h>
#include <arch/io.h>
#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
#include "pch.h"
static void pch_smbus_init(struct device *dev)
diff --git a/src/southbridge/intel/lynxpoint/early_smbus.c b/src/southbridge/intel/lynxpoint/early_smbus.c
index f570040..61625cc 100644
--- a/src/southbridge/intel/lynxpoint/early_smbus.c
+++ b/src/southbridge/intel/lynxpoint/early_smbus.c
@@ -19,6 +19,7 @@
#include <console/console.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
#include "pch.h"
void enable_smbus(void)
diff --git a/src/southbridge/intel/lynxpoint/smbus.c b/src/southbridge/intel/lynxpoint/smbus.c
index c12b29e..24beaf2 100644
--- a/src/southbridge/intel/lynxpoint/smbus.c
+++ b/src/southbridge/intel/lynxpoint/smbus.c
@@ -22,6 +22,7 @@
#include <device/pci_ops.h>
#include <arch/io.h>
#include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
#include "pch.h"
static void pch_smbus_init(struct device *dev)