| commit | 1c9a8d8083f04090a5caedfbb05c32d61b035897 | [log] [tgz] |
|---|---|---|
| author | Angel Pons <th3fanbus@gmail.com> | Sat May 07 00:26:10 2022 +0200 |
| committer | Felix Held <felix-coreboot@felixheld.de> | Fri Dec 16 17:19:07 2022 +0000 |
| tree | 8df5c95021d23c2950ae81f56f94ceca2075079e | |
| parent | 49509189dc13d467ac2ec2a63b75e30d5f93c9a7 [diff] [blame] |
nb/intel/haswell: Add native raminit scaffolding Implement some scaffolding for Haswell native raminit, like bootmode selection, handling of MRC cache and CPU detection. Change-Id: Icd96649fa045ea7f0f32ae9bfe1e60498d93975b Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64182 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc index 8cfb4fb..90af951 100644 --- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc +++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
@@ -1,3 +1,4 @@ ## SPDX-License-Identifier: GPL-2.0-or-later +romstage-y += raminit_main.c romstage-y += raminit_native.c