soc/intel/xeon_sp/cpx: skip DRHD generation for non-PCIe stack

Without skipping of DRHD generation for non-PCIe stack, the OS
kernel detects incorrect DMAR table with following messages:
[    0.561817] Your BIOS is broken; DMAR reported at address 0

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I098605daf12a264f390613581427ec722afcddaf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45887
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/soc/intel/xeon_sp/cpx/soc_acpi.c b/src/soc/intel/xeon_sp/cpx/soc_acpi.c
index b0352d8..a9af4aa 100644
--- a/src/soc/intel/xeon_sp/cpx/soc_acpi.c
+++ b/src/soc/intel/xeon_sp/cpx/soc_acpi.c
@@ -457,6 +457,10 @@
 	printk(BIOS_SPEW, "%s socket: %d, stack: %d, bus: 0x%x, pcie_seg: 0x%x, reg_base: 0x%x\n",
 		__func__, socket, stack, bus, pcie_seg, reg_base);
 
+	/* Do not generate DRHD for non-PCIe stack */
+	if (!reg_base)
+		return current;
+
 	// Add DRHD Hardware Unit
 	if (socket == 0 && stack == CSTACK) {
 		printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "