| commit | 1b25422215279191da7f71840da7214fbcb22b9c | [log] [tgz] |
|---|---|---|
| author | Angel Pons <th3fanbus@gmail.com> | Sat May 07 13:48:53 2022 +0200 |
| committer | Felix Held <felix-coreboot@felixheld.de> | Wed Aug 30 15:58:00 2023 +0000 |
| tree | fcb8576fed1fd8ab442b388d3735b8cc3e83d362 | |
| parent | abaa4b5a9630349b6ca9998adf2931e186713e9f [diff] [blame] |
haswell NRI: Collect SPD info Collect SPD data from DIMMs and memory-down, and find the common supported settings. Original-Change-Id: I4e6a1408a638a463ecae37a447cfed1d6556e44a Original-Signed-off-by: Angel Pons <th3fanbus@gmail.com> Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Change-Id: I7948554eb02113bdca380222a11cfb322f9615f8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/77049 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc index 90af951..ebf7abc 100644 --- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc +++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
@@ -2,3 +2,4 @@ romstage-y += raminit_main.c romstage-y += raminit_native.c +romstage-y += spd_bitmunching.c