gru: Fix and export SPK_PA_EN GPIO for Scarlet
On older Grus, GPIO0_A2 was an audio voltage rail enable line. On
Scarlet, we instead moved the audio codec enable (previously on
GPIO1_A2) there. Unfortunately the code still had some hardcoded
leftovers that were overlooked in the initial port and make our speakers
smell weird.
This patch fixes the incorrect GPIO settings and adds the speaker enable
pin to the GPIOs passed through the coreboot table, so that depthcharge
doesn't have to keep its own definition of the pin which may go out of
sync.
Change-Id: I1ac70ee47ebf04b8b92ff17a46cbf5d839421a61
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/22323
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Schneider <dnschneid@chromium.org>
Reviewed-by: Alexandru Stan <amstan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c
index 43fbb71..3721ce8 100644
--- a/src/mainboard/google/gru/mainboard.c
+++ b/src/mainboard/google/gru/mainboard.c
@@ -226,11 +226,9 @@
/* AUDIO IO domain 1.8V voltage selection */
write32(&rk3399_grf->io_vsel, RK_SETBITS(1 << 1));
- /* CPU1_P1.8V_AUDIO_PWREN for P1.8_AUDIO */
- gpio_output(GPIO(0, A, 2), 1);
-
- /* set CPU1_SPK_PA_EN output */
- gpio_output(GPIO(1, A, 2), 0);
+ if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET))
+ gpio_output(GPIO_P18V_AUDIO_PWREN, 1);
+ gpio_output(GPIO_SPK_PA_EN, 0);
rkclk_configure_i2s(12288000);
}