# SPDX-License-Identifier: GPL-2.0-only

chip northbridge/amd/pi/00730F01
	device domain 0 on
		subsystemid 0x1022 0x1410 inherit
		device ref iommu		on end
		device ref gpp_bridge_0		on end	# mPCIe slot 2 (on GFX lane)
		device ref gpp_bridge_1		on end	# LAN3
		device ref gpp_bridge_2		on end	# LAN2
		device ref gpp_bridge_3		on end	# LAN1
		device ref gpp_bridge_4		on end	# mPCIe slot 1

		chip southbridge/amd/pi/hudson		# it is under NB/SB Link, but on the same pci bus
			device ref xhci		on end	# XHCI HC0 muxed with EHCI 2
			device ref sata		on end
			device ref ehci_0	on end	# USB EHCI0 usb[0:3] is connected
			device ref ehci_1	on end	# USB EHCI1 usb[4:7]
			device ref lpc_bridge	on
				chip superio/nuvoton/nct5104d # SIO NCT5104D
					register "irq_trigger_type" = "0"
					register "reset_gpios" = "1"
					device pnp 2e.0 off end
					device pnp 2e.2 on
						io 0x60 = 0x3f8
						irq 0x70 = 4
					end
					device pnp 2e.3 on
						io 0x60 = 0x2f8
						irq 0x70 = 3
					end
					device pnp 2e.10 on
						# UART C is conditionally turned on
						io 0x60 = 0x3e8
						irq 0x70 = 4
					end
					device pnp 2e.11 on
						# UART D is conditionally turned on
						io 0x60 = 0x2e8
						irq 0x70 = 3
					end
					device pnp 2e.008 off end
					device pnp 2e.108 on
						io 0x60 = 0x220
					end
					# GPIO0 and GPIO1 are conditionally turned on
					device pnp 2e.007 on end
					device pnp 2e.107 on end
					device pnp 2e.607 off end
					device pnp 2e.f on end
				end
			end
			device ref sdhci	on end
			device ref ehci_2	on end	# USB EHCI2 usb[8:7] - muxed with XHCI
		end
	end
end