commit 191a8d7d2e40b9c90d81cf8e5ea3fad414afeb29
author Jeremy Soller <jeremy@system76.com> Tue Aug 10 14:06:51 2021 -0600
committer Felix Held <felix-coreboot@felixheld.de> Thu Aug 19 13:51:59 2021 +0000
tree 02ba387688abd6b1ad7c313f3b35d904b3093a62
parent d7df383342ee8f36783e1c8bf70c9a65225dd168

soc/intel/common: Add TGL-H PCI IDs

Add TGL-H PCI IDs from the Processor and PCH EDS docs.

Reference:
- Intel doc 615985
- Intel doc 575683

Change-Id: I751d0d59aff9e93e2aa92546db78775bd1e6ef22
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56900
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

src/soc/intel/common/block/spi/spi.c

diff --git a/src/soc/intel/common/block/spi/spi.c b/src/soc/intel/common/block/spi/spi.c
index 7e7e0a7..6874ccc 100644
--- a/src/soc/intel/common/block/spi/spi.c
+++ b/src/soc/intel/common/block/spi/spi.c
@@ -79,6 +79,11 @@
 	PCI_DEVICE_ID_INTEL_TGP_GSPI4,
 	PCI_DEVICE_ID_INTEL_TGP_GSPI5,
 	PCI_DEVICE_ID_INTEL_TGP_GSPI6,
+	PCI_DEVICE_ID_INTEL_TGP_H_SPI0,
+	PCI_DEVICE_ID_INTEL_TGP_H_GSPI0,
+	PCI_DEVICE_ID_INTEL_TGP_H_GSPI1,
+	PCI_DEVICE_ID_INTEL_TGP_H_GSPI2,
+	PCI_DEVICE_ID_INTEL_TGP_H_GSPI3,
 	PCI_DEVICE_ID_INTEL_MCC_SPI0,
 	PCI_DEVICE_ID_INTEL_MCC_GSPI0,
 	PCI_DEVICE_ID_INTEL_MCC_GSPI1,