| commit | 18ea2d3fbdf89f60a74dc8aabfdb2aa4d3475754 | [log] [tgz] |
|---|---|---|
| author | Julius Werner <jwerner@chromium.org> | Tue Oct 07 16:42:17 2014 -0700 |
| committer | Patrick Georgi <pgeorgi@google.com> | Tue Apr 07 18:23:21 2015 +0200 |
| tree | 875739d499ccc1fa84b03507f8bee699fb86eb95 | |
| parent | 26de1126363218cd19524050d80acc8ed1ce3e53 [diff] [blame] |
baytrail: Change all SoC headers to <soc/headername.h> system This patch aligns baytrail to the new SoC header include scheme. BUG=None TEST=Tested with whole series. Compiled Rambi. Change-Id: I0f0a894f6f33449756582eefa0b50bae545220db Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 1216a86538517c03a7e5bca547d08ff3dbcaa083 Original-Change-Id: If5d2a609354b3d773aa3d482e682ab97422fd9d5 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/222026 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9363 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@google.com>
diff --git a/src/soc/intel/baytrail/stage_cache.c b/src/soc/intel/baytrail/stage_cache.c index 3bda56d..d51746f 100644 --- a/src/soc/intel/baytrail/stage_cache.c +++ b/src/soc/intel/baytrail/stage_cache.c
@@ -19,7 +19,7 @@ #include <cbmem.h> #include <ramstage_cache.h> -#include <baytrail/smm.h> +#include <soc/smm.h> struct ramstage_cache *ramstage_cache_location(long *size) {