soc/intel/tigerlake: Fix TCSS TBT PCIE root ports scope type
TCSS TBT PCIE root ports scope type was mistakenly set to PCI_ENDPOINT.
Fix the scope type to be PCI_SUB.
BUG=b:141609884
TEST=Booted to kernel and verified no TBT PCIE root ports scope
type mismatch error in kernel log.
Change-Id: I844e7e9583992be496223fb51f24c5aa24fc7d21
Signed-off-by: John Zhao <john.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40004
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/soc/intel/tigerlake/acpi.c b/src/soc/intel/tigerlake/acpi.c
index 9e7ff56..36c488b 100644
--- a/src/soc/intel/tigerlake/acpi.c
+++ b/src/soc/intel/tigerlake/acpi.c
@@ -235,7 +235,7 @@
unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, tbtbar);
- current += acpi_create_dmar_ds_pci(current, 0, 7, i);
+ current += acpi_create_dmar_ds_pci_br(current, 0, 7, i);
acpi_dmar_drhd_fixup(tmp, current);
}