diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
index 24f749a..63ced01 100644
--- a/src/soc/intel/xeon_sp/Kconfig
+++ b/src/soc/intel/xeon_sp/Kconfig
@@ -4,38 +4,6 @@
 
 config XEON_SP_COMMON_BASE
 	bool
-
-config SOC_INTEL_SKYLAKE_SP
-	bool
-	select XEON_SP_COMMON_BASE
-	select PLATFORM_USES_FSP2_0
-	select NO_FSP_TEMP_RAM_EXIT
-	help
-	  Intel Skylake-SP support
-
-config SOC_INTEL_COOPERLAKE_SP
-	bool
-	select XEON_SP_COMMON_BASE
-	select PLATFORM_USES_FSP2_2
-	select CACHE_MRC_SETTINGS
-	select NO_FSP_TEMP_RAM_EXIT
-	help
-	  Intel Cooper Lake-SP support
-
-config SOC_INTEL_SAPPHIRERAPIDS_SP
-	bool
-	select CACHE_MRC_SETTINGS
-	select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
-	select PLATFORM_USES_FSP2_3
-	select SOC_INTEL_CSE_SERVER_SKU
-	select XEON_SP_COMMON_BASE
-	help
-	  Intel Sapphire Rapids-SP support
-
-if XEON_SP_COMMON_BASE
-
-config	CPU_SPECIFIC_OPTIONS
-	def_bool y
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
 	select ARCH_X86
 	select BOOT_DEVICE_SUPPORTS_WRITES
@@ -72,6 +40,8 @@
 	select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT
 	select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE
 
+if XEON_SP_COMMON_BASE
+
 config MAINBOARD_USES_FSP2_0
 	  bool
 	  default y