drivers/net/phy/m88e1512: Add downshift enable

This patch provides the functionality to enable downshift on Marvell
PHY. By setting a downshift counter, the PHY is correspondingly often
attempted to establish Gigabit link before the PHY downshifts to the
next highest speed. The range is limited to 8 trials. To activate
downshift, a software reset must follow to take effect.

Change-Id: I4224eab6c1fc13824d53556c80435bc130a13bdb
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69853
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/drivers/net/phy/m88e1512/m88e1512.c b/src/drivers/net/phy/m88e1512/m88e1512.c
index a8d1c73..f32991f 100644
--- a/src/drivers/net/phy/m88e1512/m88e1512.c
+++ b/src/drivers/net/phy/m88e1512/m88e1512.c
@@ -17,6 +17,28 @@
 	struct drivers_net_phy_m88e1512_config *config = dev->chip_info;
 	uint16_t reg;
 
+	/* Enable downshift. */
+	if (config->downshift_cnt) {
+		if (config->downshift_cnt > DOWNSHIFT_CNT_MAX) {
+			printk(BIOS_INFO, "%s: Downshift counter for %s is too large.\n",
+					dev_path(dev->bus->dev), dev->chip_ops->name);
+		} else {
+			printk(BIOS_DEBUG, "%s: Enable downshift after %d attempts for %s.\n",
+					dev_path(dev->bus->dev), config->downshift_cnt,
+					dev->chip_ops->name);
+
+			reg = mdio_read(dev, COPPER_SPEC_CTRL_REG_1);
+			clrsetbits16(&reg, DOWNSHIFT_CNT_MASK,
+					DOWNSHIFT_CNT(config->downshift_cnt) | DOWNSHIFT_EN);
+			mdio_write(dev, COPPER_SPEC_CTRL_REG_1, reg);
+
+			/* Downshift enable requires a software reset to take effect. */
+			reg = mdio_read(dev, COPPER_CTRL_REG);
+			setbits16(&reg, SOFTWARE_RESET);
+			mdio_write(dev, COPPER_CTRL_REG, reg);
+		}
+	}
+
 	/* Configure LEDs if requested. */
 	if (config->configure_leds) {
 		printk(BIOS_DEBUG, "%s: Set a customized LED mode for %s.\n",