tree 3d343eb8dbf84972fdc7d28e255c720d69fdd9a2
parent b56a8d027203d2014b19ec26297bb45227847112
author Shaik Shahina <shahina.shaik@intel.com> 1665761746 +0530
committer Felix Held <felix-coreboot@felixheld.de> 1666403555 +0000

vc/intel/fsp: Update ADL N FSP headers from v3301.00 to v3343.04

Update generated FSP headers for Alder Lake N from v3301.00 to v3343.04.

Changes include:
- FspsUpd.h: 1. Add PchFivrVccstIccMaxControl UPD

BUG=b:254374913
BRANCH=None
TEST=Build using "emerge-nissa intel-adlnfsp" and boot Nissa.

Change-Id: I20b13d3dff2951e6ec3aa754c8954989a3b4e176
Signed-off-by: Shaik Shahina <shahina.shaik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68424
Reviewed-by: Reka Norman <rekanorman@google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>