| ## |
| ## Config file for the Total Impact briQ |
| ## |
| |
| uses TTYS0_DIV |
| uses TTYS0_BASE |
| uses CONFIG_BRIQ_750FX |
| uses CONFIG_BRIQ_7400 |
| uses ISA_IO_BASE |
| uses ISA_MEM_BASE |
| uses PCIC0_CFGADDR |
| uses PCIC0_CFGDATA |
| uses _IO_BASE |
| uses CROSS_COMPILE |
| uses HAVE_OPTION_TABLE |
| uses CONFIG_COMPRESS |
| uses DEFAULT_CONSOLE_LOGLEVEL |
| uses CONFIG_USE_INIT |
| uses NO_POST |
| uses CONFIG_CONSOLE_SERIAL8250 |
| uses CONFIG_IDE_PAYLOAD |
| uses CONFIG_COMPRESSED_PAYLOAD_LZMA |
| uses CONFIG_PRECOMPRESSED_PAYLOAD |
| uses IDE_BOOT_DRIVE |
| uses IDE_SWAB IDE_OFFSET |
| uses ROM_SIZE |
| uses _RESET |
| uses _EXCEPTION_VECTORS |
| uses _ROMBASE |
| uses _ROMSTART |
| uses _RAMBASE |
| uses _RAMSTART |
| uses STACK_SIZE |
| uses HEAP_SIZE |
| uses CONFIG_BRIQ_750FX |
| uses CONFIG_BRIQ_7400 |
| uses CONFIG_SYS_CLK_FREQ |
| |
| uses MAINBOARD |
| uses MAINBOARD_VENDOR |
| uses MAINBOARD_PART_NUMBER |
| uses LINUXBIOS_EXTRA_VERSION |
| uses CROSS_COMPILE |
| uses CC |
| uses HOSTCC |
| uses OBJCOPY |
| |
| ## |
| ## Set memory map |
| ## |
| default ISA_IO_BASE=0x80000000 |
| default ISA_MEM_BASE=0xc0000000 |
| default PCIC0_CFGADDR=0xff5f8000 |
| default PCIC0_CFGDATA=0xff5f8010 |
| default _IO_BASE=ISA_IO_BASE |
| |
| ## |
| ## The briQ uses weird clocking, 4 = 115200 |
| ## |
| default TTYS0_DIV=4 |
| ## |
| ## Set UART base address |
| ## |
| default TTYS0_BASE=0x3f8 |
| |
| ## use a cross compiler |
| #default CROSS_COMPILE="powerpc-eabi-" |
| #default CROSS_COMPILE="ppc_74xx-" |
| |
| ## Use stage 1 initialization code |
| default CONFIG_USE_INIT=1 |
| |
| ## We don't use compressed image |
| default CONFIG_COMPRESS=0 |
| |
| ## Turn off POST codes |
| default NO_POST=1 |
| |
| ## Enable serial console |
| default DEFAULT_CONSOLE_LOGLEVEL=8 |
| default CONFIG_CONSOLE_SERIAL8250=1 |
| |
| ## Boot linux from IDE |
| default CONFIG_IDE_PAYLOAD=1 |
| default IDE_BOOT_DRIVE=0 |
| default IDE_SWAB=1 |
| default IDE_OFFSET=0 |
| |
| # ROM is 1Mb |
| default ROM_SIZE=1048576 |
| |
| # Set stack and heap sizes (stage 2) |
| default STACK_SIZE=0x10000 |
| default HEAP_SIZE=0x10000 |
| |
| ## |
| ## System clock |
| ## |
| default CONFIG_SYS_CLK_FREQ=33 |
| |
| # Sandpoint Demo Board |
| ## Base of ROM |
| default _ROMBASE=0xfff00000 |
| |
| ## Sandpoint reset vector |
| default _RESET=_ROMBASE+0x100 |
| |
| ## Exception vectors (other than reset vector) |
| default _EXCEPTION_VECTORS=_RESET+0x100 |
| |
| ## Start of linuxBIOS in the boot rom |
| ## = _RESET + exeception vector table size |
| default _ROMSTART=_RESET+0x3100 |
| |
| ## LinuxBIOS C code runs at this location in RAM |
| default _RAMBASE=0x00100000 |
| default _RAMSTART=0x00100000 |
| |
| default CONFIG_BRIQ_750FX=1 |
| #default CONFIG_BRIQ_7400=1 |
| |
| ### End Options.lb |
| end |