Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/util/romcc/Makefile b/util/romcc/Makefile
index 1734fe5..6543fbb 100644
--- a/util/romcc/Makefile
+++ b/util/romcc/Makefile
@@ -149,7 +149,7 @@
TEST_ASM_O2_mmmx_call :=$(patsubst %.c, tests/%.S-O2-mmmx-call, $(TESTS))
TEST_ASM_O2_mmmx_msse_call:=$(patsubst %.c, tests/%.S-O2-mmmx-msse-call, $(TESTS))
TEST_ASM_ALL:= $(TEST_ASM) $(TEST_ASM_O) $(TEST_ASM_O2) $(TEST_ASM_mmmx) $(TEST_ASM_msse) $(TEST_ASM_mmmx_msse) $(TEST_ASM_O_mmmx) $(TEST_ASM_O_msse) $(TEST_ASM_O_mmmx_msse) $(TEST_ASM_O2_mmmx) $(TEST_ASM_O2_msse) $(TEST_ASM_O2_mmmx_msse) $(TEST_ASM_O2_mmmx_call) $(TEST_ASM_O2_mmmx_msse_call)
-TEST_ASM_MOST:= $(TEST_ASM_O) $(TEST_ASM_O_mmmx) $(TEST_ASM_O_msse) $(TEST_ASM_O_mmmx_msse) $(TEST_ASM_O2) $(TEST_ASM_O2_mmmx) $(TEST_ASM_O2_msse) $(TEST_ASM_O2_mmmx_msse)
+TEST_ASM_MOST:= $(TEST_ASM_O) $(TEST_ASM_O_mmmx) $(TEST_ASM_O_msse) $(TEST_ASM_O_mmmx_msse) $(TEST_ASM_O2) $(TEST_ASM_O2_mmmx) $(TEST_ASM_O2_msse) $(TEST_ASM_O2_mmmx_msse)
# $(TEST_ASM_O2_mmmx_call) $(TEST_ASM_O2_mmmx_msse_call)
TEST_OBJ:=$(patsubst %.c, tests/%.o, $(TESTS))
TEST_ELF:=$(patsubst %.c, tests/%.elf, $(TESTS))
diff --git a/util/romcc/do_tests.sh b/util/romcc/do_tests.sh
index fdbe2a6..2ce39d1 100644
--- a/util/romcc/do_tests.sh
+++ b/util/romcc/do_tests.sh
@@ -22,12 +22,12 @@
BASE="raminit_test"
#SKIP="6"
EXPECTED_BAD=""
-fi
+fi
if [ "$type" = "hello" ] ; then
LIST="1 2"
BASE="hello_world"
EXPECTED_BAD=""
-fi
+fi
SKIPPED=""
@@ -36,7 +36,7 @@
OLD_BAD=""
NEW_BAD=""
NEW_GOOD=""
-for i in $LIST ; do
+for i in $LIST ; do
DO_SKIP=""
for j in $SKIP ; do
if [ "$j" = "$i" ] ; then
@@ -55,8 +55,8 @@
break;
fi
done
- echo -e -n "$i $PROBLEM\t"
- if ./tests.sh $BASE $i > /dev/null 2> /dev/null ; then
+ echo -e -n "$i $PROBLEM\t"
+ if ./tests.sh $BASE $i > /dev/null 2> /dev/null ; then
echo OK
if [ ! -z "$PROBLEM" ] ; then
NEW_GOOD="$NEW_GOOD$i "
@@ -65,10 +65,10 @@
else
echo -n "FAILED: "
tail -n 1 tests/$BASE$i.debug2 | tr -d '\r\n'
- echo
+ echo
if [ -z "$PROBLEM" ] ; then
NEW_BAD="$NEW_BAD$i "
- else
+ else
OLD_BAD="$OLD_BAD$i "
fi
BAD="$BAD$i "
diff --git a/util/romcc/romcc.c b/util/romcc/romcc.c
index e691f3f..7eced78 100644
--- a/util/romcc/romcc.c
+++ b/util/romcc/romcc.c
@@ -25,9 +25,9 @@
#define MAX_CWD_SIZE 4096
#define MAX_ALLOCATION_PASSES 100
-/* NOTE: Before you even start thinking to touch anything
+/* NOTE: Before you even start thinking to touch anything
* in this code, set DEBUG_ROMCC_WARNINGS to 1 to get an
- * insight on the original author's thoughts. We introduced
+ * insight on the original author's thoughts. We introduced
* this switch as romcc was about the only thing producing
* massive warnings in our code..
*/
@@ -61,7 +61,7 @@
#endif
/* Control flow graph of a loop without goto.
- *
+ *
* AAA
* +---/
* /
@@ -74,31 +74,31 @@
* |\ GGG HHH | continue;
* | \ \ | |
* | \ III | /
- * | \ | / /
- * | vvv /
- * +----BBB /
+ * | \ | / /
+ * | vvv /
+ * +----BBB /
* | /
* vv
* JJJ
*
- *
+ *
* AAA
* +-----+ | +----+
* | \ | / |
* | BBB +-+ |
* | / \ / | |
* | CCC JJJ / /
- * | / \ / /
- * | DDD EEE / /
+ * | / \ / /
+ * | DDD EEE / /
* | | +-/ /
- * | FFF /
- * | / \ /
- * | GGG HHH /
+ * | FFF /
+ * | / \ /
+ * | GGG HHH /
* | | +-/
* | III
- * +--+
+ * +--+
*
- *
+ *
* DFlocal(X) = { Y <- Succ(X) | idom(Y) != X }
* DFup(Z) = { Y <- DF(Z) | idom(Y) != X }
*
@@ -117,7 +117,7 @@
* DDD EEE DDD: [ ] ( BBB ) EEE: [ JJJ ] ()
* |
* FFF FFF: [ ] ( BBB )
- * / \
+ * / \
* GGG HHH GGG: [ ] ( BBB ) HHH: [ BBB ] ()
* |
* III III: [ BBB ] ()
@@ -125,7 +125,7 @@
*
* BBB and JJJ are definitely the dominance frontier.
* Where do I place phi functions and how do I make that decision.
- *
+ *
*/
struct filelist {
@@ -231,7 +231,7 @@
off_t size, progress;
ssize_t result;
FILE* file;
-
+
if (!filename) {
*r_size = 0;
return 0;
@@ -406,14 +406,14 @@
#define OP_SUB 9
#define OP_SL 10
#define OP_USR 11
-#define OP_SSR 12
-#define OP_AND 13
+#define OP_SSR 12
+#define OP_AND 13
#define OP_XOR 14
#define OP_OR 15
#define OP_POS 16 /* Dummy positive operator don't use it */
#define OP_NEG 17
#define OP_INVERT 18
-
+
#define OP_EQ 20
#define OP_NOTEQ 21
#define OP_SLESS 22
@@ -424,7 +424,7 @@
#define OP_ULESSEQ 27
#define OP_SMOREEQ 28
#define OP_UMOREEQ 29
-
+
#define OP_LFALSE 30 /* Test if the expression is logically false */
#define OP_LTRUE 31 /* Test if the expression is logcially true */
@@ -483,7 +483,7 @@
* assigned yet, or variables whose value we simply do not know.
*/
-#define OP_WRITE 60
+#define OP_WRITE 60
/* OP_WRITE moves one pseudo register to another.
* MISC(0) holds the destination pseudo register, which must be an OP_DECL.
* RHS(0) holds the psuedo to move.
@@ -552,10 +552,10 @@
* The value represented by an OP_TUPLE is held in N registers.
* LHS(0..N-1) refer to those registers.
* ->use is a list of statements that use the value.
- *
+ *
* Although OP_TUPLE always has register sized pieces they are not
* used until structures are flattened/decomposed into their register
- * components.
+ * components.
* ???? registers ????
*/
@@ -569,10 +569,10 @@
#define OP_FCALL 72
-/* OP_FCALL performs a procedure call.
+/* OP_FCALL performs a procedure call.
* MISC(0) holds a pointer to the OP_LIST of a function
* RHS(x) holds argument x of a function
- *
+ *
* Currently not seen outside of expressions.
*/
#define OP_PROG 73
@@ -622,16 +622,16 @@
* ->use is the list of all branches that use this label.
*/
-#define OP_ADECL 87
+#define OP_ADECL 87
/* OP_ADECL is a triple that establishes an lvalue for assignments.
* A variable takes N registers to contain.
* LHS(0..N-1) refer to an OP_PIECE triple that represents
* the Xth register that the variable is stored in.
* ->use is a list of statements that use the variable.
- *
+ *
* Although OP_ADECL always has register sized pieces they are not
* used until structures are flattened/decomposed into their register
- * components.
+ * components.
*/
#define OP_SDECL 88
@@ -643,12 +643,12 @@
#define OP_PHI 89
-/* OP_PHI is a triple used in SSA form code.
+/* OP_PHI is a triple used in SSA form code.
* It is used when multiple code paths merge and a variable needs
* a single assignment from any of those code paths.
* The operation is a cross between OP_DECL and OP_WRITE, which
* is what OP_PHI is generated from.
- *
+ *
* RHS(x) points to the value from code path x
* The number of RHS entries is the number of control paths into the block
* in which OP_PHI resides. The elements of the array point to point
@@ -661,12 +661,12 @@
/* continuation helpers
*/
#define OP_CPS_BRANCH 90 /* an unconditional branch */
-/* OP_CPS_BRANCH calls a continuation
+/* OP_CPS_BRANCH calls a continuation
* RHS(x) holds argument x of the function
* TARG(0) holds OP_CPS_START target
*/
#define OP_CPS_CBRANCH 91 /* a conditional branch */
-/* OP_CPS_CBRANCH conditionally calls one of two continuations
+/* OP_CPS_CBRANCH conditionally calls one of two continuations
* RHS(0) holds the branch condition
* RHS(x + 1) holds argument x of the function
* TARG(0) holds the OP_CPS_START to jump to when true
@@ -680,7 +680,7 @@
* ->next holds where the OP_CPS_RET will return to.
*/
#define OP_CPS_RET 93
-/* OP_CPS_RET conditionally calls one of two continuations
+/* OP_CPS_RET conditionally calls one of two continuations
* RHS(0) holds the variable with the return function address
* RHS(x + 1) holds argument x of the function
* The branch target may be any OP_CPS_START
@@ -821,7 +821,7 @@
[OP_CONVERT ] = OP( 0, 1, 0, 0, PURE | DEF | BLOCK, "convert"),
[OP_PIECE ] = OP( 0, 0, 1, 0, PURE | DEF | STRUCTURAL | PART, "piece"),
[OP_ASM ] = OP(-1, -1, 0, 0, PURE, "asm"),
-[OP_DEREF ] = OP( 0, 1, 0, 0, 0 | DEF | BLOCK, "deref"),
+[OP_DEREF ] = OP( 0, 1, 0, 0, 0 | DEF | BLOCK, "deref"),
[OP_DOT ] = OP( 0, 0, 1, 0, PURE | DEF | PART, "dot"),
[OP_INDEX ] = OP( 0, 0, 1, 0, PURE | DEF | PART, "index"),
@@ -892,7 +892,7 @@
#undef OP
#define OP_MAX (sizeof(table_ops)/sizeof(table_ops[0]))
-static const char *tops(int index)
+static const char *tops(int index)
{
static const char unknown[] = "unknown op";
if (index < 0) {
@@ -1003,7 +1003,7 @@
struct block_set *ipdomfrontier;
struct block *ipdom;
int vertex;
-
+
};
struct symbol {
@@ -1179,11 +1179,11 @@
* make up the union.
* type->elements hold the length of the linked list
*/
-#define TYPE_POINTER 0x1200
+#define TYPE_POINTER 0x1200
/* For TYPE_POINTER:
* type->left holds the type pointed to.
*/
-#define TYPE_FUNCTION 0x1300
+#define TYPE_FUNCTION 0x1300
/* For TYPE_FUNCTION:
* type->left holds the return type.
* type->right holds the type of the arguments
@@ -1205,7 +1205,7 @@
* type->elements holds the number of elements.
*/
#define TYPE_TUPLE 0x1900
-/* TYPE_TUPLE is a basic building block when defining
+/* TYPE_TUPLE is a basic building block when defining
* positionally reference type conglomerations. (i.e. closures)
* In essence it is a wrapper for TYPE_PRODUCT, like TYPE_STRUCT
* except it has no field names.
@@ -1214,7 +1214,7 @@
* type->elements hold the number of elements in the closure.
*/
#define TYPE_JOIN 0x1a00
-/* TYPE_JOIN is a basic building block when defining
+/* TYPE_JOIN is a basic building block when defining
* positionally reference type conglomerations. (i.e. closures)
* In essence it is a wrapper for TYPE_OVERLAP, like TYPE_UNION
* except it has no field names.
@@ -1307,9 +1307,9 @@
struct compile_state *state, struct type *type, const char *constraint);
static struct reg_info arch_reg_clobber(
struct compile_state *state, const char *clobber);
-static struct reg_info arch_reg_lhs(struct compile_state *state,
+static struct reg_info arch_reg_lhs(struct compile_state *state,
struct triple *ins, int index);
-static struct reg_info arch_reg_rhs(struct compile_state *state,
+static struct reg_info arch_reg_rhs(struct compile_state *state,
struct triple *ins, int index);
static int arch_reg_size(int reg);
static struct triple *transform_to_arch_instruction(
@@ -1490,9 +1490,9 @@
}
return result;
}
-
-static void flag_usage(FILE *fp, const struct compiler_flag *ptr,
+
+static void flag_usage(FILE *fp, const struct compiler_flag *ptr,
const char *prefix, const char *invert_prefix)
{
for(;ptr->name; ptr++) {
@@ -1509,7 +1509,7 @@
for(;ptr->name; ptr++) {
const struct compiler_flag *flag;
for(flag = &ptr->flags[0]; flag->name; flag++) {
- fprintf(fp, "%s%s=%s\n",
+ fprintf(fp, "%s%s=%s\n",
prefix, ptr->name, flag->name);
}
}
@@ -1522,7 +1522,7 @@
count = ++(*max);
*vec = xrealloc(*vec, sizeof(char *)*count, "name");
(*vec)[count -1] = 0;
- (*vec)[count -2] = str;
+ (*vec)[count -2] = str;
return 0;
}
@@ -1553,7 +1553,7 @@
rest = identifier(str, end);
if (rest != end) {
int len = end - str - 1;
- arg_error("Invalid name cannot define macro: `%*.*s'\n",
+ arg_error("Invalid name cannot define macro: `%*.*s'\n",
len, len, str);
}
result = append_string(&compiler->define_count,
@@ -1570,7 +1570,7 @@
rest = identifier(str, end);
if (rest != end) {
int len = end - str - 1;
- arg_error("Invalid name cannot undefine macro: `%*.*s'\n",
+ arg_error("Invalid name cannot undefine macro: `%*.*s'\n",
len, len, str);
}
result = append_string(&compiler->undef_count,
@@ -1742,7 +1742,7 @@
for(col = 0; ptr < end; ptr++) {
if (*ptr != '\t') {
col++;
- }
+ }
else {
col = (col & ~7) + 8;
}
@@ -1756,7 +1756,7 @@
if (triple && triple->occurance) {
struct occurance *spot;
for(spot = triple->occurance; spot; spot = spot->parent) {
- fprintf(fp, "%s:%d.%d: ",
+ fprintf(fp, "%s:%d.%d: ",
spot->filename, spot->line, spot->col);
}
return;
@@ -1765,11 +1765,11 @@
return;
}
col = get_col(state->file);
- fprintf(fp, "%s:%d.%d: ",
+ fprintf(fp, "%s:%d.%d: ",
state->file->report_name, state->file->report_line, col);
}
-static void __attribute__ ((noreturn)) internal_error(struct compile_state *state, struct triple *ptr,
+static void __attribute__ ((noreturn)) internal_error(struct compile_state *state, struct triple *ptr,
const char *fmt, ...)
{
FILE *fp = state->errout;
@@ -1789,7 +1789,7 @@
}
-static void internal_warning(struct compile_state *state, struct triple *ptr,
+static void internal_warning(struct compile_state *state, struct triple *ptr,
const char *fmt, ...)
{
FILE *fp = state->errout;
@@ -1807,7 +1807,7 @@
-static void __attribute__ ((noreturn)) error(struct compile_state *state, struct triple *ptr,
+static void __attribute__ ((noreturn)) error(struct compile_state *state, struct triple *ptr,
const char *fmt, ...)
{
FILE *fp = state->errout;
@@ -1828,14 +1828,14 @@
exit(1);
}
-static void warning(struct compile_state *state, struct triple *ptr,
+static void warning(struct compile_state *state, struct triple *ptr,
const char *fmt, ...)
{
FILE *fp = state->errout;
va_list args;
va_start(args, fmt);
loc(fp, state, ptr);
- fprintf(fp, "warning: ");
+ fprintf(fp, "warning: ");
if (ptr && (state->compiler->debug & DEBUG_ABORT_ON_ERROR)) {
fprintf(fp, "%p %-10s ", ptr, tops(ptr->op));
}
@@ -1903,7 +1903,7 @@
}
ptr = &(*ptr)->next;
}
- /* Append new to the head of the list,
+ /* Append new to the head of the list,
* copy_func and rename_block_variables
* depends on this.
*/
@@ -1978,7 +1978,7 @@
(last->line == line) &&
(last->function == function) &&
((last->filename == filename) ||
- (strcmp(last->filename, filename) == 0)))
+ (strcmp(last->filename, filename) == 0)))
{
get_occurance(last);
return last;
@@ -2074,7 +2074,7 @@
static size_t registers_of(struct compile_state *state, struct type *type);
-static struct triple *alloc_triple(struct compile_state *state,
+static struct triple *alloc_triple(struct compile_state *state,
int op, struct type *type, int lhs_wanted, int rhs_wanted,
struct occurance *occurance)
{
@@ -2174,7 +2174,7 @@
return copy;
}
-static struct triple *new_triple(struct compile_state *state,
+static struct triple *new_triple(struct compile_state *state,
int op, struct type *type, int lhs, int rhs)
{
struct triple *ret;
@@ -2184,7 +2184,7 @@
return ret;
}
-static struct triple *build_triple(struct compile_state *state,
+static struct triple *build_triple(struct compile_state *state,
int op, struct type *type, struct triple *left, struct triple *right,
struct occurance *occurance)
{
@@ -2201,7 +2201,7 @@
return ret;
}
-static struct triple *triple(struct compile_state *state,
+static struct triple *triple(struct compile_state *state,
int op, struct type *type, struct triple *left, struct triple *right)
{
struct triple *ret;
@@ -2217,7 +2217,7 @@
return ret;
}
-static struct triple *branch(struct compile_state *state,
+static struct triple *branch(struct compile_state *state,
struct triple *targ, struct triple *test)
{
struct triple *ret;
@@ -2260,7 +2260,7 @@
static int triple_stores_block(struct compile_state *state, struct triple *ins)
{
- /* This function is used to determine if u.block
+ /* This function is used to determine if u.block
* is utilized to store the current block number.
*/
int stores_block;
@@ -2270,7 +2270,7 @@
}
static int triple_is_branch(struct compile_state *state, struct triple *ins);
-static struct block *block_of_triple(struct compile_state *state,
+static struct block *block_of_triple(struct compile_state *state,
struct triple *ins)
{
struct triple *first;
@@ -2279,8 +2279,8 @@
}
first = state->first;
while(ins != first && !triple_is_branch(state, ins->prev) &&
- !triple_stores_block(state, ins))
- {
+ !triple_stores_block(state, ins))
+ {
if (ins == ins->prev) {
internal_error(state, ins, "ins == ins->prev?");
}
@@ -2456,30 +2456,30 @@
}
else if (ins->op == OP_INTCONST) {
fprintf(fp, "(%p) %c%c%c %-7s %-2d %-10s <0x%08lx> ",
- ins, pre, post, vol, reg, ins->template_id, tops(ins->op),
+ ins, pre, post, vol, reg, ins->template_id, tops(ins->op),
(unsigned long)(ins->u.cval));
}
else if (ins->op == OP_ADDRCONST) {
fprintf(fp, "(%p) %c%c%c %-7s %-2d %-10s %-10p <0x%08lx>",
- ins, pre, post, vol, reg, ins->template_id, tops(ins->op),
+ ins, pre, post, vol, reg, ins->template_id, tops(ins->op),
MISC(ins, 0), (unsigned long)(ins->u.cval));
}
else if (ins->op == OP_INDEX) {
fprintf(fp, "(%p) %c%c%c %-7s %-2d %-10s %-10p <0x%08lx>",
- ins, pre, post, vol, reg, ins->template_id, tops(ins->op),
+ ins, pre, post, vol, reg, ins->template_id, tops(ins->op),
RHS(ins, 0), (unsigned long)(ins->u.cval));
}
else if (ins->op == OP_PIECE) {
fprintf(fp, "(%p) %c%c%c %-7s %-2d %-10s %-10p <0x%08lx>",
- ins, pre, post, vol, reg, ins->template_id, tops(ins->op),
+ ins, pre, post, vol, reg, ins->template_id, tops(ins->op),
MISC(ins, 0), (unsigned long)(ins->u.cval));
}
else {
int i, count;
- fprintf(fp, "(%p) %c%c%c %-7s %-2d %-10s",
+ fprintf(fp, "(%p) %c%c%c %-7s %-2d %-10s",
ins, pre, post, vol, reg, ins->template_id, tops(ins->op));
if (table_ops[ins->op].flags & BITFIELD) {
- fprintf(fp, " <%2d-%2d:%2d>",
+ fprintf(fp, " <%2d-%2d:%2d>",
ins->u.bitfield.offset,
ins->u.bitfield.offset + ins->u.bitfield.size,
ins->u.bitfield.size);
@@ -2509,9 +2509,9 @@
fprintf(fp, " @");
for(ptr = ins->occurance; ptr; ptr = ptr->parent) {
fprintf(fp, " %s,%s:%d.%d",
- ptr->function,
+ ptr->function,
ptr->filename,
- ptr->line,
+ ptr->line,
ptr->col);
}
if (ins->op == OP_ASM) {
@@ -2532,9 +2532,9 @@
orig_count = TRIPLE_SIZE(orig);
if ((new->op != orig->op) ||
(new_count != orig_count) ||
- (memcmp(orig->param, new->param,
+ (memcmp(orig->param, new->param,
orig_count * sizeof(orig->param[0])) != 0) ||
- (memcmp(&orig->u, &new->u, sizeof(orig->u)) != 0))
+ (memcmp(&orig->u, &new->u, sizeof(orig->u)) != 0))
{
struct occurance *ptr;
int i, min_count, indent;
@@ -2542,7 +2542,7 @@
if (orig->op == new->op) {
fprintf(fp, " %-11s", tops(orig->op));
} else {
- fprintf(fp, " [%-10s %-10s]",
+ fprintf(fp, " [%-10s %-10s]",
tops(new->op), tops(orig->op));
}
min_count = new_count;
@@ -2551,12 +2551,12 @@
}
for(indent = i = 0; i < min_count; i++) {
if (orig->param[i] == new->param[i]) {
- fprintf(fp, " %-11p",
+ fprintf(fp, " %-11p",
orig->param[i]);
indent += 12;
} else {
fprintf(fp, " [%-10p %-10p]",
- new->param[i],
+ new->param[i],
orig->param[i]);
indent += 24;
}
@@ -2571,7 +2571,7 @@
}
if ((new->op == OP_INTCONST)||
(new->op == OP_ADDRCONST)) {
- fprintf(fp, " <0x%08lx>",
+ fprintf(fp, " <0x%08lx>",
(unsigned long)(new->u.cval));
indent += 13;
}
@@ -2592,11 +2592,11 @@
fprintf(fp, " @");
for(ptr = orig->occurance; ptr; ptr = ptr->parent) {
fprintf(fp, " %s,%s:%d.%d",
- ptr->function,
+ ptr->function,
ptr->filename,
- ptr->line,
+ ptr->line,
ptr->col);
-
+
}
fprintf(fp, "\n");
fflush(fp);
@@ -2606,7 +2606,7 @@
static int triple_is_pure(struct compile_state *state, struct triple *ins, unsigned id)
{
/* Does the triple have no side effects.
- * I.e. Rexecuting the triple with the same arguments
+ * I.e. Rexecuting the triple with the same arguments
* gives the same value.
*/
unsigned pure;
@@ -2619,7 +2619,7 @@
return (pure == PURE) && !(id & TRIPLE_FLAG_VOLATILE);
}
-static int triple_is_branch_type(struct compile_state *state,
+static int triple_is_branch_type(struct compile_state *state,
struct triple *ins, unsigned type)
{
/* Is this one of the passed branch types? */
@@ -2660,7 +2660,7 @@
/* Is this triple a return instruction? */
return triple_is_branch_type(state, ins, RETBRANCH);
}
-
+
#if DEBUG_ROMCC_WARNING
static int triple_is_simple_ubranch(struct compile_state *state, struct triple *ins)
{
@@ -2741,27 +2741,27 @@
}
}
return ret;
-
+
}
static struct triple **triple_lhs(struct compile_state *state,
struct triple *ins, struct triple **last)
{
- return triple_iter(state, ins->lhs, &LHS(ins,0),
+ return triple_iter(state, ins->lhs, &LHS(ins,0),
ins, last);
}
static struct triple **triple_rhs(struct compile_state *state,
struct triple *ins, struct triple **last)
{
- return triple_iter(state, ins->rhs, &RHS(ins,0),
+ return triple_iter(state, ins->rhs, &RHS(ins,0),
ins, last);
}
static struct triple **triple_misc(struct compile_state *state,
struct triple *ins, struct triple **last)
{
- return triple_iter(state, ins->misc, &MISC(ins,0),
+ return triple_iter(state, ins->misc, &MISC(ins,0),
ins, last);
}
@@ -2829,7 +2829,7 @@
static struct triple **triple_edge_targ(struct compile_state *state,
struct triple *ins, struct triple **last)
{
- return do_triple_targ(state, ins, last,
+ return do_triple_targ(state, ins, last,
state->functions_joined, !state->functions_joined);
}
@@ -2860,7 +2860,7 @@
}
/* Function piece accessor functions */
-static struct triple *do_farg(struct compile_state *state,
+static struct triple *do_farg(struct compile_state *state,
struct triple *func, unsigned index)
{
struct type *ftype;
@@ -2889,7 +2889,7 @@
{
return do_farg(state, func, 1);
}
-static struct triple *farg(struct compile_state *state,
+static struct triple *farg(struct compile_state *state,
struct triple *func, unsigned index)
{
return do_farg(state, func, index + 2);
@@ -2938,7 +2938,7 @@
}
}
-static int find_rhs_use(struct compile_state *state,
+static int find_rhs_use(struct compile_state *state,
struct triple *user, struct triple *used)
{
struct triple **param;
@@ -3171,7 +3171,7 @@
#define TOK_FIRST_MACRO TOK_MDEFINE
#define TOK_LAST_MACRO TOK_MENDIF
-
+
#define TOK_MIF 112
#define TOK_MELSE 113
#define TOK_MIDENT 114
@@ -3291,7 +3291,7 @@
[TOK_MIF ] = "#if",
[TOK_MELSE ] = "#else",
[TOK_MIDENT ] = "#:ident:",
-[TOK_EOL ] = "EOL",
+[TOK_EOL ] = "EOL",
[TOK_EOF ] = "EOF",
};
@@ -3315,7 +3315,7 @@
unsigned int index;
index = hash(name, name_len);
entry = state->hash_table[index];
- while(entry &&
+ while(entry &&
((entry->name_len != name_len) ||
(memcmp(entry->name, name, name_len) != 0))) {
entry = entry->next;
@@ -3345,7 +3345,7 @@
entry = tk->ident;
if (entry && ((entry->tok == TOK_TYPE_NAME) ||
(entry->tok == TOK_ENUM_CONST) ||
- ((entry->tok >= TOK_FIRST_KEYWORD) &&
+ ((entry->tok >= TOK_FIRST_KEYWORD) &&
(entry->tok <= TOK_LAST_KEYWORD)))) {
tk->tok = entry->tok;
}
@@ -3406,7 +3406,7 @@
romcc_symbol(state, ident, chain, def, type, state->scope_depth);
}
-static void var_symbol(struct compile_state *state,
+static void var_symbol(struct compile_state *state,
struct hash_entry *ident, struct triple *def)
{
if ((def->type->type & TYPE_MASK) == TYPE_PRODUCT) {
@@ -3415,7 +3415,7 @@
symbol(state, ident, &ident->sym_ident, def, def->type);
}
-static void label_symbol(struct compile_state *state,
+static void label_symbol(struct compile_state *state,
struct hash_entry *ident, struct triple *label, int depth)
{
romcc_symbol(state, ident, &ident->sym_label, label, &void_type, depth);
@@ -3444,7 +3444,7 @@
int i;
int depth;
/* Walk through the hash table and remove all symbols
- * in the current scope.
+ * in the current scope.
*/
depth = state->scope_depth;
for(i = 0; i < HASH_TABLE_SIZE; i++) {
@@ -3527,7 +3527,7 @@
struct macro_arg *arg, *anext;
macro = ident->sym_define;
ident->sym_define = 0;
-
+
/* Free the macro arguments... */
anext = macro->args;
while(anext) {
@@ -3544,8 +3544,8 @@
}
}
-static void do_define_macro(struct compile_state *state,
- struct hash_entry *ident, const char *body,
+static void do_define_macro(struct compile_state *state,
+ struct hash_entry *ident, const char *body,
int argc, struct macro_arg *args)
{
struct macro *macro;
@@ -3559,7 +3559,7 @@
int identical_bodies, identical_args;
struct macro_arg *oarg;
/* Explicitly allow identical redfinitions of the same macro */
- identical_bodies =
+ identical_bodies =
(macro->buf_len == body_len) &&
(memcmp(macro->buf, body, body_len) == 0);
identical_args = macro->argc == argc;
@@ -3589,7 +3589,7 @@
ident->sym_define = macro;
}
-
+
static void define_macro(
struct compile_state *state,
struct hash_entry *ident,
@@ -3641,7 +3641,7 @@
register_builtin_macro(state, "__STDC__", "0");
/* In particular I don't conform to C99 */
register_builtin_macro(state, "__STDC_VERSION__", "199901L");
-
+
}
static void process_cmdline_macros(struct compile_state *state)
@@ -3688,7 +3688,7 @@
{
int ret = 0;
switch(c) {
- case '0': case '1': case '2': case '3': case '4':
+ case '0': case '1': case '2': case '3': case '4':
case '5': case '6': case '7': case '8': case '9':
ret = 1;
break;
@@ -3708,7 +3708,7 @@
{
int ret = 0;
switch(c) {
- case '0': case '1': case '2': case '3': case '4':
+ case '0': case '1': case '2': case '3': case '4':
case '5': case '6': case '7': case '8': case '9':
case 'A': case 'B': case 'C': case 'D': case 'E': case 'F':
case 'a': case 'b': case 'c': case 'd': case 'e': case 'f':
@@ -3717,7 +3717,7 @@
}
return ret;
}
-static int hexdigval(int c)
+static int hexdigval(int c)
{
int val = -1;
if ((c >= '0') && (c <= '9')) {
@@ -3736,7 +3736,7 @@
{
int ret = 0;
switch(c) {
- case '0': case '1': case '2': case '3':
+ case '0': case '1': case '2': case '3':
case '4': case '5': case '6': case '7':
ret = 1;
break;
@@ -3809,7 +3809,7 @@
case '?': c = '?'; str++; break;
case '\'': c = '\''; str++; break;
case '"': c = '"'; str++; break;
- case 'x':
+ case 'x':
c = 0;
str++;
while((str < end) && hexdigitp(*str)) {
@@ -3818,7 +3818,7 @@
str++;
}
break;
- case '0': case '1': case '2': case '3':
+ case '0': case '1': case '2': case '3':
case '4': case '5': case '6': case '7':
c = 0;
while((str < end) && octdigitp(*str)) {
@@ -3845,7 +3845,7 @@
int c = *pos;
/* Is this a trigraph? */
if (file->trigraphs &&
- (c == '?') && ((end - pos) >= 3) && (pos[1] == '?'))
+ (c == '?') && ((end - pos) >= 3) && (pos[1] == '?'))
{
switch(pos[2]) {
case '=': c = '#'; break;
@@ -3899,7 +3899,7 @@
c = *pos;
/* If it is a trigraph get the trigraph value */
if (file->trigraphs &&
- (c == '?') && ((end - pos) >= 3) && (pos[1] == '?'))
+ (c == '?') && ((end - pos) >= 3) && (pos[1] == '?'))
{
switch(pos[2]) {
case '=': c = '#'; break;
@@ -3944,7 +3944,7 @@
return len;
}
-static void char_strcpy(char *dest,
+static void char_strcpy(char *dest,
struct file_state *file, const char *src, const char *end)
{
while(src < end) {
@@ -3955,7 +3955,7 @@
}
}
-static char *char_strdup(struct file_state *file,
+static char *char_strdup(struct file_state *file,
const char *start, const char *end, const char *id)
{
char *str;
@@ -4015,7 +4015,7 @@
tk->str_len = strlen(str);
}
-static void raw_next_token(struct compile_state *state,
+static void raw_next_token(struct compile_state *state,
struct file_state *file, struct token *tk)
{
const char *token;
@@ -4052,7 +4052,7 @@
tokp = next_char(file, tokp, 1);
while((c = get_char(file, tokp)) != -1) {
/* Advance to the next character only after we verify
- * the current character is not a newline.
+ * the current character is not a newline.
* EOL is special to the preprocessor so we don't
* want to loose any.
*/
@@ -4144,12 +4144,12 @@
/* Save the character value */
save_string(file, tk, token, tokp, "literal character");
}
- /* integer and floating constants
+ /* integer and floating constants
* Integer Constants
* {digits}
* 0[Xx]{hexdigits}
* 0{octdigit}+
- *
+ *
* Floating constants
* {digits}.{digits}[Ee][+-]?{digits}
* {digits}.{digits}
@@ -4259,9 +4259,9 @@
}
}
/* C99 alternate macro characters */
- else if ((c == '%') && (c1 == ':') && (c2 == '%') && (c3 == ':')) {
+ else if ((c == '%') && (c1 == ':') && (c2 == '%') && (c3 == ':')) {
eat += 3;
- tok = TOK_CONCATENATE;
+ tok = TOK_CONCATENATE;
}
else if ((c == '.') && (c1 == '.') && (c2 == '.')) { eat += 2; tok = TOK_DOTS; }
else if ((c == '<') && (c1 == '<') && (c2 == '=')) { eat += 2; tok = TOK_SLEQ; }
@@ -4344,7 +4344,7 @@
size_t len;
};
static struct macro_arg_value *read_macro_args(
- struct compile_state *state, struct macro *macro,
+ struct compile_state *state, struct macro *macro,
struct file_state *file, struct token *tk)
{
struct macro_arg_value *argv;
@@ -4366,15 +4366,15 @@
}
paren_depth = 0;
i = 0;
-
+
for(;;) {
const char *start;
size_t len;
start = file->pos;
raw_next_token(state, file, tk);
-
+
if (!paren_depth && (tk->tok == TOK_COMMA) &&
- (argv[i].ident != state->i___VA_ARGS__))
+ (argv[i].ident != state->i___VA_ARGS__))
{
i++;
if (i >= macro->argc) {
@@ -4383,11 +4383,11 @@
}
continue;
}
-
+
if (tk->tok == TOK_LPAREN) {
paren_depth++;
}
-
+
if (tk->tok == TOK_RPAREN) {
if (paren_depth == 0) {
break;
@@ -4405,7 +4405,7 @@
argv[i].len += len;
}
if (i != macro->argc -1) {
- error(state, 0, "missing %s arg %d\n",
+ error(state, 0, "missing %s arg %d\n",
macro->ident->name, i +2);
}
return argv;
@@ -4467,14 +4467,14 @@
buf->pos += flen;
}
-static int compile_macro(struct compile_state *state,
+static int compile_macro(struct compile_state *state,
struct file_state **filep, struct token *tk);
-static void macro_expand_args(struct compile_state *state,
+static void macro_expand_args(struct compile_state *state,
struct macro *macro, struct macro_arg_value *argv, struct token *tk)
{
int i;
-
+
for(i = 0; i < macro->argc; i++) {
struct file_state fmacro, *file;
struct macro_buf buf;
@@ -4501,7 +4501,7 @@
file = &fmacro;
for(;;) {
raw_next_token(state, file, tk);
-
+
/* If we have recursed into another macro body
* get out of it.
*/
@@ -4527,7 +4527,7 @@
append_macro_chars(state, macro->ident->name, &buf,
file, tk->pos, file->pos);
}
-
+
xfree(argv[i].value);
argv[i].value = buf.str;
argv[i].len = buf.pos;
@@ -4560,12 +4560,12 @@
fmacro.macro = 1;
fmacro.trigraphs = 0;
fmacro.join_lines = 0;
-
+
/* Allocate a buffer to hold the macro expansion */
buf->len = macro->buf_len + 3;
buf->str = xmalloc(buf->len, macro->ident->name);
buf->pos = 0;
-
+
fstart = fmacro.pos;
raw_next_token(state, &fmacro, tk);
while(tk->tok != TOK_EOF) {
@@ -4609,7 +4609,7 @@
if (*str == '\\') {
str = "\\";
len = 2;
- }
+ }
else if (*str == '"') {
str = "\\\"";
len = 2;
@@ -4651,7 +4651,7 @@
}
append_macro_text(state, macro->ident->name, buf, fstart, flen);
-
+
fstart = fmacro.pos;
raw_next_token(state, &fmacro, tk);
}
@@ -4683,19 +4683,19 @@
fmacro.macro = 1;
fmacro.trigraphs = 0;
fmacro.join_lines = 0;
-
+
/* Allocate a new macro expansion buffer */
buf->len = macro->buf_len + 3;
buf->str = xmalloc(buf->len, macro->ident->name);
buf->pos = 0;
-
+
fstart = fmacro.pos;
raw_next_token(state, &fmacro, tk);
while(tk->tok != TOK_EOF) {
flen = fmacro.pos - fstart;
if ((tk->tok == TOK_IDENT) &&
(tk->ident == macro->ident) &&
- (tk->val.notmacro == 0))
+ (tk->val.notmacro == 0))
{
append_macro_text(state, macro->ident->name, buf, fstart, flen);
fstart = "$";
@@ -4703,14 +4703,14 @@
}
append_macro_text(state, macro->ident->name, buf, fstart, flen);
-
+
fstart = fmacro.pos;
raw_next_token(state, &fmacro, tk);
}
xfree(fmacro.buf);
}
-static int compile_macro(struct compile_state *state,
+static int compile_macro(struct compile_state *state,
struct file_state **filep, struct token *tk)
{
struct file_state *file;
@@ -4817,7 +4817,7 @@
offset = state->if_depth % CHAR_BIT;
return !!(state->if_bytes[index] & (1 << (offset)));
}
-static void set_if_value(struct compile_state *state, int value)
+static void set_if_value(struct compile_state *state, int value)
{
int index, offset;
index = state->if_depth / CHAR_BIT;
@@ -4880,8 +4880,8 @@
rescan = 0;
file = state->file;
/* Exit out of an include directive or macro call */
- if ((tk->tok == TOK_EOF) &&
- (file != state->macro_file) && file->prev)
+ if ((tk->tok == TOK_EOF) &&
+ (file != state->macro_file) && file->prev)
{
state->file = file->prev;
/* file->basename is used keep it */
@@ -4948,8 +4948,8 @@
pp_token(state, tk);
}
}
- /* Eat tokens disabled by the preprocessor
- * (Unless we are parsing a preprocessor directive
+ /* Eat tokens disabled by the preprocessor
+ * (Unless we are parsing a preprocessor directive
*/
else if (if_eat(state) && (state->token_base == 0)) {
pp_token(state, tk);
@@ -4983,7 +4983,7 @@
struct token *tk;
int i;
check_tok(state, get_token(state, 1), tok);
-
+
/* Free the old token value */
tk = get_token(state, 0);
if (tk->str_len) {
@@ -5161,7 +5161,7 @@
*/
int old_token_base;
int tok;
-
+
state->macro_file = state->file;
old_token_base = state->token_base;
@@ -5245,7 +5245,7 @@
pp_eat(state, TOK_MUNDEF);
if (if_eat(state)) /* quit early when #if'd out */
break;
-
+
ident = pp_eat(state, TOK_MIDENT)->ident;
undef_macro(state, ident);
@@ -5255,7 +5255,7 @@
pp_eat(state, TOK_MPRAGMA);
if (if_eat(state)) /* quit early when #if'd out */
break;
- warning(state, 0, "Ignoring pragma");
+ warning(state, 0, "Ignoring pragma");
break;
case TOK_MELIF:
pp_eat(state, TOK_MELIF);
@@ -5266,7 +5266,7 @@
if (if_value(state)) {
eat_tokens(state, TOK_MENDIF);
}
- /* If the previous #if was not taken see if the #elif enables the
+ /* If the previous #if was not taken see if the #elif enables the
* trailing code.
*/
else {
@@ -5358,11 +5358,11 @@
else if (tok == TOK_DOTS) {
pp_eat(state, TOK_DOTS);
aident = state->i___VA_ARGS__;
- }
+ }
else {
aident = pp_eat(state, TOK_MIDENT)->ident;
}
-
+
narg = xcmalloc(sizeof(*arg), "macro arg");
narg->ident = aident;
@@ -5404,7 +5404,7 @@
mend = get_token(state, 1)->pos;
}
}
-
+
/* Now that I have found the body defined the token */
do_define_macro(state, ident,
char_strdup(state->file, mstart, mend, "macro buf"),
@@ -5415,7 +5415,7 @@
{
const char *start, *end;
int len;
-
+
pp_eat(state, TOK_MERROR);
/* Find the start of the line */
raw_peek(state);
@@ -5436,13 +5436,13 @@
{
const char *start, *end;
int len;
-
+
pp_eat(state, TOK_MWARNING);
/* Find the start of the line */
raw_peek(state);
start = get_token(state, 1)->pos;
-
+
/* Find the end of the line */
while((tok = raw_peek(state)) != TOK_EOL) {
raw_eat(state, tok);
@@ -5536,7 +5536,7 @@
if (tok == TOK_MIDENT) {
name2 = get_token(state, 1)->ident->name;
}
- error(state, 0, "Invalid preprocessor directive: %s %s",
+ error(state, 0, "Invalid preprocessor directive: %s %s",
name1, name2);
break;
}
@@ -5621,7 +5621,7 @@
case TYPE_STRUCT:
case TYPE_TUPLE:
member = type->left;
- while(member && (invalid == 0) &&
+ while(member && (invalid == 0) &&
((member->type & TYPE_MASK) == TYPE_PRODUCT)) {
invalid = invalid_type(state, member->left);
member = member->right;
@@ -5647,7 +5647,7 @@
break;
}
return invalid;
-
+
}
#define MASK_UCHAR(X) ((X) & ((ulong_t)0xff))
@@ -5682,7 +5682,7 @@
};
#if DEBUG_ROMCC_WARNING
-static struct type void_func_type = {
+static struct type void_func_type = {
.type = TYPE_FUNCTION,
.left = &void_type,
.right = &void_type,
@@ -5815,19 +5815,19 @@
name_of(fp, type->right);
break;
case TYPE_ENUM:
- fprintf(fp, "enum %s",
+ fprintf(fp, "enum %s",
(type->type_ident)? type->type_ident->name : "");
qual_of(fp, type);
break;
case TYPE_STRUCT:
- fprintf(fp, "struct %s { ",
+ fprintf(fp, "struct %s { ",
(type->type_ident)? type->type_ident->name : "");
name_of(fp, type->left);
fprintf(fp, " } ");
qual_of(fp, type);
break;
case TYPE_UNION:
- fprintf(fp, "union %s { ",
+ fprintf(fp, "union %s { ",
(type->type_ident)? type->type_ident->name : "");
name_of(fp, type->left);
fprintf(fp, " } ");
@@ -5844,7 +5844,7 @@
fprintf(fp, " [%ld]", (long)(type->elements));
break;
case TYPE_TUPLE:
- fprintf(fp, "tuple { ");
+ fprintf(fp, "tuple { ");
name_of(fp, type->left);
fprintf(fp, " } ");
qual_of(fp, type);
@@ -5991,7 +5991,7 @@
static size_t size_of(struct compile_state *state, struct type *type);
static size_t reg_size_of(struct compile_state *state, struct type *type);
-static size_t needed_padding(struct compile_state *state,
+static size_t needed_padding(struct compile_state *state,
struct type *type, size_t offset)
{
size_t padding, align;
@@ -6013,7 +6013,7 @@
return padding;
}
-static size_t reg_needed_padding(struct compile_state *state,
+static size_t reg_needed_padding(struct compile_state *state,
struct type *type, size_t offset)
{
size_t padding, align;
@@ -6022,7 +6022,7 @@
* fit into the current register.
*/
if (((type->type & TYPE_MASK) == TYPE_BITFIELD) &&
- (((offset + type->elements)/REG_SIZEOF_REG) != (offset/REG_SIZEOF_REG)))
+ (((offset + type->elements)/REG_SIZEOF_REG) != (offset/REG_SIZEOF_REG)))
{
align = REG_SIZEOF_REG;
}
@@ -6219,7 +6219,7 @@
return bits_to_bytes(size_of(state, type));
}
-static size_t field_offset(struct compile_state *state,
+static size_t field_offset(struct compile_state *state,
struct type *type, struct hash_entry *field)
{
struct type *member;
@@ -6260,7 +6260,7 @@
return size;
}
-static size_t field_reg_offset(struct compile_state *state,
+static size_t field_reg_offset(struct compile_state *state,
struct type *type, struct hash_entry *field)
{
struct type *member;
@@ -6301,7 +6301,7 @@
return size;
}
-static struct type *field_type(struct compile_state *state,
+static struct type *field_type(struct compile_state *state,
struct type *type, struct hash_entry *field)
{
struct type *member;
@@ -6330,14 +6330,14 @@
else {
internal_error(state, 0, "field_type only works on structures and unions");
}
-
+
if (!member || (member->field_ident != field)) {
error(state, 0, "member %s not present", field->name);
}
return member;
}
-static size_t index_offset(struct compile_state *state,
+static size_t index_offset(struct compile_state *state,
struct type *type, ulong_t index)
{
struct type *member;
@@ -6383,14 +6383,14 @@
}
}
else {
- internal_error(state, 0,
+ internal_error(state, 0,
"request for index %u in something not an array, tuple or join",
index);
}
return size;
}
-static size_t index_reg_offset(struct compile_state *state,
+static size_t index_reg_offset(struct compile_state *state,
struct type *type, ulong_t index)
{
struct type *member;
@@ -6417,7 +6417,7 @@
if (i != index) {
internal_error(state, 0, "Missing member index: %u", index);
}
-
+
}
else if ((type->type & TYPE_MASK) == TYPE_JOIN) {
ulong_t i;
@@ -6437,7 +6437,7 @@
}
}
else {
- internal_error(state, 0,
+ internal_error(state, 0,
"request for index %u in something not an array, tuple or join",
index);
}
@@ -6488,7 +6488,7 @@
}
else {
member = 0;
- internal_error(state, 0,
+ internal_error(state, 0,
"request for index %u in something not an array, tuple or join",
index);
}
@@ -6713,7 +6713,7 @@
name_of(state->errout, type);
fprintf(state->errout, "\n");
internal_error(state, 0, "reg_type not yet defined for type");
-
+
}
}
/* If I have a single register compound type not a bit-field
@@ -6741,7 +6741,7 @@
}
static struct type *next_field(struct compile_state *state,
- struct type *type, struct type *prev_member)
+ struct type *type, struct type *prev_member)
{
struct type *member;
if ((type->type & TYPE_MASK) != TYPE_STRUCT) {
@@ -6762,13 +6762,13 @@
prev_member = 0;
}
if (prev_member) {
- internal_error(state, 0, "prev_member %s not present",
+ internal_error(state, 0, "prev_member %s not present",
prev_member->field_ident->name);
}
return member;
}
-typedef void (*walk_type_fields_cb_t)(struct compile_state *state, struct type *type,
+typedef void (*walk_type_fields_cb_t)(struct compile_state *state, struct type *type,
size_t ret_offset, size_t mem_offset, void *arg);
static void walk_type_fields(struct compile_state *state,
@@ -6791,15 +6791,15 @@
if ((mtype->type & TYPE_MASK) == TYPE_PRODUCT) {
mtype = mtype->left;
}
- walk_type_fields(state, mtype,
- reg_offset +
+ walk_type_fields(state, mtype,
+ reg_offset +
field_reg_offset(state, type, mtype->field_ident),
- mem_offset +
+ mem_offset +
field_offset(state, type, mtype->field_ident),
cb, arg);
tptr = tptr->right;
}
-
+
}
static void walk_type_fields(struct compile_state *state,
@@ -7086,7 +7086,7 @@
result = new_type(qual_type, result, 0);
}
return result;
-
+
}
static struct triple *integral_promotion(
struct compile_state *state, struct triple *def)
@@ -7106,7 +7106,7 @@
def->type = new_type(int_type, 0, 0);
}
else {
- def = triple(state, OP_CONVERT,
+ def = triple(state, OP_CONVERT,
new_type(int_type, 0, 0), def, 0);
}
}
@@ -7165,7 +7165,7 @@
case TYPE_STRUCT:
case TYPE_TUPLE:
case TYPE_UNION:
- case TYPE_JOIN:
+ case TYPE_JOIN:
is_compound = 1;
break;
default:
@@ -7205,8 +7205,8 @@
if (!def) {
return 0;
}
- if ((def->op == OP_ADECL) ||
- (def->op == OP_SDECL) ||
+ if ((def->op == OP_ADECL) ||
+ (def->op == OP_SDECL) ||
(def->op == OP_DEREF) ||
(def->op == OP_BLOBCONST) ||
(def->op == OP_LIST)) {
@@ -7223,7 +7223,7 @@
if (!def) {
internal_error(state, def, "nothing where lvalue expected?");
}
- if (!is_lvalue(state, def)) {
+ if (!is_lvalue(state, def)) {
error(state, def, "lvalue expected");
}
}
@@ -7267,7 +7267,7 @@
static struct triple *read_expr(struct compile_state *state, struct triple *def);
-static struct triple *do_mk_addr_expr(struct compile_state *state,
+static struct triple *do_mk_addr_expr(struct compile_state *state,
struct triple *expr, struct type *type, ulong_t offset)
{
struct triple *result;
@@ -7276,7 +7276,7 @@
ptr_type = new_type(TYPE_POINTER | (type->type & QUAL_MASK), type, 0);
-
+
result = 0;
if (expr->op == OP_ADECL) {
error(state, expr, "address of auto variables not supported");
@@ -7452,7 +7452,7 @@
return def;
}
-int is_write_compatible(struct compile_state *state,
+int is_write_compatible(struct compile_state *state,
struct type *dest, struct type *rval)
{
int compatible = 0;
@@ -7604,7 +7604,7 @@
/* Sanity checks to ensure I am working with the proper types */
ptr_arithmetic(state, left);
arithmetic(state, right);
- if (TYPE_ARITHMETIC(left->type->type) &&
+ if (TYPE_ARITHMETIC(left->type->type) &&
TYPE_ARITHMETIC(right->type->type)) {
type = arithmetic_result(state, left, right);
}
@@ -7620,7 +7620,7 @@
/* boolean helper function */
-static struct triple *ltrue_expr(struct compile_state *state,
+static struct triple *ltrue_expr(struct compile_state *state,
struct triple *expr)
{
switch(expr->op) {
@@ -7636,7 +7636,7 @@
return expr;
}
-static struct triple *lfalse_expr(struct compile_state *state,
+static struct triple *lfalse_expr(struct compile_state *state,
struct triple *expr)
{
return triple(state, OP_LFALSE, &int_type, expr, 0);
@@ -7652,15 +7652,15 @@
/* Generate some intermediate triples */
end = label(state);
var = variable(state, &int_type);
-
+
/* Store the left hand side value */
lstore = write_expr(state, var, left);
/* Jump if the value is false */
- jmp = branch(state, end,
+ jmp = branch(state, end,
lfalse_expr(state, read_expr(state, var)));
mid = label(state);
-
+
/* Store the right hand side value */
rstore = write_expr(state, var, right);
@@ -7669,7 +7669,7 @@
/* Generate the prog for a logical and */
def = mkprog(state, var, lstore, jmp, mid, rstore, end, val, 0UL);
-
+
return def;
}
@@ -7682,17 +7682,17 @@
/* Generate some intermediate triples */
end = label(state);
var = variable(state, &int_type);
-
+
/* Store the left hand side value */
left = write_expr(state, var, left);
-
+
/* Jump if the value is true */
jmp = branch(state, end, read_expr(state, var));
mid = label(state);
-
+
/* Store the right hand side value */
right = write_expr(state, var, right);
-
+
/* An expression for the computed value*/
val = read_expr(state, var);
@@ -7703,7 +7703,7 @@
}
static struct triple *mkcond_expr(
- struct compile_state *state,
+ struct compile_state *state,
struct triple *test, struct triple *left, struct triple *right)
{
struct triple *def, *val, *var, *jmp1, *jmp2, *top, *mid, *end;
@@ -7758,7 +7758,7 @@
/* Store the right hand side value */
right = write_expr(state, var, right);
-
+
/* An expression for the computed value */
val = read_expr(state, var);
@@ -7850,7 +7850,7 @@
insert_triple(state, first, ptr);
ptr->id |= TRIPLE_FLAG_FLATTENED;
ptr->id &= ~TRIPLE_FLAG_LOCAL;
-
+
/* Now flatten the lhs elements */
for(i = 0; i < lhs; i++) {
struct triple **ins = &LHS(ptr, i);
@@ -7881,7 +7881,7 @@
unuse_triple(first, body->prev);
use_triple(body, body->prev);
}
-
+
if (!(val->id & TRIPLE_FLAG_FLATTENED)) {
internal_error(state, val, "val not flattened?");
}
@@ -7993,7 +7993,7 @@
base = MISC(ptr, 0);
offset = bits_to_bytes(field_offset(state, base->type, ptr->u.field));
left = RHS(base, 0);
- ptr = triple(state, OP_ADD, left->type,
+ ptr = triple(state, OP_ADD, left->type,
read_expr(state, left),
int_const(state, &ulong_type, offset));
free_triple(state, base);
@@ -8214,8 +8214,8 @@
if (!equiv_types(right->type, ptr_math)) {
right = mk_cast_expr(state, ptr_math, right);
}
- right = triple(state, op, ptr_math, right,
- int_const(state, ptr_math,
+ right = triple(state, op, ptr_math, right,
+ int_const(state, ptr_math,
size_of_in_bytes(state, left->type->left)));
}
return triple(state, OP_ADD, result_type, left, right);
@@ -8241,8 +8241,8 @@
if (!equiv_types(right->type, ptr_math)) {
right = mk_cast_expr(state, ptr_math, right);
}
- right = triple(state, op, ptr_math, right,
- int_const(state, ptr_math,
+ right = triple(state, op, ptr_math, right,
+ int_const(state, ptr_math,
size_of_in_bytes(state, left->type->left)));
}
return triple(state, OP_SUB, result_type, left, right);
@@ -8288,7 +8288,7 @@
struct triple *val;
lvalue(state, def);
val = read_expr(state, def);
- return triple(state, OP_VAL, def->type,
+ return triple(state, OP_VAL, def->type,
write_expr(state, def,
mk_sub_expr(state, val, int_const(state, &int_type, 1)))
, val);
@@ -8320,12 +8320,12 @@
/* Is this a constant that u.cval has the value.
* Or equivalently is this a constant that read_const
* works on.
- * So far only OP_INTCONST qualifies.
+ * So far only OP_INTCONST qualifies.
*/
return (ins->op == OP_INTCONST);
}
-static int constants_equal(struct compile_state *state,
+static int constants_equal(struct compile_state *state,
struct triple *left, struct triple *right)
{
int equal;
@@ -8402,7 +8402,7 @@
}
}
return count;
-
+
}
#endif
@@ -8465,12 +8465,12 @@
struct triple *ins, struct triple *rhs)
{
switch(rhs->type->type &TYPE_MASK) {
- case TYPE_CHAR:
+ case TYPE_CHAR:
case TYPE_SHORT:
case TYPE_INT:
case TYPE_LONG:
- case TYPE_UCHAR:
- case TYPE_USHORT:
+ case TYPE_UCHAR:
+ case TYPE_USHORT:
case TYPE_UINT:
case TYPE_ULONG:
case TYPE_POINTER:
@@ -8520,7 +8520,7 @@
rval = read_const(state, ins, right);
result = (lval == rval);
}
- else if ((left->op == OP_ADDRCONST) &&
+ else if ((left->op == OP_ADDRCONST) &&
(right->op == OP_ADDRCONST)) {
result = (MISC(left, 0) == MISC(right, 0)) &&
(left->u.cval == right->u.cval);
@@ -8530,7 +8530,7 @@
result = -1;
}
return result;
-
+
}
int const_ucmp(struct compile_state *state, struct triple *ins,
@@ -8555,7 +8555,7 @@
result = -1;
}
}
- else if ((left->op == OP_ADDRCONST) &&
+ else if ((left->op == OP_ADDRCONST) &&
(right->op == OP_ADDRCONST) &&
(MISC(left, 0) == MISC(right, 0))) {
result = 0;
@@ -8652,7 +8652,7 @@
for(;expr;expr = triple_lhs(state, ins, expr)) {
internal_error(state, ins, "unexpected lhs");
}
-
+
}
#endif
@@ -8710,7 +8710,7 @@
}
#endif
-static void mkcopy(struct compile_state *state,
+static void mkcopy(struct compile_state *state,
struct triple *ins, struct triple *rhs)
{
struct block *block;
@@ -8732,7 +8732,7 @@
use_triple(RHS(ins, 0), ins);
}
-static void mkconst(struct compile_state *state,
+static void mkconst(struct compile_state *state,
struct triple *ins, ulong_t value)
{
if (!is_integral(ins) && !is_pointer(ins)) {
@@ -8762,7 +8762,7 @@
}
#if DEBUG_DECOMPOSE_PRINT_TUPLES
-static void print_tuple(struct compile_state *state,
+static void print_tuple(struct compile_state *state,
struct triple *ins, struct triple *tuple)
{
FILE *fp = state->dbgout;
@@ -8773,11 +8773,11 @@
name_of(fp, LHS(tuple, 0)->type);
}
fprintf(fp, "\n");
-
+
}
#endif
-static struct triple *decompose_with_tuple(struct compile_state *state,
+static struct triple *decompose_with_tuple(struct compile_state *state,
struct triple *ins, struct triple *tuple)
{
struct triple *next;
@@ -8799,7 +8799,7 @@
propogate_use(state, ins, tuple);
release_triple(state, ins);
-
+
return next;
}
@@ -8817,7 +8817,7 @@
#endif
get_occurance(ins->occurance);
- tuple = alloc_triple(state, OP_TUPLE, ins->type, -1, -1,
+ tuple = alloc_triple(state, OP_TUPLE, ins->type, -1, -1,
ins->occurance);
for(i = 0; i < tuple->lhs; i++) {
@@ -8834,7 +8834,7 @@
}
-static struct triple *decompose_read(struct compile_state *state,
+static struct triple *decompose_read(struct compile_state *state,
struct triple *ins)
{
struct triple *tuple, *lval;
@@ -8850,7 +8850,7 @@
ins->occurance);
if ((tuple->lhs != lval->lhs) &&
- (!triple_is_def(state, lval) || (tuple->lhs != 1)))
+ (!triple_is_def(state, lval) || (tuple->lhs != 1)))
{
internal_error(state, ins, "lhs size inconsistency?");
}
@@ -8870,7 +8870,7 @@
}
get_occurance(tuple->occurance);
- read = alloc_triple(state, OP_READ, piece->type, -1, -1,
+ read = alloc_triple(state, OP_READ, piece->type, -1, -1,
tuple->occurance);
RHS(read, 0) = piece;
@@ -8897,12 +8897,12 @@
return decompose_with_tuple(state, ins, tuple);
}
-static struct triple *decompose_write(struct compile_state *state,
+static struct triple *decompose_write(struct compile_state *state,
struct triple *ins)
{
struct triple *tuple, *lval, *val;
ulong_t i;
-
+
lval = MISC(ins, 0);
val = RHS(ins, 0);
get_occurance(ins->occurance);
@@ -8910,7 +8910,7 @@
ins->occurance);
if ((tuple->lhs != lval->lhs) &&
- (!triple_is_def(state, lval) || tuple->lhs != 1))
+ (!triple_is_def(state, lval) || tuple->lhs != 1))
{
internal_error(state, ins, "lhs size inconsistency?");
}
@@ -8930,7 +8930,7 @@
}
pval = LHS(val, i);
}
-
+
/* See if the piece is really a bitref */
bitref = 0;
if (piece->op == OP_BITREF) {
@@ -8958,7 +8958,7 @@
}
get_occurance(tuple->occurance);
- write = alloc_triple(state, OP_WRITE, piece->type, -1, -1,
+ write = alloc_triple(state, OP_WRITE, piece->type, -1, -1,
tuple->occurance);
MISC(write, 0) = piece;
RHS(write, 0) = pval;
@@ -8977,7 +8977,7 @@
{
struct decompose_load_info *info = arg;
struct triple *load;
-
+
if (reg_offset > info->tuple->lhs) {
internal_error(state, info->tuple, "lhs to small?");
}
@@ -8987,7 +8987,7 @@
LHS(info->tuple, reg_offset/REG_SIZEOF_REG) = load;
}
-static struct triple *decompose_load(struct compile_state *state,
+static struct triple *decompose_load(struct compile_state *state,
struct triple *ins)
{
struct triple *tuple;
@@ -9020,7 +9020,7 @@
{
struct decompose_store_info *info = arg;
struct triple *store;
-
+
if (reg_offset > info->tuple->lhs) {
internal_error(state, info->tuple, "lhs to small?");
}
@@ -9031,7 +9031,7 @@
LHS(info->tuple, reg_offset/REG_SIZEOF_REG) = store;
}
-static struct triple *decompose_store(struct compile_state *state,
+static struct triple *decompose_store(struct compile_state *state,
struct triple *ins)
{
struct triple *tuple;
@@ -9053,7 +9053,7 @@
return decompose_with_tuple(state, ins, tuple);
}
-static struct triple *decompose_dot(struct compile_state *state,
+static struct triple *decompose_dot(struct compile_state *state,
struct triple *ins)
{
struct triple *tuple, *lval;
@@ -9075,7 +9075,7 @@
#endif
get_occurance(ins->occurance);
- tuple = alloc_triple(state, OP_TUPLE, type, -1, -1,
+ tuple = alloc_triple(state, OP_TUPLE, type, -1, -1,
ins->occurance);
if (((ins->type->type & TYPE_MASK) == TYPE_BITFIELD) &&
@@ -9110,7 +9110,7 @@
piece->u.bitfield.offset = reg_offset % REG_SIZEOF_REG;
}
else if ((reg_offset % REG_SIZEOF_REG) != 0) {
- internal_error(state, ins,
+ internal_error(state, ins,
"request for a nonbitfield sub register?");
}
@@ -9120,7 +9120,7 @@
return decompose_with_tuple(state, ins, tuple);
}
-static struct triple *decompose_index(struct compile_state *state,
+static struct triple *decompose_index(struct compile_state *state,
struct triple *ins)
{
struct triple *tuple, *lval;
@@ -9140,7 +9140,7 @@
#endif
get_occurance(ins->occurance);
- tuple = alloc_triple(state, OP_TUPLE, type, -1, -1,
+ tuple = alloc_triple(state, OP_TUPLE, type, -1, -1,
ins->occurance);
for(i = 0; i < tuple->lhs; i++, idx++) {
@@ -9210,7 +9210,7 @@
case OP_INDEX:
next = decompose_index(state, ins);
break;
-
+
}
#if DEBUG_DECOMPOSE_HIRES
fprintf(fp, "decompose next: %p \n", next);
@@ -9234,7 +9234,7 @@
else {
release_triple(state, ins);
}
- }
+ }
ins = next;
} while(ins != first);
ins = first;
@@ -9243,7 +9243,7 @@
if (ins->op == OP_BITREF) {
if (ins->use) {
internal_error(state, ins, "bitref used");
- }
+ }
else {
release_triple(state, ins);
}
@@ -9973,7 +9973,7 @@
val &= mask;
val <<= (SIZEOF_LONG - ins->u.bitfield.size);
sval = val;
- sval >>= (SIZEOF_LONG - ins->u.bitfield.size);
+ sval >>= (SIZEOF_LONG - ins->u.bitfield.size);
mkconst(state, ins, sval);
}
}
@@ -10094,7 +10094,7 @@
* loop back onto themselves. If I see one don't advance the
* target.
*/
- while(triple_is_structural(state, targ) &&
+ while(triple_is_structural(state, targ) &&
(targ->next != targ) && (targ->next != state->first)) {
targ = targ->next;
}
@@ -10111,7 +10111,7 @@
if (ins->use != 0) {
internal_error(state, ins, "branch use");
}
- /* The challenge here with simplify branch is that I need to
+ /* The challenge here with simplify branch is that I need to
* make modifications to the control flow graph as well
* as to the branch instruction itself. That is handled
* by rebuilding the basic blocks after simplify all is called.
@@ -10128,7 +10128,7 @@
struct triple *targ;
simplified = 0;
targ = branch_target(state, ins);
- if ((targ != ins) && (targ->op == OP_BRANCH) &&
+ if ((targ != ins) && (targ->op == OP_BRANCH) &&
!phi_dependency(targ->u.block))
{
unuse_triple(TARG(ins, 0), ins);
@@ -10208,7 +10208,7 @@
unuse_triple(ins, use);
use_triple(ins->prev, use);
}
-
+
}
}
if (ins->use) {
@@ -10245,7 +10245,7 @@
return;
}
}
-
+
/* See if all of rhs members of a phi are the same */
value = slot[0];
for(i = 1; i < zrhs; i++) {
@@ -10373,11 +10373,11 @@
[OP_BSF ] = { simplify_bsf, COMPILER_SIMPLIFY_OP },
[OP_BSR ] = { simplify_bsr, COMPILER_SIMPLIFY_OP },
[OP_RDMSR ] = { simplify_noop, COMPILER_SIMPLIFY_OP },
-[OP_WRMSR ] = { simplify_noop, COMPILER_SIMPLIFY_OP },
+[OP_WRMSR ] = { simplify_noop, COMPILER_SIMPLIFY_OP },
[OP_HLT ] = { simplify_noop, COMPILER_SIMPLIFY_OP },
};
-static inline void debug_simplify(struct compile_state *state,
+static inline void debug_simplify(struct compile_state *state,
simplify_t do_simplify, struct triple *ins)
{
#if DEBUG_SIMPLIFY_HIRES
@@ -10412,14 +10412,14 @@
else {
do_simplify = table_simplify[op].func;
}
- if (do_simplify &&
+ if (do_simplify &&
!(state->compiler->flags & table_simplify[op].flag)) {
do_simplify = simplify_noop;
}
if (do_simplify && (ins->id & TRIPLE_FLAG_VOLATILE)) {
do_simplify = simplify_noop;
}
-
+
if (!do_simplify) {
internal_error(state, ins, "cannot simplify op: %d %s",
op, tops(op));
@@ -10548,7 +10548,7 @@
ident = lookup(state, name, name_len);
ftype->type_ident = ident;
symbol(state, ident, &ident->sym_ident, def, ftype);
-
+
state->file = file.prev;
state->function = 0;
state->main_function = 0;
@@ -10595,7 +10595,7 @@
name_len = strlen(name);
ident = lookup(state, name, name_len);
-
+
if ((type->type & TYPE_MASK) == TYPE_PRODUCT) {
ulong_t elements = 0;
struct type *field;
@@ -10644,23 +10644,23 @@
register_builtin_function(state, "__builtin_uldiv", OP_UDIVT, uldiv_type,
&ulong_type, &ulong_type);
- register_builtin_function(state, "__builtin_inb", OP_INB, &uchar_type,
+ register_builtin_function(state, "__builtin_inb", OP_INB, &uchar_type,
&ushort_type);
register_builtin_function(state, "__builtin_inw", OP_INW, &ushort_type,
&ushort_type);
- register_builtin_function(state, "__builtin_inl", OP_INL, &uint_type,
+ register_builtin_function(state, "__builtin_inl", OP_INL, &uint_type,
&ushort_type);
- register_builtin_function(state, "__builtin_outb", OP_OUTB, &void_type,
+ register_builtin_function(state, "__builtin_outb", OP_OUTB, &void_type,
&uchar_type, &ushort_type);
- register_builtin_function(state, "__builtin_outw", OP_OUTW, &void_type,
+ register_builtin_function(state, "__builtin_outw", OP_OUTW, &void_type,
&ushort_type, &ushort_type);
- register_builtin_function(state, "__builtin_outl", OP_OUTL, &void_type,
+ register_builtin_function(state, "__builtin_outl", OP_OUTL, &void_type,
&uint_type, &ushort_type);
-
- register_builtin_function(state, "__builtin_bsf", OP_BSF, &int_type,
+
+ register_builtin_function(state, "__builtin_bsf", OP_BSF, &int_type,
&int_type);
- register_builtin_function(state, "__builtin_bsr", OP_BSR, &int_type,
+ register_builtin_function(state, "__builtin_bsr", OP_BSR, &int_type,
&int_type);
msr_type = register_builtin_type(state, "__builtin_msr_t",
@@ -10671,13 +10671,13 @@
&ulong_type);
register_builtin_function(state, "__builtin_wrmsr", OP_WRMSR, &void_type,
&ulong_type, &ulong_type, &ulong_type);
-
- register_builtin_function(state, "__builtin_hlt", OP_HLT, &void_type,
+
+ register_builtin_function(state, "__builtin_hlt", OP_HLT, &void_type,
&void_type);
}
static struct type *declarator(
- struct compile_state *state, struct type *type,
+ struct compile_state *state, struct type *type,
struct hash_entry **ident, int need_ident);
static void decl(struct compile_state *state, struct triple *first);
static struct type *specifier_qualifier_list(struct compile_state *state);
@@ -11208,8 +11208,8 @@
right = read_expr(state, add_expr(state));
integral(state, right);
right = integral_promotion(state, right);
-
- op = (tok == TOK_SL)? OP_SL :
+
+ op = (tok == TOK_SL)? OP_SL :
is_signed(left->type)? OP_SSR: OP_USR;
def = triple(state, op, left->type, left, right);
@@ -11383,7 +11383,7 @@
right = read_expr(state, land_expr(state));
bool(state, right);
- def = mklor_expr(state,
+ def = mklor_expr(state,
ltrue_expr(state, left),
ltrue_expr(state, right));
}
@@ -11457,7 +11457,7 @@
do {
valid_ins(state, ptr);
if ((ptr->op == OP_PHI) || (ptr->op == OP_LIST)) {
- internal_error(state, ptr,
+ internal_error(state, ptr,
"unexpected %s in constant expression",
tops(ptr->op));
}
@@ -11472,8 +11472,8 @@
else if (triple_is_cbranch(state, ptr)) {
struct triple *cond_val;
cond_val = get_cv(state, cv, RHS(ptr, 0));
- if (!cond_val || !is_const(cond_val) ||
- (cond_val->op != OP_INTCONST))
+ if (!cond_val || !is_const(cond_val) ||
+ (cond_val->op != OP_INTCONST))
{
internal_error(state, ptr, "bad branch condition");
}
@@ -11489,16 +11489,16 @@
else if (ptr->op == OP_WRITE) {
struct triple *val;
val = get_cv(state, cv, RHS(ptr, 0));
-
- set_cv(state, cv, MISC(ptr, 0),
+
+ set_cv(state, cv, MISC(ptr, 0),
copy_triple(state, val));
- set_cv(state, cv, ptr,
+ set_cv(state, cv, ptr,
copy_triple(state, val));
ptr = ptr->next;
}
else if (ptr->op == OP_READ) {
- set_cv(state, cv, ptr,
- copy_triple(state,
+ set_cv(state, cv, ptr,
+ copy_triple(state,
get_cv(state, cv, RHS(ptr, 0))));
ptr = ptr->next;
}
@@ -11519,7 +11519,7 @@
else {
error(state, ptr, "impure operation in constant expression");
}
-
+
} while(ptr != head);
/* Get the result value */
@@ -11565,7 +11565,7 @@
* a larger set of statements than standard C. As long
* as the subset of the grammar that is standard C behaves
* correctly this should cause no problems.
- *
+ *
* For the extra token strings accepted by the grammar
* none of them should produce a valid lvalue, so they
* should not produce functioning programs.
@@ -11578,7 +11578,7 @@
case TOK_EQ:
lvalue(state, left);
eat(state, TOK_EQ);
- def = write_expr(state, left,
+ def = write_expr(state, left,
read_expr(state, assignment_expr(state)));
break;
case TOK_TIMESEQ:
@@ -11598,7 +11598,7 @@
case TOK_MODEQ: op = sign? OP_SMOD : OP_UMOD; break;
}
def = write_expr(state, left,
- triple(state, op, left->type,
+ triple(state, op, left->type,
read_expr(state, left), right));
break;
case TOK_PLUSEQ:
@@ -11634,7 +11634,7 @@
case TOK_OREQ: op = OP_OR; break;
}
def = write_expr(state, left,
- triple(state, op, left->type,
+ triple(state, op, left->type,
read_expr(state, left), right));
break;
}
@@ -11711,7 +11711,7 @@
head = test = tail = jmp1 = jmp2 = 0;
if (peek(state) != TOK_SEMI) {
head = expr(state);
- }
+ }
eat(state, TOK_SEMI);
if (peek(state) != TOK_SEMI) {
test = expr(state);
@@ -11843,7 +11843,7 @@
eat(state, TOK_SEMI);
/* See if this last statement in a function */
- last = ((peek(state) == TOK_RBRACE) &&
+ last = ((peek(state) == TOK_RBRACE) &&
(state->scope_depth == GLOBAL_SCOPE_DEPTH +2));
/* Find the return variable */
@@ -12186,7 +12186,7 @@
for(i = 0; i < out; i++) {
struct triple *constraint;
constraint = out_param[i].constraint;
- info->tmpl.lhs[i] = arch_reg_constraint(state,
+ info->tmpl.lhs[i] = arch_reg_constraint(state,
out_param[i].expr->type, constraint->u.blob);
free_triple(state, constraint);
}
@@ -12216,9 +12216,9 @@
}
info->tmpl.lhs[val] = cinfo;
info->tmpl.rhs[i] = cinfo;
-
+
} else {
- info->tmpl.rhs[i] = arch_reg_constraint(state,
+ info->tmpl.rhs[i] = arch_reg_constraint(state,
in_param[i].expr->type, str);
}
free_triple(state, constraint);
@@ -12238,7 +12238,7 @@
size_t size = arch_reg_size(info->tmpl.lhs[i].reg);
if (size >= SIZEOF_LONG) {
type = &ulong_type;
- }
+ }
else if (size >= SIZEOF_INT) {
type = &uint_type;
}
@@ -12315,7 +12315,7 @@
compound_statement(state, first);
}
else if (tok == TOK_IF) {
- if_statement(state, first);
+ if_statement(state, first);
}
else if (tok == TOK_FOR) {
for_statement(state, first);
@@ -12345,7 +12345,7 @@
asm_statement(state, first);
}
else if ((tok == TOK_IDENT) && (peek2(state) == TOK_COLON)) {
- labeled_statement(state, first);
+ labeled_statement(state, first);
}
else if (tok == TOK_CASE) {
case_statement(state, first);
@@ -12367,7 +12367,7 @@
struct type *type;
struct hash_entry *ident;
/* Cheat so the declarator will know we are not global */
- start_scope(state);
+ start_scope(state);
ident = 0;
type = decl_specifiers(state);
type = declarator(state, type, &ident, 0);
@@ -12407,7 +12407,7 @@
}
static struct type *direct_declarator(
- struct compile_state *state, struct type *type,
+ struct compile_state *state, struct type *type,
struct hash_entry **pident, int need_ident)
{
struct hash_entry *ident;
@@ -12485,7 +12485,7 @@
}
static struct type *declarator(
- struct compile_state *state, struct type *type,
+ struct compile_state *state, struct type *type,
struct hash_entry **pident, int need_ident)
{
while(peek(state) == TOK_STAR) {
@@ -12504,7 +12504,7 @@
ident = eat(state, TOK_TYPE_NAME)->ident;
type = ident->sym_ident->type;
specifiers |= type->type & QUAL_MASK;
- if ((specifiers & (STOR_MASK | QUAL_MASK)) !=
+ if ((specifiers & (STOR_MASK | QUAL_MASK)) !=
(type->type & (STOR_MASK | QUAL_MASK))) {
type = clone_type(specifiers, type);
}
@@ -12538,7 +12538,7 @@
struct type *entry;
eident = eat(state, TOK_IDENT)->ident;
if (eident->sym_ident) {
- error(state, 0, "%s already declared",
+ error(state, 0, "%s already declared",
eident->name);
}
eident->tok = TOK_ENUM_CONST;
@@ -12671,13 +12671,13 @@
symbol(state, ident, &ident->sym_tag, 0, struct_type);
}
}
- if (ident && ident->sym_tag &&
- ident->sym_tag->type &&
+ if (ident && ident->sym_tag &&
+ ident->sym_tag->type &&
((ident->sym_tag->type->type & TYPE_MASK) == type_main)) {
struct_type = clone_type(spec, ident->sym_tag->type);
}
else if (ident && !struct_type) {
- error(state, 0, "%s %s undeclared",
+ error(state, 0, "%s %s undeclared",
(type_main == TYPE_STRUCT)?"struct" : "union",
ident->name);
}
@@ -12965,7 +12965,7 @@
type = typedef_name(state, spec);
break;
default:
- error(state, 0, "bad type specifier %s",
+ error(state, 0, "bad type specifier %s",
tokens[tok]);
break;
}
@@ -13145,7 +13145,7 @@
(equiv_types(type->left, result->type->left))) {
type->elements = result->type->elements;
}
- if (is_lvalue(state, result) &&
+ if (is_lvalue(state, result) &&
((result->type->type & TYPE_MASK) == TYPE_ARRAY) &&
(type->type & TYPE_MASK) != TYPE_ARRAY)
{
@@ -13211,7 +13211,7 @@
}
dest = ((char *)buf) + bits_to_bytes(info.offset);
#if DEBUG_INITIALIZER
- fprintf(state->errout, "dest = buf + %d max_offset: %d value_size: %d op: %d\n",
+ fprintf(state->errout, "dest = buf + %d max_offset: %d value_size: %d op: %d\n",
dest - buf,
bits_to_bytes(max_offset),
bits_to_bytes(value_size),
@@ -13243,7 +13243,7 @@
info.offset += value_size;
if ((type->type & TYPE_MASK) == TYPE_STRUCT) {
info.type = next_field(state, type, info.type);
- info.offset = field_offset(state, type,
+ info.offset = field_offset(state, type,
info.type->field_ident);
}
} while(comma && (peek(state) != TOK_RBRACE));
@@ -13338,7 +13338,7 @@
if (((param->type & TYPE_MASK) != TYPE_VOID) && !param->field_ident) {
error(state, 0, "No identifier for paramter %d\n", i);
}
-
+
/* Get a list of statements for this function. */
def = triple(state, OP_LIST, type, 0, 0);
@@ -13361,7 +13361,7 @@
ctype->elements = 1;
/* Add a variable for the return value */
- crtype = new_type(TYPE_TUPLE,
+ crtype = new_type(TYPE_TUPLE,
/* Remove all type qualifiers from the return type */
new_type(TYPE_PRODUCT, ctype, clone_type(0, type->left)), 0);
crtype->elements = 2;
@@ -13394,7 +13394,7 @@
}
/* Add the declaration static const char __func__ [] = "func-name" */
- fname_type = new_type(TYPE_ARRAY,
+ fname_type = new_type(TYPE_ARRAY,
clone_type(QUAL_CONST | STOR_STATIC, &char_type), 0);
fname_type->type |= QUAL_CONST | STOR_STATIC;
fname_type->elements = strlen(state->function) + 1;
@@ -13439,7 +13439,7 @@
return def;
}
-static struct triple *do_decl(struct compile_state *state,
+static struct triple *do_decl(struct compile_state *state,
struct type *type, struct hash_entry *ident)
{
struct triple *def;
@@ -13477,7 +13477,7 @@
((type->type & TYPE_MASK) == TYPE_ARRAY) &&
((type->type & STOR_MASK) != STOR_STATIC))
error(state, 0, "non static arrays not supported");
- if (ident &&
+ if (ident &&
((type->type & STOR_MASK) == STOR_STATIC) &&
((type->type & QUAL_CONST) == 0)) {
error(state, 0, "non const static variables not supported");
@@ -13520,8 +13520,8 @@
}
eat(state, TOK_EQ);
flatten(state, first,
- init_expr(state,
- ident->sym_ident->def,
+ init_expr(state,
+ ident->sym_ident->def,
initializer(state, type)));
}
arrays_complete(state, type);
@@ -13557,7 +13557,7 @@
}
}
-/*
+/*
* Function inlining
*/
struct triple_reg_set {
@@ -13580,21 +13580,21 @@
void *arg);
static void print_block(
struct compile_state *state, struct block *block, void *arg);
-static int do_triple_set(struct triple_reg_set **head,
+static int do_triple_set(struct triple_reg_set **head,
struct triple *member, struct triple *new_member);
static void do_triple_unset(struct triple_reg_set **head, struct triple *member);
static struct reg_block *compute_variable_lifetimes(
struct compile_state *state, struct basic_blocks *bb);
-static void free_variable_lifetimes(struct compile_state *state,
+static void free_variable_lifetimes(struct compile_state *state,
struct basic_blocks *bb, struct reg_block *blocks);
#if DEBUG_EXPLICIT_CLOSURES
-static void print_live_variables(struct compile_state *state,
+static void print_live_variables(struct compile_state *state,
struct basic_blocks *bb, struct reg_block *rb, FILE *fp);
#endif
static struct triple *call(struct compile_state *state,
- struct triple *retvar, struct triple *ret_addr,
+ struct triple *retvar, struct triple *ret_addr,
struct triple *targ, struct triple *ret)
{
struct triple *call;
@@ -13673,19 +13673,19 @@
static void mark_live_functions(struct compile_state *state)
{
- /* Ensure state->main_function is the last function in
+ /* Ensure state->main_function is the last function in
* the list of functions.
*/
if ((state->main_function->next != state->functions) ||
(state->functions->prev != state->main_function)) {
- internal_error(state, 0,
+ internal_error(state, 0,
"state->main_function is not at the end of the function list ");
}
state->main_function->u.cval = 1;
reverse_walk_functions(state, mark_live, 0);
}
-static int local_triple(struct compile_state *state,
+static int local_triple(struct compile_state *state,
struct triple *func, struct triple *ins)
{
int local = (ins->id & TRIPLE_FLAG_LOCAL);
@@ -13699,7 +13699,7 @@
return local;
}
-struct triple *copy_func(struct compile_state *state, struct triple *ofunc,
+struct triple *copy_func(struct compile_state *state, struct triple *ofunc,
struct occurance *base_occurance)
{
struct triple *nfunc;
@@ -13742,7 +13742,7 @@
}
new->id |= TRIPLE_FLAG_FLATTENED;
new->id |= old->id & TRIPLE_FLAG_COPY;
-
+
/* During the copy remember new as user of old */
use_triple(old, new);
@@ -13781,7 +13781,7 @@
old = old->next;
new = new->next;
} while((old != ofirst) && (new != nfirst));
-
+
/* Make a third pass to cleanup the extra useses */
old = ofirst;
new = nfirst;
@@ -13830,7 +13830,7 @@
}
result = 0;
if ((nfunc->type->left->type & TYPE_MASK) != TYPE_VOID) {
- result = read_expr(state,
+ result = read_expr(state,
deref_index(state, fresult(state, nfunc), 1));
}
if (state->compiler->debug & DEBUG_INLINE) {
@@ -13842,8 +13842,8 @@
fprintf(fp, "__________ %s _________ done\n\n", __FUNCTION__);
}
- /*
- * Get rid of the extra triples
+ /*
+ * Get rid of the extra triples
*/
/* Remove the read of the return address */
ins = RHS(nfunc, 0)->prev->prev;
@@ -13859,7 +13859,7 @@
release_triple(state, ins);
/* Remove the retaddres variable */
retvar = fretaddr(state, nfunc);
- if ((retvar->lhs != 1) ||
+ if ((retvar->lhs != 1) ||
(retvar->op != OP_ADECL) ||
(retvar->next->op != OP_PIECE) ||
(MISC(retvar->next, 0) != retvar)) {
@@ -13902,7 +13902,7 @@
/*
*
* Type of the result variable.
- *
+ *
* result
* |
* +----------+------------+
@@ -13912,7 +13912,7 @@
* +------------------+---------------+
* | |
* closure1 ... closuerN
- * | |
+ * | |
* +----+--+-+--------+-----+ +----+----+---+-----+
* | | | | | | | | |
* var1 var2 var3 ... varN result var1 var2 ... varN result
@@ -13930,7 +13930,7 @@
* var1 var2 ... varN result var1 var2 ... varN result
*/
-static int add_closure_type(struct compile_state *state,
+static int add_closure_type(struct compile_state *state,
struct triple *func, struct type *closure_type)
{
struct type *type, *ctype, **next;
@@ -13963,19 +13963,19 @@
fprintf(fp, "new_type: ");
name_of(fp, type);
fprintf(fp, "\n");
- fprintf(fp, "ctype: %p %d bits: %d ",
+ fprintf(fp, "ctype: %p %d bits: %d ",
ctype, ctype->elements, reg_size_of(state, ctype));
name_of(fp, ctype);
fprintf(fp, "\n");
#endif
-
+
/* Regenerate the variable with the new type definition */
new_var = pre_triple(state, var, OP_ADECL, type, 0, 0);
new_var->id |= TRIPLE_FLAG_FLATTENED;
for(i = 0; i < new_var->lhs; i++) {
LHS(new_var, i)->id |= TRIPLE_FLAG_FLATTENED;
}
-
+
/* Point everyone at the new variable */
propogate_use(state, var, new_var);
@@ -13984,7 +13984,7 @@
release_triple(state, LHS(var, i));
}
release_triple(state, var);
-
+
/* Return the index of the added closure type */
return ctype->elements - 1;
}
@@ -14079,7 +14079,7 @@
for(index0 = ins->next->next;
(index0->op == OP_INDEX) &&
(MISC(index0, 0) == result) &&
- (index0->u.cval == 0) ;
+ (index0->u.cval == 0) ;
index0 = write->next)
{
index1 = index0->next;
@@ -14123,12 +14123,12 @@
int i, max_index;
#define MAX_INDICIES (sizeof(used_indicies)*CHAR_BIT)
#define ID_BITS(X) ((X) & (TRIPLE_FLAG_LOCAL -1))
- struct {
+ struct {
unsigned id;
int index;
} *info;
-
+
/* Find the basic blocks of this function */
bb.func = me;
bb.first = RHS(me, 0);
@@ -14177,7 +14177,7 @@
ins = ins->next;
} while(ins != first);
- /*
+ /*
* Build the list of variables to enclose.
*
* A target it to put the same variable in the
@@ -14362,7 +14362,7 @@
if (!*closure_next) {
*closure_next = type;
} else {
- *closure_next = new_type(TYPE_PRODUCT, *closure_next,
+ *closure_next = new_type(TYPE_PRODUCT, *closure_next,
type);
closure_next = &(*closure_next)->right;
}
@@ -14422,22 +14422,22 @@
/* Initialize the return value */
if ((rtype->type & TYPE_MASK) != TYPE_VOID) {
- flatten(state, ret_loc,
- write_expr(state,
+ flatten(state, ret_loc,
+ write_expr(state,
deref_index(state, fresult(state, func), 1),
new_triple(state, OP_UNKNOWNVAL, rtype, 0, 0)));
}
ret_addr = flatten(state, ret_loc, ret_addr);
ret_set = flatten(state, ret_loc, write_expr(state, retvar, ret_addr));
- jmp = flatten(state, ret_loc,
+ jmp = flatten(state, ret_loc,
call(state, retvar, ret_addr, func_first, func_last));
/* Find the result */
if ((rtype->type & TYPE_MASK) != TYPE_VOID) {
struct triple * result;
- result = flatten(state, first,
- read_expr(state,
+ result = flatten(state, first,
+ read_expr(state,
deref_index(state, fresult(state, func), 1)));
propogate_use(state, fcall, result);
@@ -14456,7 +14456,7 @@
}
/* Generate an expression for the value */
new = flatten(state, first,
- read_expr(state,
+ read_expr(state,
closure_expr(state, func, closure_idx, i)));
@@ -14469,7 +14469,7 @@
/*
* If the original is a value update the dominated uses.
*/
-
+
/* Analyze the basic blocks so I can see who dominates whom */
bb.func = me;
bb.first = RHS(me, 0);
@@ -14477,7 +14477,7 @@
bb.func = 0;
}
analyze_basic_blocks(state, &bb);
-
+
#if DEBUG_EXPLICIT_CLOSURES
fprintf(state->errout, "Updating domindated uses: %p -> %p\n",
@@ -14485,7 +14485,7 @@
#endif
/* If fcall dominates the use update the expression */
for(use = set->member->use; use; use = next) {
- /* Replace use modifies the use chain and
+ /* Replace use modifies the use chain and
* removes use, so I must take a copy of the
* next entry early.
*/
@@ -14678,7 +14678,7 @@
if (state->compiler->debug & DEBUG_INLINE) {
FILE *fp = state->errout;
- fprintf(fp, "%s func count: %d\n",
+ fprintf(fp, "%s func count: %d\n",
func->type->type_ident->name, func->u.cval);
}
if (func->u.cval == 0) {
@@ -14703,7 +14703,7 @@
struct asm_info *info;
struct triple *def;
int i, out;
-
+
info = xcmalloc(sizeof(*info), "asm_info");
info->str = "";
@@ -14713,7 +14713,7 @@
def = new_triple(state, OP_ASM, &void_type, out, 0);
def->u.ainfo = info;
def->id |= TRIPLE_FLAG_VOLATILE;
-
+
for(i = 0; i < out; i++) {
struct triple *piece;
piece = triple(state, OP_PIECE, &int_type, def, 0);
@@ -14729,7 +14729,7 @@
struct asm_info *info;
struct triple *def;
int in;
-
+
info = xcmalloc(sizeof(*info), "asm_info");
info->str = "";
@@ -14739,7 +14739,7 @@
def = new_triple(state, OP_ASM, &void_type, 0, in);
def->u.ainfo = info;
def->id |= TRIPLE_FLAG_VOLATILE;
-
+
return def;
}
@@ -14776,11 +14776,11 @@
/* Verify the external arguments */
if (registers_of(state, args_type) > ARCH_INPUT_REGS) {
- error(state, state->main_function,
+ error(state, state->main_function,
"Too many external input arguments");
}
if (registers_of(state, result_type) > ARCH_OUTPUT_REGS) {
- error(state, state->main_function,
+ error(state, state->main_function,
"Too many external output arguments");
}
@@ -14810,8 +14810,8 @@
param = param->left;
}
if (registers_of(state, param) != 1) {
- error(state, state->main_function,
- "Arg: %d %s requires multiple registers",
+ error(state, state->main_function,
+ "Arg: %d %s requires multiple registers",
idx + 1, param->field_ident->name);
}
expr = read_expr(state, LHS(in, idx));
@@ -14819,7 +14819,7 @@
expr = flatten(state, call, expr);
use_triple(expr, call);
- idx++;
+ idx++;
}
@@ -14858,7 +14858,7 @@
}
/* Allocate a dummy containing function */
- func = triple(state, OP_LIST,
+ func = triple(state, OP_LIST,
new_type(TYPE_FUNCTION, &void_type, &void_type), 0, 0);
func->type->type_ident = lookup(state, "", 0);
RHS(func, 0) = state->first;
@@ -14887,7 +14887,7 @@
static int do_use_block(
- struct block *used, struct block_set **head, struct block *user,
+ struct block *used, struct block_set **head, struct block *user,
int front)
{
struct block_set **ptr, *new;
@@ -14942,13 +14942,13 @@
/* Append new to the head of the list, print_block
* depends on this.
*/
- count = do_use_block(used, &used->use, user, 1);
+ count = do_use_block(used, &used->use, user, 1);
used->users += count;
}
static void unuse_block(struct block *used, struct block *unuser)
{
int count;
- count = do_unuse_block(used, &used->use, unuser);
+ count = do_unuse_block(used, &used->use, unuser);
used->users -= count;
}
@@ -15007,7 +15007,7 @@
}
static int walk_triples(
- struct compile_state *state,
+ struct compile_state *state,
int (*cb)(struct compile_state *state, struct triple *ptr, void *arg),
void *arg)
{
@@ -15040,7 +15040,7 @@
}
display_triple(fp, ins);
- if (triple_is_branch(state, ins) && ins->use &&
+ if (triple_is_branch(state, ins) && ins->use &&
(ins->op != OP_RET) && (ins->op != OP_FCALL)) {
internal_error(state, ins, "branch used?");
}
@@ -15161,7 +15161,7 @@
while((edge = block->edges)) {
child = edge->member;
remove_block_edge(block, child);
-
+
if (child && (child->vertex != -1)) {
free_basic_block(state, child);
}
@@ -15172,7 +15172,7 @@
#endif
}
-static void free_basic_blocks(struct compile_state *state,
+static void free_basic_blocks(struct compile_state *state,
struct basic_blocks *bb)
{
struct triple *first, *ins;
@@ -15187,10 +15187,10 @@
}
ins = ins->next;
} while(ins != first);
-
+
}
-static struct block *basic_block(struct compile_state *state,
+static struct block *basic_block(struct compile_state *state,
struct basic_blocks *bb, struct triple *first)
{
struct block *block;
@@ -15209,7 +15209,7 @@
block->vertex = bb->last_vertex;
ptr = first;
do {
- if ((ptr != first) && triple_is_label(state, ptr) && (ptr->use)) {
+ if ((ptr != first) && triple_is_label(state, ptr) && (ptr->use)) {
break;
}
block->last = ptr;
@@ -15224,7 +15224,7 @@
} while (ptr != bb->first);
if ((ptr == bb->first) ||
((ptr->next == bb->first) && (
- triple_is_end(state, ptr) ||
+ triple_is_end(state, ptr) ||
triple_is_ret(state, ptr))))
{
/* The block has no outflowing edges */
@@ -15289,7 +15289,7 @@
struct block_set *edge;
FILE *fp = state->errout;
fprintf(fp, "basic_block: %10p [%2d] ( %10p - %10p )",
- block, block->vertex,
+ block, block->vertex,
block->first, block->last);
for(edge = block->edges; edge; edge = edge->next) {
fprintf(fp, " %10p [%2d]",
@@ -15333,7 +15333,7 @@
FILE *fp = arg;
fprintf(fp, "\nblock: %p (%d) ",
- block,
+ block,
block->vertex);
for(edge = block->edges; edge; edge = edge->next) {
@@ -15357,7 +15357,7 @@
}
fprintf(fp, "users %d: ", block->users);
for(user = block->use; user; user = user->next) {
- fprintf(fp, "%p (%d) ",
+ fprintf(fp, "%p (%d) ",
user->member,
user->member->vertex);
}
@@ -15383,7 +15383,7 @@
}
}
-static void prune_nonblock_triples(struct compile_state *state,
+static void prune_nonblock_triples(struct compile_state *state,
struct basic_blocks *bb)
{
struct block *block;
@@ -15415,7 +15415,7 @@
} while(ins != first);
}
-static void setup_basic_blocks(struct compile_state *state,
+static void setup_basic_blocks(struct compile_state *state,
struct basic_blocks *bb)
{
if (!triple_stores_block(state, bb->first)) {
@@ -15430,8 +15430,8 @@
bb->first_block = basic_block(state, bb, bb->first);
/* Be certain the last instruction of a function, or the
- * entire program is in a basic block. When it is not find
- * the start of the block, insert a label if necessary and build
+ * entire program is in a basic block. When it is not find
+ * the start of the block, insert a label if necessary and build
* basic block. Then add a fake edge from the start block
* to the final block.
*/
@@ -15447,7 +15447,7 @@
add_block_edge(bb->first_block, tail, 0);
use_block(tail, bb->first_block);
}
-
+
/* Find the last basic block.
*/
bb->last_block = block_of_triple(state, bb->first->prev);
@@ -15548,7 +15548,7 @@
return vertex;
}
-static int setup_spdblocks(struct compile_state *state,
+static int setup_spdblocks(struct compile_state *state,
struct basic_blocks *bb, struct sdom_block *sd)
{
struct block *block;
@@ -15558,7 +15558,7 @@
/* Walk through the graph and find unconnected blocks. Add a
* fake edge from the unconnected blocks to the end of the
- * graph.
+ * graph.
*/
block = bb->first_block->last->next->u.block;
for(; block && block != bb->first_block; block = block->last->next->u.block) {
@@ -15602,16 +15602,16 @@
}
}
-static void compute_sdom(struct compile_state *state,
+static void compute_sdom(struct compile_state *state,
struct basic_blocks *bb, struct sdom_block *sd)
{
int i;
- /* // step 2
+ /* // step 2
* for each v <= pred(w) {
* u = EVAL(v);
- * if (semi[u] < semi[w] {
- * semi[w] = semi[u];
- * }
+ * if (semi[u] < semi[w] {
+ * semi[w] = semi[u];
+ * }
* }
* add w to bucket(vertex(semi[w]));
* LINK(parent(w), w);
@@ -15646,22 +15646,22 @@
next = v->sdom_next;
unsdom_block(v);
u = (!v->ancestor) ? v : (compress_ancestors(v), v->label);
- v->block->idom = (u->sdom->vertex < v->sdom->vertex)?
+ v->block->idom = (u->sdom->vertex < v->sdom->vertex)?
u->block : parent->block;
}
}
}
-static void compute_spdom(struct compile_state *state,
+static void compute_spdom(struct compile_state *state,
struct basic_blocks *bb, struct sdom_block *sd)
{
int i;
- /* // step 2
+ /* // step 2
* for each v <= pred(w) {
* u = EVAL(v);
- * if (semi[u] < semi[w] {
- * semi[w] = semi[u];
- * }
+ * if (semi[u] < semi[w] {
+ * semi[w] = semi[u];
+ * }
* }
* add w to bucket(vertex(semi[w]));
* LINK(parent(w), w);
@@ -15695,13 +15695,13 @@
next = v->sdom_next;
unsdom_block(v);
u = (!v->ancestor) ? v : (compress_ancestors(v), v->label);
- v->block->ipdom = (u->sdom->vertex < v->sdom->vertex)?
+ v->block->ipdom = (u->sdom->vertex < v->sdom->vertex)?
u->block : parent->block;
}
}
}
-static void compute_idom(struct compile_state *state,
+static void compute_idom(struct compile_state *state,
struct basic_blocks *bb, struct sdom_block *sd)
{
int i;
@@ -15716,7 +15716,7 @@
sd[1].block->idom = 0;
}
-static void compute_ipdom(struct compile_state *state,
+static void compute_ipdom(struct compile_state *state,
struct basic_blocks *bb, struct sdom_block *sd)
{
int i;
@@ -15733,13 +15733,13 @@
/* Theorem 1:
* Every vertex of a flowgraph G = (V, E, r) except r has
- * a unique immediate dominator.
+ * a unique immediate dominator.
* The edges {(idom(w), w) |w <= V - {r}} form a directed tree
- * rooted at r, called the dominator tree of G, such that
+ * rooted at r, called the dominator tree of G, such that
* v dominates w if and only if v is a proper ancestor of w in
* the dominator tree.
*/
- /* Lemma 1:
+ /* Lemma 1:
* If v and w are vertices of G such that v <= w,
* than any path from v to w must contain a common ancestor
* of v and w in T.
@@ -15752,7 +15752,7 @@
* sdom(u) >= sdom(w). Then idom(w) = sdom(w).
*/
/* Theorem 3:
- * Let w != r and let u be a vertex for which sdom(u) is
+ * Let w != r and let u be a vertex for which sdom(u) is
* minimum amoung vertices u satisfying sdom(w) -> u -> w.
* Then sdom(u) <= sdom(w) and idom(u) = idom(w).
*/
@@ -15770,11 +15770,11 @@
/* Theorem 4:
* For any vertex w != r.
* sdom(w) = min(
- * {v|(v,w) <= E and v < w } U
+ * {v|(v,w) <= E and v < w } U
* {sdom(u) | u > w and there is an edge (v, w) such that u -> v})
*/
/* Corollary 1:
- * Let w != r and let u be a vertex for which sdom(u) is
+ * Let w != r and let u be a vertex for which sdom(u) is
* minimum amoung vertices u satisfying sdom(w) -> u -> w.
* Then:
* { sdom(w) if sdom(w) = sdom(u),
@@ -15782,7 +15782,7 @@
* { idom(u) otherwise
*/
/* The algorithm consists of the following 4 steps.
- * Step 1. Carry out a depth-first search of the problem graph.
+ * Step 1. Carry out a depth-first search of the problem graph.
* Number the vertices from 1 to N as they are reached during
* the search. Initialize the variables used in succeeding steps.
* Step 2. Compute the semidominators of all vertices by applying
@@ -15922,7 +15922,7 @@
for(i = 0; i < depth; i++) {
fprintf(fp, " ");
}
- fprintf(fp, "%3d: %p (%p - %p) @",
+ fprintf(fp, "%3d: %p (%p - %p) @",
block->vertex, block, block->first, block->last);
ins = block->first;
while(ins != block->last && (ins->occurance->line == 0)) {
@@ -15973,7 +15973,7 @@
fprintf(fp, " %d", user->member->vertex);
}
fprintf(fp, "\n");
-
+
for(edge = block->edges; edge; edge = edge->next) {
vertex = print_frontiers(state, fp, edge->member, vertex);
}
@@ -15984,7 +15984,7 @@
{
fprintf(fp, "\ndominance frontiers\n");
print_frontiers(state, fp, bb->first_block, 0);
-
+
}
static void analyze_idominators(struct compile_state *state, struct basic_blocks *bb)
@@ -16050,7 +16050,7 @@
{
fprintf(fp, "\nipdominance frontiers\n");
print_pfrontiers(state, fp, bb->last_block, 0);
-
+
}
static void analyze_ipdominators(struct compile_state *state,
@@ -16086,7 +16086,7 @@
bsub = block_of_triple(state, sub);
if (bdom != bsub) {
result = bdominates(state, bdom, bsub);
- }
+ }
else {
struct triple *ins;
if (!bdom || !bsub) {
@@ -16132,7 +16132,7 @@
if (!triple_is_auto_var(state, var) || !var->use) {
continue;
}
-
+
iter += 1;
work_list = 0;
work_list_tail = &work_list;
@@ -16145,7 +16145,7 @@
continue;
}
if (user->member->op != OP_WRITE) {
- internal_error(state, user->member,
+ internal_error(state, user->member,
"bad variable access");
}
block = user->member->u.block;
@@ -16178,7 +16178,7 @@
/* Insert a phi function for this variable */
get_occurance(var->occurance);
phi = alloc_triple(
- state, OP_PHI, var->type, -1, in_edges,
+ state, OP_PHI, var->type, -1, in_edges,
var->occurance);
phi->u.block = front;
MISC(phi, 0) = var;
@@ -16581,7 +16581,7 @@
struct triple *first, *phi;
struct phi_triple *live;
int phis, i;
-
+
/* Find the first instruction */
first = state->first;
@@ -16592,7 +16592,7 @@
phis += 1;
}
}
-
+
/* Mark them all dead */
live = xcmalloc(sizeof(*live) * (phis + 1), "phi_triple");
phis = 0;
@@ -16606,7 +16606,7 @@
phi->id = phis;
phis += 1;
}
-
+
/* Mark phis alive that are used by non phis */
for(i = 0; i < phis; i++) {
struct triple_set *set;
@@ -16639,7 +16639,7 @@
slot[j] = unknown;
use_triple(unknown, phi);
transform_to_arch_instruction(state, unknown);
-#if 0
+#if 0
warning(state, phi, "variable not set at index %d on all paths to use", j);
#endif
}
@@ -16773,7 +16773,7 @@
}
var = post_triple(state, phi, OP_ADECL, phi->type, 0, 0);
var = var->next; /* point at the var */
-
+
/* Replaces use of phi with var */
propogate_use(state, phi, var);
@@ -16826,7 +16826,7 @@
if (!eblock->first) {
internal_error(state, 0, "empty block?");
}
-
+
/* Make certain the write is placed in the edge block... */
/* Walk through the edge block backwards to find an
* appropriate location for the OP_WRITE.
@@ -16873,7 +16873,7 @@
/* Release the phi function */
release_triple(state, phi);
}
-
+
/* Walk all of the operations to find the adecls */
for(var = first->next; var != first ; var = var->next) {
struct triple_set *use, *use_next;
@@ -16890,7 +16890,7 @@
int zrhs, i, used;
use_next = use->next;
user = use->member;
-
+
/* Generate a read of var */
read = pre_triple(state, user, OP_READ, var->type, var, 0);
use_triple(var, read);
@@ -16909,7 +16909,7 @@
if (used) {
unuse_triple(var, user);
use_triple(read, user);
- }
+ }
/* If we didn't use it release the extra triple */
else {
release_triple(state, read);
@@ -16921,7 +16921,7 @@
#define HI() if (state->compiler->debug & DEBUG_REBUILD_SSA_FORM) { \
FILE *fp = state->dbgout; \
fprintf(fp, "@ %s:%d\n", __FILE__, __LINE__); romcc_print_blocks(state, fp); \
- }
+ }
static void rebuild_ssa_form(struct compile_state *state)
{
@@ -16936,7 +16936,7 @@
HI();
rename_variables(state);
HI();
-
+
prune_block_variables(state, state->bb.first_block);
HI();
prune_unused_phis(state);
@@ -16944,7 +16944,7 @@
}
#undef HI
-/*
+/*
* Register conflict resolution
* =========================================================
*/
@@ -16974,7 +16974,7 @@
if (tinfo.reg >= MAX_REGISTERS) {
tinfo.reg = REG_UNSET;
}
- if ((tinfo.reg != REG_UNSET) &&
+ if ((tinfo.reg != REG_UNSET) &&
(info.reg != REG_UNSET) &&
(tinfo.reg != info.reg)) {
internal_error(state, def, "register conflict");
@@ -17227,7 +17227,7 @@
use_triple(in, ins);
transform_to_arch_instruction(state, in);
return in;
-
+
}
static struct triple *pre_copy(
struct compile_state *state, struct triple *ins, int index)
@@ -17284,7 +17284,7 @@
move->u.block = eblock;
move->id |= TRIPLE_FLAG_PRE_SPLIT;
use_triple(val, move);
-
+
slot[edge] = move;
unuse_triple(val, phi);
use_triple(move, phi);
@@ -17341,7 +17341,7 @@
struct reg_block;
-static int do_triple_set(struct triple_reg_set **head,
+static int do_triple_set(struct triple_reg_set **head,
struct triple *member, struct triple *new_member)
{
struct triple_reg_set **ptr, *new;
@@ -17459,7 +17459,7 @@
return ins;
}
-static int this_def(struct compile_state *state,
+static int this_def(struct compile_state *state,
struct triple *ins, struct triple *other)
{
if (ins == other) {
@@ -17637,7 +17637,7 @@
return blocks;
}
-static void free_variable_lifetimes(struct compile_state *state,
+static void free_variable_lifetimes(struct compile_state *state,
struct basic_blocks *bb, struct reg_block *blocks)
{
int i;
@@ -17660,16 +17660,16 @@
}
typedef void (*wvl_cb_t)(
- struct compile_state *state,
- struct reg_block *blocks, struct triple_reg_set *live,
+ struct compile_state *state,
+ struct reg_block *blocks, struct triple_reg_set *live,
struct reg_block *rb, struct triple *ins, void *arg);
static void walk_variable_lifetimes(struct compile_state *state,
- struct basic_blocks *bb, struct reg_block *blocks,
+ struct basic_blocks *bb, struct reg_block *blocks,
wvl_cb_t cb, void *arg)
{
int i;
-
+
for(i = 1; i <= state->bb.last_vertex; i++) {
struct triple_reg_set *live;
struct triple_reg_set *entry, *next;
@@ -17704,7 +17704,7 @@
* going on.
*/
cb(state, blocks, live, rb, ptr, arg);
-
+
/* Remove the current definition from live */
do_triple_unset(&live, ptr);
@@ -17757,7 +17757,7 @@
block, block->vertex);
for(edge = block->edges; edge; edge = edge->next) {
fprintf(fp, " %p<-%p",
- edge->member,
+ edge->member,
edge->member && edge->member->use?edge->member->use->member : 0);
}
fprintf(fp, "\n");
@@ -17811,7 +17811,7 @@
fprintf(fp, "\n");
}
-static void print_live_variables(struct compile_state *state,
+static void print_live_variables(struct compile_state *state,
struct basic_blocks *bb, struct reg_block *rb, FILE *fp)
{
struct print_live_variable_info info;
@@ -17847,7 +17847,7 @@
#define TRIPLE_FLAG_FREE 1
};
-static void print_dead_triples(struct compile_state *state,
+static void print_dead_triples(struct compile_state *state,
struct dead_triple *dtriple)
{
struct triple *first, *ins;
@@ -17865,7 +17865,7 @@
if ((ins->op == OP_LABEL) && (ins->use)) {
fprintf(fp, "\n%p:\n", ins);
}
- fprintf(fp, "%c",
+ fprintf(fp, "%c",
(dt->flags & TRIPLE_FLAG_ALIVE)?' ': '-');
display_triple(fp, ins);
if (triple_is_branch(state, ins)) {
@@ -17932,7 +17932,7 @@
/* Now put then in an array and mark all of the triples dead */
dtriple = xcmalloc(sizeof(*dtriple) * (triples + 1), "dtriples");
-
+
ins = first;
i = 1;
block = 0;
@@ -18003,7 +18003,7 @@
}
print_dead_triples(state, dtriple);
for(dt = &dtriple[1]; dt <= &dtriple[triples]; dt++) {
- if ((dt->triple->op == OP_NOOP) &&
+ if ((dt->triple->op == OP_NOOP) &&
(dt->flags & TRIPLE_FLAG_ALIVE)) {
internal_error(state, dt->triple, "noop effective?");
}
@@ -18062,13 +18062,13 @@
if (i < 0) {
continue;
}
-
+
/* Find the users color requirements */
rinfo = arch_reg_rhs(state, entry->member, i);
if (rinfo.reg >= MAX_REGISTERS) {
rinfo.reg = REG_UNSET;
}
-
+
/* See if I need a pre_copy */
if (rinfo.reg != REG_UNSET) {
if ((reg != REG_UNSET) && (reg != rinfo.reg)) {
@@ -18085,14 +18085,14 @@
* They do not take up any registers until a
* copy places them in one.
*/
- if ((info.reg == REG_UNNEEDED) &&
+ if ((info.reg == REG_UNNEEDED) &&
(rinfo.reg != REG_UNNEEDED)) {
do_pre_copy = 1;
}
}
do_post_copy =
!do_pre_copy &&
- (((info.reg != REG_UNSET) &&
+ (((info.reg != REG_UNSET) &&
(reg != REG_UNSET) &&
(info.reg != reg)) ||
((info.regcm & regcm) == 0));
@@ -18108,7 +18108,7 @@
if (i < 0) {
continue;
}
-
+
/* Find the users color requirements */
rinfo = arch_reg_rhs(state, entry->member, i);
if (rinfo.reg >= MAX_REGISTERS) {
@@ -18157,7 +18157,7 @@
}
}
regcm &= rinfo.regcm;
-
+
}
if (do_post_copy) {
struct reg_info pre, post;
@@ -18251,7 +18251,7 @@
block, block->vertex);
for(edge = block->edges; edge; edge = edge->next) {
fprintf(fp, " %p<-%p",
- edge->member,
+ edge->member,
edge->member && edge->member->use?edge->member->use->member : 0);
}
fprintf(fp, "\n");
@@ -18297,7 +18297,7 @@
op = ptr->op;
done = (ptr == block->last);
lr = rstate->lrd[ptr->id].lr;
-
+
id = ptr->id;
ptr->id = rstate->lrd[id].orig_id;
SET_REG(ptr->id, lr->color);
@@ -18462,7 +18462,7 @@
right = tmp;
}
index = hash_live_edge(left, right);
-
+
ptr = &rstate->hash[index];
while(*ptr) {
if (((*ptr)->left == left) && ((*ptr)->right == right)) {
@@ -18481,7 +18481,7 @@
return ptr && *ptr;
}
-static void add_live_edge(struct reg_state *rstate,
+static void add_live_edge(struct reg_state *rstate,
struct live_range *left, struct live_range *right)
{
/* FIXME the memory allocation overhead is noticeable here... */
@@ -18520,7 +18520,7 @@
edge->node = right;
left->edges = edge;
left->degree += 1;
-
+
edge = xmalloc(sizeof(*edge), "live_range_edge");
edge->next = right->edges;
edge->node = left;
@@ -18572,7 +18572,7 @@
}
}
-static void transfer_live_edges(struct reg_state *rstate,
+static void transfer_live_edges(struct reg_state *rstate,
struct live_range *dest, struct live_range *src)
{
struct live_range_edge *edge, *next;
@@ -18587,7 +18587,7 @@
/* Interference graph...
- *
+ *
* new(n) --- Return a graph with n nodes but no edges.
* add(g,x,y) --- Return a graph including g with an between x and y
* interfere(g, x, y) --- Return true if there exists an edge between the nodes
@@ -18600,11 +18600,11 @@
* The adjacency vectors support an efficient implementation of neighbors.
*/
-/*
+/*
* +---------------------------------------------------+
* | +--------------+ |
* v v | |
- * renumber -> build graph -> colalesce -> spill_costs -> simplify -> select
+ * renumber -> build graph -> colalesce -> spill_costs -> simplify -> select
*
* -- In simplify implment optimistic coloring... (No backtracking)
* -- Implement Rematerialization it is the only form of spilling we can perform
@@ -18620,7 +18620,7 @@
#if DEBUG_ROMCC_WARNING
static void different_colored(
- struct compile_state *state, struct reg_state *rstate,
+ struct compile_state *state, struct reg_state *rstate,
struct triple *parent, struct triple *ins)
{
struct live_range *lr;
@@ -18656,13 +18656,13 @@
}
if ((lr1->color == REG_UNNEEDED) ||
(lr2->color == REG_UNNEEDED)) {
- internal_error(state, 0,
+ internal_error(state, 0,
"cannot coalesce live ranges without a possible color");
}
if ((lr1->color != lr2->color) &&
(lr1->color != REG_UNSET) &&
(lr2->color != REG_UNSET)) {
- internal_error(state, lr1->defs->def,
+ internal_error(state, lr1->defs->def,
"cannot coalesce live ranges of different colors");
}
color = lr1->color;
@@ -18693,7 +18693,7 @@
/* If there is a clear dominate live range put it in lr1,
* For purposes of this test phi functions are
* considered dominated by the definitions that feed into
- * them.
+ * them.
*/
if ((lr1->defs->prev->def->op == OP_PHI) ||
((lr2->defs->prev->def->op != OP_PHI) &&
@@ -18724,12 +18724,12 @@
lr2->defs->def,
lr2->color);
#endif
-
+
/* Append lr2 onto lr1 */
#if DEBUG_ROMCC_WARNINGS
#warning "FIXME should this be a merge instead of a splice?"
#endif
- /* This FIXME item applies to the correctness of live_range_end
+ /* This FIXME item applies to the correctness of live_range_end
* and to the necessity of making multiple passes of coalesce_live_ranges.
* A failure to find some coalesce opportunities in coaleace_live_ranges
* does not impact the correct of the compiler just the efficiency with
@@ -18739,7 +18739,7 @@
mid1 = lr1->defs->prev;
mid2 = lr2->defs;
end = lr2->defs->prev;
-
+
head->prev = end;
end->next = head;
@@ -18844,7 +18844,7 @@
rstate->lr[i].classes = info.regcm;
rstate->lr[i].degree = 0;
rstate->lrd[j].lr = &rstate->lr[i];
- }
+ }
/* Otherwise give the triple the dummy live range. */
else {
rstate->lrd[j].lr = &rstate->lr[0];
@@ -18871,7 +18871,7 @@
if (ins->id > rstate->defs) {
internal_error(state, ins, "bad id");
}
-
+
/* Walk through the template of ins and coalesce live ranges */
zlhs = ins->lhs;
if ((zlhs == 0) && triple_is_def(state, ins)) {
@@ -18917,7 +18917,7 @@
}
if (rinfo.reg == linfo.reg) {
- coalesce_ranges(state, rstate,
+ coalesce_ranges(state, rstate,
lhs->lr, rhs->lr);
}
}
@@ -18927,8 +18927,8 @@
}
static void graph_ins(
- struct compile_state *state,
- struct reg_block *blocks, struct triple_reg_set *live,
+ struct compile_state *state,
+ struct reg_block *blocks, struct triple_reg_set *live,
struct reg_block *rb, struct triple *ins, void *arg)
{
struct reg_state *rstate = arg;
@@ -18943,7 +18943,7 @@
return;
}
def = rstate->lrd[ins->id].lr;
-
+
/* Create an edge between ins and everything that is
* alive, unless the live_range cannot share
* a physical register with ins.
@@ -18991,8 +18991,8 @@
}
static void verify_graph_ins(
- struct compile_state *state,
- struct reg_block *blocks, struct triple_reg_set *live,
+ struct compile_state *state,
+ struct reg_block *blocks, struct triple_reg_set *live,
struct reg_block *rb, struct triple *ins, void *arg)
{
struct reg_state *rstate = arg;
@@ -19013,17 +19013,17 @@
}
lr2 = get_verify_live_range(state, rstate, entry2->member);
if (lr1 == lr2) {
- internal_error(state, entry2->member,
+ internal_error(state, entry2->member,
"live range with 2 values simultaneously alive");
}
if (!arch_regcm_intersect(lr1->classes, lr2->classes)) {
continue;
}
if (!interfere(rstate, lr1, lr2)) {
- internal_error(state, entry2->member,
+ internal_error(state, entry2->member,
"edges don't interfere?");
}
-
+
lr1_found = 0;
lr2_degree = 0;
for(edge2 = lr2->edges; edge2; edge2 = edge2->next) {
@@ -19047,8 +19047,8 @@
#endif
static void print_interference_ins(
- struct compile_state *state,
- struct reg_block *blocks, struct triple_reg_set *live,
+ struct compile_state *state,
+ struct reg_block *blocks, struct triple_reg_set *live,
struct reg_block *rb, struct triple *ins, void *arg)
{
struct reg_state *rstate = arg;
@@ -19118,7 +19118,7 @@
* Forcing a value to stay in a single register
* for an extended period of time does have
* limitations when applied to non homogenous
- * register pool.
+ * register pool.
*
* The two cases I have identified are:
* 1) Two forced register assignments may
@@ -19136,7 +19136,7 @@
* functions. This creates a 2 headed live
* range that cannot be sanely split.
*
- * - phi functions (coalesced in initialize_live_ranges)
+ * - phi functions (coalesced in initialize_live_ranges)
* are handled as pre split live ranges so we will
* never attempt to split them.
*/
@@ -19186,7 +19186,7 @@
if ((lr1->classes & lr2->classes) == 0) {
continue;
}
-
+
if (interfere(rstate, lr1, lr2)) {
continue;
}
@@ -19261,7 +19261,7 @@
{
int conflicts;
conflicts = 0;
- walk_variable_lifetimes(state, &state->bb, blocks,
+ walk_variable_lifetimes(state, &state->bb, blocks,
fix_coalesce_conflicts, &conflicts);
return conflicts;
}
@@ -19277,7 +19277,7 @@
}
}
-static void replace_block_use(struct compile_state *state,
+static void replace_block_use(struct compile_state *state,
struct reg_block *blocks, struct triple *orig, struct triple *new)
{
int i;
@@ -19369,7 +19369,7 @@
}
info = find_lhs_color(state, tangle, 0);
SET_INFO(tangle->id, info);
-
+
return copy;
}
@@ -19395,7 +19395,7 @@
}
reg_inc_used(state, used, info.reg);
}
-
+
/* Now find the least dominated definition of a register in
* conflict I have seen so far.
*/
@@ -19408,7 +19408,7 @@
/* Changing copies that feed into phi functions
* is incorrect.
*/
- if (set->member->use &&
+ if (set->member->use &&
(set->member->use->member->op == OP_PHI)) {
continue;
}
@@ -19438,7 +19438,7 @@
int tangles;
tangles = 0;
color_instructions(state);
- walk_variable_lifetimes(state, &state->bb, blocks,
+ walk_variable_lifetimes(state, &state->bb, blocks,
fix_tangles, &tangles);
return tangles;
}
@@ -19469,7 +19469,7 @@
if (regcm == info.regcm) {
continue;
}
-
+
/* If there is just one use.
* That use cannot accept a larger register class.
* There are no intervening definitions except
@@ -19480,7 +19480,7 @@
#if DEBUG_ROMCC_WARNINGS
#warning "FIXME ignore cases that cannot be fixed (a definition followed by a use)"
#endif
-
+
/* Of the constrained live ranges deal with the
* least dominated one first.
@@ -19489,7 +19489,7 @@
fprintf(state->errout, "canidate: %p %-8s regcm: %x %x\n",
lrd->def, tops(lrd->def->op), regcm, info.regcm);
}
- if (!constrained ||
+ if (!constrained ||
tdominates(state, lrd->def, constrained))
{
constrained = lrd->def;
@@ -19499,13 +19499,13 @@
}
static int split_constrained_ranges(
- struct compile_state *state, struct reg_state *rstate,
+ struct compile_state *state, struct reg_state *rstate,
struct live_range *range)
{
/* Walk through the edges in conflict and our current live
* range, and find definitions that are more severly constrained
* than they type of data they contain require.
- *
+ *
* Then pick one of those ranges and relax the constraints.
*/
struct live_range_edge *edge;
@@ -19533,14 +19533,14 @@
}
return !!constrained;
}
-
+
static int split_ranges(
struct compile_state *state, struct reg_state *rstate,
char *used, struct live_range *range)
{
int split;
if (state->compiler->debug & DEBUG_RANGE_CONFLICTS) {
- fprintf(state->errout, "split_ranges %d %s %p\n",
+ fprintf(state->errout, "split_ranges %d %s %p\n",
rstate->passes, tops(range->defs->def->op), range->defs->def);
}
if ((range->color == REG_UNNEEDED) ||
@@ -19550,7 +19550,7 @@
split = split_constrained_ranges(state, rstate, range);
/* Ideally I would split the live range that will not be used
- * for the longest period of time in hopes that this will
+ * for the longest period of time in hopes that this will
* (a) allow me to spill a register or
* (b) allow me to place a value in another register.
*
@@ -19564,7 +19564,7 @@
#if DEBUG_ROMCC_WARNINGS
#warning "WISHLIST implement live range splitting..."
#endif
-
+
if (!split && (state->compiler->debug & DEBUG_RANGE_CONFLICTS2)) {
FILE *fp = state->errout;
print_interference_blocks(state, rstate, fp, 0);
@@ -19616,7 +19616,7 @@
}
}
-static int select_free_color(struct compile_state *state,
+static int select_free_color(struct compile_state *state,
struct reg_state *rstate, struct live_range *range)
{
struct triple_set *entry;
@@ -19646,7 +19646,7 @@
for(edge = range->edges; edge; edge = edge->next) {
i++;
}
- cgdebug_printf(state, "\n%s edges: %d",
+ cgdebug_printf(state, "\n%s edges: %d",
tops(range->defs->def->op), i);
cgdebug_loc(state, range->defs->def);
cgdebug_printf(state, "\n");
@@ -19656,7 +19656,7 @@
arch_reg_str(i));
}
}
- }
+ }
/* If a color is already assigned see if it will work */
if (range->color != REG_UNSET) {
@@ -19784,7 +19784,7 @@
* pick the first color that is free.
*/
if (range->color == REG_UNSET) {
- range->color =
+ range->color =
arch_select_free_register(state, used, range->classes);
}
if (range->color == REG_UNSET) {
@@ -19810,7 +19810,7 @@
tops(lrd->def->op), lrd->def);
lrd = lrd->next;
} while(lrd != range->defs);
-
+
warning(state, range->defs->def, "classes: %x",
range->classes);
for(i = 0; i < MAX_REGISTERS; i++) {
@@ -19923,7 +19923,7 @@
do {
if (triple_is_def(state, ins)) {
if ((ins->id < 0) || (ins->id > rstate->defs)) {
- internal_error(state, ins,
+ internal_error(state, ins,
"triple without a live range def");
}
lr = rstate->lrd[ins->id].lr;
@@ -19958,7 +19958,7 @@
ins = first;
do {
if ((ins->id < 0) || (ins->id > rstate->defs)) {
- internal_error(state, ins,
+ internal_error(state, ins,
"triple without a live range");
}
lrd = &rstate->lrd[ins->id];
@@ -19979,7 +19979,7 @@
mid = first + size/2;
first = merge_sort_lr(first, mid -1);
mid = merge_sort_lr(mid, last);
-
+
join = 0;
join_tail = &join;
/* merge the two lists */
@@ -20008,7 +20008,7 @@
/* Splice the remaining list */
pick = (first)? first : mid;
*join_tail = pick;
- if (pick) {
+ if (pick) {
pick->group_prev = join_tail;
}
}
@@ -20021,7 +20021,7 @@
return join;
}
-static void ids_from_rstate(struct compile_state *state,
+static void ids_from_rstate(struct compile_state *state,
struct reg_state *rstate)
{
struct triple *ins, *first;
@@ -20117,14 +20117,14 @@
tangles = correct_tangles(state, rstate.blocks);
} while(tangles);
-
+
print_blocks(state, "resolve_tangles", state->dbgout);
verify_consistency(state);
-
+
/* Allocate and initialize the live ranges */
initialize_live_ranges(state, &rstate);
- /* Note currently doing coalescing in a loop appears to
+ /* Note currently doing coalescing in a loop appears to
* buys me nothing. The code is left this way in case
* there is some value in it. Or if a future bugfix
* yields some benefit.
@@ -20139,18 +20139,18 @@
/* Compute the interference graph */
walk_variable_lifetimes(
- state, &state->bb, rstate.blocks,
+ state, &state->bb, rstate.blocks,
graph_ins, &rstate);
-
+
/* Display the interference graph if desired */
if (state->compiler->debug & DEBUG_INTERFERENCE) {
print_interference_blocks(state, &rstate, state->dbgout, 1);
fprintf(state->dbgout, "\nlive variables by instruction\n");
walk_variable_lifetimes(
- state, &state->bb, rstate.blocks,
+ state, &state->bb, rstate.blocks,
print_interference_ins, &rstate);
}
-
+
coalesced = coalesce_live_ranges(state, &rstate);
if (state->compiler->debug & DEBUG_COALESCING) {
@@ -20164,13 +20164,13 @@
# endif
/* Verify the interference graph */
walk_variable_lifetimes(
- state, &state->bb, rstate.blocks,
+ state, &state->bb, rstate.blocks,
verify_graph_ins, &rstate);
# if 0
fprintf(state->errout, "verify_graph_ins done\n");
#endif
#endif
-
+
/* Build the groups low and high. But with the nodes
* first sorted by degree order.
*/
@@ -20190,13 +20190,13 @@
struct live_range *range;
next = &(*point)->group_next;
range = *point;
-
+
/* If it has a low degree or it already has a color
* place the node in low.
*/
if ((range->degree < regc_max_size(state, range->classes)) ||
(range->color != REG_UNSET)) {
- cgdebug_printf(state, "Lo: %5d degree %5d%s\n",
+ cgdebug_printf(state, "Lo: %5d degree %5d%s\n",
range - rstate.lr, range->degree,
(range->color != REG_UNSET) ? " (colored)": "");
*range->group_prev = range->group_next;
@@ -20213,7 +20213,7 @@
next = point;
}
else {
- cgdebug_printf(state, "hi: %5d degree %5d%s\n",
+ cgdebug_printf(state, "hi: %5d degree %5d%s\n",
range - rstate.lr, range->degree,
(range->color != REG_UNSET) ? " (colored)": "");
}
@@ -20306,7 +20306,7 @@
return (lnode->val != lnode->def) && !is_scc_const(state, lnode->val);
}
-static void scc_add_fedge(struct compile_state *state, struct scc_state *scc,
+static void scc_add_fedge(struct compile_state *state, struct scc_state *scc,
struct flow_edge *fedge)
{
if (state->compiler->debug & DEBUG_SCC_TRANSFORM2) {
@@ -20436,12 +20436,12 @@
ins_count, ssa_edge_count, state->bb.last_vertex);
}
scc->ins_count = ins_count;
- scc->lattice =
+ scc->lattice =
xcmalloc(sizeof(*scc->lattice)*(ins_count + 1), "lattice");
- scc->ssa_edges =
+ scc->ssa_edges =
xcmalloc(sizeof(*scc->ssa_edges)*(ssa_edge_count + 1), "ssa_edges");
- scc->flow_blocks =
- xcmalloc(sizeof(*scc->flow_blocks)*(state->bb.last_vertex + 1),
+ scc->flow_blocks =
+ xcmalloc(sizeof(*scc->flow_blocks)*(state->bb.last_vertex + 1),
"flow_blocks");
/* Initialize pass one collect up the nodes */
@@ -20580,7 +20580,7 @@
fedge->out_next = 0;
fedge->executable = 0;
fedge->dst->in = fedge;
-
+
/* Initialize the work lists */
scc->flow_work_list = 0;
scc->ssa_work_list = 0;
@@ -20592,7 +20592,7 @@
}
}
-
+
static void free_scc_state(
struct compile_state *state, struct scc_state *scc)
{
@@ -20608,7 +20608,7 @@
xfree(scc->flow_blocks);
xfree(scc->ssa_edges);
xfree(scc->lattice);
-
+
}
static struct lattice_node *triple_to_lattice(
@@ -20637,7 +20637,7 @@
return old;
}
-static int lval_changed(struct compile_state *state,
+static int lval_changed(struct compile_state *state,
struct triple *old, struct lattice_node *lnode)
{
int changed;
@@ -20672,7 +20672,7 @@
struct triple *val, **expr;
val = lnode->val? lnode->val : lnode->def;
fprintf(fp, "%p %s %3d %10s (",
- lnode->def,
+ lnode->def,
((lnode->def->op == OP_PHI)? "phi: ": "expr:"),
lnode->def->id,
tops(lnode->def->op));
@@ -20700,7 +20700,7 @@
struct triple *old, *scratch;
struct triple **dexpr, **vexpr;
int count, i;
-
+
/* Store the original value */
old = preserve_lval(state, lnode);
@@ -20757,9 +20757,9 @@
lnode->val = 0; /* Lattice low by definition */
}
/* Find the case when I am lattice high */
- if (lnode->val &&
+ if (lnode->val &&
(lnode->val->op == lnode->def->op) &&
- (memcmp(lnode->val->param, lnode->def->param,
+ (memcmp(lnode->val->param, lnode->def->param,
count * sizeof(lnode->val->param[0])) == 0) &&
(memcmp(&lnode->val->u, &lnode->def->u, sizeof(lnode->def->u)) == 0)) {
lnode->val = lnode->def;
@@ -20782,7 +20782,7 @@
}
}
/* Find the cases that are always lattice lo */
- if (lnode->val &&
+ if (lnode->val &&
triple_is_def(state, lnode->val) &&
!triple_is_pure(state, lnode->val, lnode->old_id)) {
lnode->val = 0;
@@ -20790,7 +20790,7 @@
/* See if the lattice value has changed */
changed = lval_changed(state, old, lnode);
/* See if this value should not change */
- if ((lnode->val != lnode->def) &&
+ if ((lnode->val != lnode->def) &&
(( !triple_is_def(state, lnode->def) &&
!triple_is_cbranch(state, lnode->def)) ||
(lnode->def->op == OP_PIECE))) {
@@ -20807,7 +20807,7 @@
if (lnode->val != scratch) {
xfree(scratch);
}
-
+
return changed;
}
@@ -20834,7 +20834,7 @@
fprintf(fp, "%s: %d (",
tops(lnode->def->op),
lnode->def->id);
-
+
for(fedge = lnode->fblock->out; fedge; fedge = fedge->out_next) {
fprintf(fp, " %d", fedge->dst->block->vertex);
}
@@ -20882,7 +20882,7 @@
}
-static void scc_add_sedge_dst(struct compile_state *state,
+static void scc_add_sedge_dst(struct compile_state *state,
struct scc_state *scc, struct ssa_edge *sedge)
{
if (triple_is_cbranch(state, sedge->dst->def)) {
@@ -20893,7 +20893,7 @@
}
}
-static void scc_visit_phi(struct compile_state *state, struct scc_state *scc,
+static void scc_visit_phi(struct compile_state *state, struct scc_state *scc,
struct lattice_node *lnode)
{
struct lattice_node *tmp;
@@ -20913,7 +20913,7 @@
index = 0;
for(fedge = lnode->fblock->in; fedge; index++, fedge = fedge->in_next) {
if (state->compiler->debug & DEBUG_SCC_TRANSFORM) {
- fprintf(state->errout, "Examining edge: %d vertex: %d executable: %d\n",
+ fprintf(state->errout, "Examining edge: %d vertex: %d executable: %d\n",
index,
fedge->dst->block->vertex,
fedge->executable
@@ -21001,14 +21001,14 @@
struct flow_edge *fedge;
int executable;
executable = 0;
- for(fedge = lnode->fblock->in;
+ for(fedge = lnode->fblock->in;
!executable && fedge; fedge = fedge->in_next) {
executable |= fedge->executable;
}
if (executable) {
internal_warning(state, lnode->def,
"lattice node %d %s->%s still high?",
- ins->id,
+ ins->id,
tops(lnode->def->op),
tops(lnode->val->op));
}
@@ -21024,7 +21024,7 @@
mkconst(state, ins, lnode->val->u.cval);
break;
case OP_ADDRCONST:
- mkaddr_const(state, ins,
+ mkaddr_const(state, ins,
MISC(lnode->val, 0), lnode->val->u.cval);
break;
default:
@@ -21083,9 +21083,9 @@
reps++;
}
}
-
+
if (state->compiler->debug & DEBUG_SCC_TRANSFORM) {
- fprintf(state->errout, "vertex: %d reps: %d\n",
+ fprintf(state->errout, "vertex: %d reps: %d\n",
block->vertex, reps);
}
@@ -21138,11 +21138,11 @@
}
}
}
-
+
scc_writeback_values(state, &scc);
free_scc_state(state, &scc);
rebuild_ssa_form(state);
-
+
print_blocks(state, __func__, state->dbgout);
}
@@ -21155,7 +21155,7 @@
do {
ins = transform_to_arch_instruction(state, ins);
} while(ins != first);
-
+
print_blocks(state, __func__, state->dbgout);
}
@@ -21226,7 +21226,7 @@
}
ins = ins->next;
} while(ins != first);
-
+
}
static void verify_blocks_present(struct compile_state *state)
{
@@ -21240,14 +21240,14 @@
valid_ins(state, ins);
if (triple_stores_block(state, ins)) {
if (!ins->u.block) {
- internal_error(state, ins,
+ internal_error(state, ins,
"%p not in a block?", ins);
}
}
ins = ins->next;
} while(ins != first);
-
-
+
+
}
static int edge_present(struct compile_state *state, struct block *block, struct triple *edge)
@@ -21332,12 +21332,12 @@
}
}
if (block->users != users) {
- internal_error(state, block->first,
+ internal_error(state, block->first,
"computed users %d != stored users %d",
users, block->users);
}
if (!triple_stores_block(state, block->last->next)) {
- internal_error(state, block->last->next,
+ internal_error(state, block->last->next,
"cannot find next block");
}
block = block->last->next->u.block;
@@ -21359,7 +21359,7 @@
if (!state->bb.first_block) {
return;
}
-
+
first = state->first;
ins = first;
do {
@@ -21386,7 +21386,7 @@
bset = bset->next;
}
if (!bset) {
- internal_error(state, set->member,
+ internal_error(state, set->member,
"no edge for phi rhs %d", i);
}
use_point = bset->member->last;
@@ -21395,11 +21395,11 @@
if (use_point &&
!tdominates(state, ins, use_point)) {
if (is_const(ins)) {
- internal_warning(state, ins,
+ internal_warning(state, ins,
"non dominated rhs use point %p?", use_point);
}
else {
- internal_error(state, ins,
+ internal_error(state, ins,
"non dominated rhs use point %p?", use_point);
}
}
@@ -21464,7 +21464,7 @@
static void verify_ins_colors(struct compile_state *state)
{
struct triple *first, *ins;
-
+
first = state->first;
ins = first;
do {
@@ -21581,7 +21581,7 @@
fprintf(state->dbgout, "consistency verified\n");
}
}
-#else
+#else
static void verify_consistency(struct compile_state *state) {}
#endif /* DEBUG_CONSISTENCY */
@@ -21694,7 +21694,7 @@
param);
}
piece = (param < lhs)? LHS(ins, param) : RHS(ins, param - lhs);
- fprintf(fp, "%s",
+ fprintf(fp, "%s",
arch_reg_str(ID_REG(piece->id)));
ptr = next -1;
}
@@ -21954,14 +21954,14 @@
{
/* See if two register classes may have overlapping registers */
unsigned gpr_mask = REGCM_GPR8 | REGCM_GPR8_LO | REGCM_GPR16_8 | REGCM_GPR16 |
- REGCM_GPR32_8 | REGCM_GPR32 |
+ REGCM_GPR32_8 | REGCM_GPR32 |
REGCM_DIVIDEND32 | REGCM_DIVIDEND64;
/* Special case for the immediates */
if ((regcm1 & (REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8)) &&
((regcm1 & ~(REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8)) == 0) &&
(regcm2 & (REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8)) &&
- ((regcm2 & ~(REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8)) == 0)) {
+ ((regcm2 & ~(REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8)) == 0)) {
return 0;
}
return (regcm1 & regcm2) ||
@@ -21994,7 +21994,7 @@
*equiv++ = REG_DXAX;
*equiv++ = REG_EDXEAX;
break;
- case REG_BL:
+ case REG_BL:
#if X86_4_8BIT_GPRS
*equiv++ = REG_BH;
#endif
@@ -22054,19 +22054,19 @@
*equiv++ = REG_BH;
*equiv++ = REG_EBX;
break;
- case REG_CX:
+ case REG_CX:
*equiv++ = REG_CL;
*equiv++ = REG_CH;
*equiv++ = REG_ECX;
break;
- case REG_DX:
+ case REG_DX:
*equiv++ = REG_DL;
*equiv++ = REG_DH;
*equiv++ = REG_EDX;
*equiv++ = REG_DXAX;
*equiv++ = REG_EDXEAX;
break;
- case REG_SI:
+ case REG_SI:
*equiv++ = REG_ESI;
break;
case REG_DI:
@@ -22102,19 +22102,19 @@
*equiv++ = REG_DXAX;
*equiv++ = REG_EDXEAX;
break;
- case REG_ESI:
+ case REG_ESI:
*equiv++ = REG_SI;
break;
- case REG_EDI:
+ case REG_EDI:
*equiv++ = REG_DI;
break;
- case REG_EBP:
+ case REG_EBP:
*equiv++ = REG_BP;
break;
- case REG_ESP:
+ case REG_ESP:
*equiv++ = REG_SP;
break;
- case REG_DXAX:
+ case REG_DXAX:
*equiv++ = REG_AL;
*equiv++ = REG_AH;
*equiv++ = REG_DL;
@@ -22125,7 +22125,7 @@
*equiv++ = REG_EDX;
*equiv++ = REG_EDXEAX;
break;
- case REG_EDXEAX:
+ case REG_EDXEAX:
*equiv++ = REG_AL;
*equiv++ = REG_AH;
*equiv++ = REG_DL;
@@ -22137,15 +22137,15 @@
*equiv++ = REG_DXAX;
break;
}
- *equiv++ = REG_UNSET;
+ *equiv++ = REG_UNSET;
}
static unsigned arch_avail_mask(struct compile_state *state)
{
unsigned avail_mask;
/* REGCM_GPR8 is not available */
- avail_mask = REGCM_GPR8_LO | REGCM_GPR16_8 | REGCM_GPR16 |
- REGCM_GPR32 | REGCM_GPR32_8 |
+ avail_mask = REGCM_GPR8_LO | REGCM_GPR16_8 | REGCM_GPR16 |
+ REGCM_GPR32 | REGCM_GPR32_8 |
REGCM_DIVIDEND32 | REGCM_DIVIDEND64 |
REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8 | REGCM_FLAGS;
if (state->arch->features & X86_MMX_REGS) {
@@ -22188,7 +22188,7 @@
/* Remove the immediate register classes */
regcm &= ~(REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8);
return regcm;
-
+
}
static unsigned arch_reg_regcm(struct compile_state *state, int reg)
@@ -22332,7 +22332,7 @@
return result;
}
-static int do_select_reg(struct compile_state *state,
+static int do_select_reg(struct compile_state *state,
char *used, int reg, unsigned classes)
{
unsigned mask;
@@ -22357,7 +22357,7 @@
* increase the odds the register allocator will work when
* it guesses first give out registers from register classes
* least likely to run out of registers.
- *
+ *
*/
int i, reg;
reg = REG_UNSET;
@@ -22392,7 +22392,7 @@
}
-static unsigned arch_type_to_regcm(struct compile_state *state, struct type *type)
+static unsigned arch_type_to_regcm(struct compile_state *state, struct type *type)
{
#if DEBUG_ROMCC_WARNINGS
@@ -22402,13 +22402,13 @@
mask = 0;
switch(type->type & TYPE_MASK) {
case TYPE_ARRAY:
- case TYPE_VOID:
- mask = 0;
+ case TYPE_VOID:
+ mask = 0;
break;
case TYPE_CHAR:
case TYPE_UCHAR:
mask = REGCM_GPR8 | REGCM_GPR8_LO |
- REGCM_GPR16 | REGCM_GPR16_8 |
+ REGCM_GPR16 | REGCM_GPR16_8 |
REGCM_GPR32 | REGCM_GPR32_8 |
REGCM_DIVIDEND32 | REGCM_DIVIDEND64 |
REGCM_MMX | REGCM_XMM |
@@ -22462,7 +22462,7 @@
// always true.
return ((imm->op == OP_INTCONST) /* && (imm->u.cval <= 0xffffffffUL) */ ) ||
(imm->op == OP_ADDRCONST);
-
+
}
static int is_imm16(struct triple *imm)
{
@@ -22578,13 +22578,13 @@
#endif
#define COPY8_REGCM (REGCM_DIVIDEND64 | REGCM_DIVIDEND32 | REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO | REGCM_MMX | REGCM_XMM)
-#define COPY16_REGCM (REGCM_DIVIDEND64 | REGCM_DIVIDEND32 | REGCM_GPR32 | REGCM_GPR16 | REGCM_MMX | REGCM_XMM)
+#define COPY16_REGCM (REGCM_DIVIDEND64 | REGCM_DIVIDEND32 | REGCM_GPR32 | REGCM_GPR16 | REGCM_MMX | REGCM_XMM)
#define COPY32_REGCM (REGCM_DIVIDEND64 | REGCM_DIVIDEND32 | REGCM_GPR32 | REGCM_MMX | REGCM_XMM)
static struct ins_template templates[] = {
[TEMPLATE_NOP] = {
- .lhs = {
+ .lhs = {
[ 0] = { REG_UNNEEDED, REGCM_IMMALL },
[ 1] = { REG_UNNEEDED, REGCM_IMMALL },
[ 2] = { REG_UNNEEDED, REGCM_IMMALL },
@@ -22651,10 +22651,10 @@
[63] = { REG_UNNEEDED, REGCM_IMMALL },
},
},
- [TEMPLATE_INTCONST8] = {
+ [TEMPLATE_INTCONST8] = {
.lhs = { [0] = { REG_UNNEEDED, REGCM_IMM8 } },
},
- [TEMPLATE_INTCONST32] = {
+ [TEMPLATE_INTCONST32] = {
.lhs = { [0] = { REG_UNNEEDED, REGCM_IMM32 } },
},
[TEMPLATE_UNKNOWNVAL] = {
@@ -22684,32 +22684,32 @@
.lhs = { [0] = { REG_UNSET, COPY32_REGCM } },
.rhs = { [0] = { REG_UNNEEDED, REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8 } },
},
- [TEMPLATE_PHI8] = {
+ [TEMPLATE_PHI8] = {
.lhs = { [0] = { REG_VIRT0, COPY8_REGCM } },
.rhs = { [0] = { REG_VIRT0, COPY8_REGCM } },
},
- [TEMPLATE_PHI16] = {
+ [TEMPLATE_PHI16] = {
.lhs = { [0] = { REG_VIRT0, COPY16_REGCM } },
- .rhs = { [0] = { REG_VIRT0, COPY16_REGCM } },
+ .rhs = { [0] = { REG_VIRT0, COPY16_REGCM } },
},
- [TEMPLATE_PHI32] = {
+ [TEMPLATE_PHI32] = {
.lhs = { [0] = { REG_VIRT0, COPY32_REGCM } },
- .rhs = { [0] = { REG_VIRT0, COPY32_REGCM } },
+ .rhs = { [0] = { REG_VIRT0, COPY32_REGCM } },
},
[TEMPLATE_STORE8] = {
- .rhs = {
+ .rhs = {
[0] = { REG_UNSET, REGCM_GPR32 },
[1] = { REG_UNSET, REGCM_GPR8_LO },
},
},
[TEMPLATE_STORE16] = {
- .rhs = {
+ .rhs = {
[0] = { REG_UNSET, REGCM_GPR32 },
[1] = { REG_UNSET, REGCM_GPR16 },
},
},
[TEMPLATE_STORE32] = {
- .rhs = {
+ .rhs = {
[0] = { REG_UNSET, REGCM_GPR32 },
[1] = { REG_UNSET, REGCM_GPR32 },
},
@@ -22728,84 +22728,84 @@
},
[TEMPLATE_BINARY8_REG] = {
.lhs = { [0] = { REG_VIRT0, REGCM_GPR8_LO } },
- .rhs = {
+ .rhs = {
[0] = { REG_VIRT0, REGCM_GPR8_LO },
[1] = { REG_UNSET, REGCM_GPR8_LO },
},
},
[TEMPLATE_BINARY16_REG] = {
.lhs = { [0] = { REG_VIRT0, REGCM_GPR16 } },
- .rhs = {
+ .rhs = {
[0] = { REG_VIRT0, REGCM_GPR16 },
[1] = { REG_UNSET, REGCM_GPR16 },
},
},
[TEMPLATE_BINARY32_REG] = {
.lhs = { [0] = { REG_VIRT0, REGCM_GPR32 } },
- .rhs = {
+ .rhs = {
[0] = { REG_VIRT0, REGCM_GPR32 },
[1] = { REG_UNSET, REGCM_GPR32 },
},
},
[TEMPLATE_BINARY8_IMM] = {
.lhs = { [0] = { REG_VIRT0, REGCM_GPR8_LO } },
- .rhs = {
+ .rhs = {
[0] = { REG_VIRT0, REGCM_GPR8_LO },
[1] = { REG_UNNEEDED, REGCM_IMM8 },
},
},
[TEMPLATE_BINARY16_IMM] = {
.lhs = { [0] = { REG_VIRT0, REGCM_GPR16 } },
- .rhs = {
+ .rhs = {
[0] = { REG_VIRT0, REGCM_GPR16 },
[1] = { REG_UNNEEDED, REGCM_IMM16 },
},
},
[TEMPLATE_BINARY32_IMM] = {
.lhs = { [0] = { REG_VIRT0, REGCM_GPR32 } },
- .rhs = {
+ .rhs = {
[0] = { REG_VIRT0, REGCM_GPR32 },
[1] = { REG_UNNEEDED, REGCM_IMM32 },
},
},
[TEMPLATE_SL8_CL] = {
.lhs = { [0] = { REG_VIRT0, REGCM_GPR8_LO } },
- .rhs = {
+ .rhs = {
[0] = { REG_VIRT0, REGCM_GPR8_LO },
[1] = { REG_CL, REGCM_GPR8_LO },
},
},
[TEMPLATE_SL16_CL] = {
.lhs = { [0] = { REG_VIRT0, REGCM_GPR16 } },
- .rhs = {
+ .rhs = {
[0] = { REG_VIRT0, REGCM_GPR16 },
[1] = { REG_CL, REGCM_GPR8_LO },
},
},
[TEMPLATE_SL32_CL] = {
.lhs = { [0] = { REG_VIRT0, REGCM_GPR32 } },
- .rhs = {
+ .rhs = {
[0] = { REG_VIRT0, REGCM_GPR32 },
[1] = { REG_CL, REGCM_GPR8_LO },
},
},
[TEMPLATE_SL8_IMM] = {
.lhs = { [0] = { REG_VIRT0, REGCM_GPR8_LO } },
- .rhs = {
+ .rhs = {
[0] = { REG_VIRT0, REGCM_GPR8_LO },
[1] = { REG_UNNEEDED, REGCM_IMM8 },
},
},
[TEMPLATE_SL16_IMM] = {
.lhs = { [0] = { REG_VIRT0, REGCM_GPR16 } },
- .rhs = {
+ .rhs = {
[0] = { REG_VIRT0, REGCM_GPR16 },
[1] = { REG_UNNEEDED, REGCM_IMM8 },
},
},
[TEMPLATE_SL32_IMM] = {
.lhs = { [0] = { REG_VIRT0, REGCM_GPR32 } },
- .rhs = {
+ .rhs = {
[0] = { REG_VIRT0, REGCM_GPR32 },
[1] = { REG_UNNEEDED, REGCM_IMM8 },
},
@@ -22887,19 +22887,19 @@
.rhs = { [0] = { REG_UNSET, REGCM_GPR32 } },
},
[TEMPLATE_INB_DX] = {
- .lhs = { [0] = { REG_AL, REGCM_GPR8_LO } },
+ .lhs = { [0] = { REG_AL, REGCM_GPR8_LO } },
.rhs = { [0] = { REG_DX, REGCM_GPR16 } },
},
[TEMPLATE_INB_IMM] = {
- .lhs = { [0] = { REG_AL, REGCM_GPR8_LO } },
+ .lhs = { [0] = { REG_AL, REGCM_GPR8_LO } },
.rhs = { [0] = { REG_UNNEEDED, REGCM_IMM8 } },
},
- [TEMPLATE_INW_DX] = {
- .lhs = { [0] = { REG_AX, REGCM_GPR16 } },
+ [TEMPLATE_INW_DX] = {
+ .lhs = { [0] = { REG_AX, REGCM_GPR16 } },
.rhs = { [0] = { REG_DX, REGCM_GPR16 } },
},
- [TEMPLATE_INW_IMM] = {
- .lhs = { [0] = { REG_AX, REGCM_GPR16 } },
+ [TEMPLATE_INW_IMM] = {
+ .lhs = { [0] = { REG_AX, REGCM_GPR16 } },
.rhs = { [0] = { REG_UNNEEDED, REGCM_IMM8 } },
},
[TEMPLATE_INL_DX] = {
@@ -22910,19 +22910,19 @@
.lhs = { [0] = { REG_EAX, REGCM_GPR32 } },
.rhs = { [0] = { REG_UNNEEDED, REGCM_IMM8 } },
},
- [TEMPLATE_OUTB_DX] = {
+ [TEMPLATE_OUTB_DX] = {
.rhs = {
[0] = { REG_AL, REGCM_GPR8_LO },
[1] = { REG_DX, REGCM_GPR16 },
},
},
- [TEMPLATE_OUTB_IMM] = {
+ [TEMPLATE_OUTB_IMM] = {
.rhs = {
- [0] = { REG_AL, REGCM_GPR8_LO },
+ [0] = { REG_AL, REGCM_GPR8_LO },
[1] = { REG_UNNEEDED, REGCM_IMM8 },
},
},
- [TEMPLATE_OUTW_DX] = {
+ [TEMPLATE_OUTW_DX] = {
.rhs = {
[0] = { REG_AX, REGCM_GPR16 },
[1] = { REG_DX, REGCM_GPR16 },
@@ -22930,19 +22930,19 @@
},
[TEMPLATE_OUTW_IMM] = {
.rhs = {
- [0] = { REG_AX, REGCM_GPR16 },
+ [0] = { REG_AX, REGCM_GPR16 },
[1] = { REG_UNNEEDED, REGCM_IMM8 },
},
},
- [TEMPLATE_OUTL_DX] = {
+ [TEMPLATE_OUTL_DX] = {
.rhs = {
[0] = { REG_EAX, REGCM_GPR32 },
[1] = { REG_DX, REGCM_GPR16 },
},
},
- [TEMPLATE_OUTL_IMM] = {
+ [TEMPLATE_OUTL_IMM] = {
.rhs = {
- [0] = { REG_EAX, REGCM_GPR32 },
+ [0] = { REG_EAX, REGCM_GPR32 },
[1] = { REG_UNNEEDED, REGCM_IMM8 },
},
},
@@ -22951,7 +22951,7 @@
.rhs = { [0] = { REG_UNSET, REGCM_GPR32 } },
},
[TEMPLATE_RDMSR] = {
- .lhs = {
+ .lhs = {
[0] = { REG_EAX, REGCM_GPR32 },
[1] = { REG_EDX, REGCM_GPR32 },
},
@@ -22966,27 +22966,27 @@
},
[TEMPLATE_UMUL8] = {
.lhs = { [0] = { REG_AX, REGCM_GPR16 } },
- .rhs = {
+ .rhs = {
[0] = { REG_AL, REGCM_GPR8_LO },
[1] = { REG_UNSET, REGCM_GPR8_LO },
},
},
[TEMPLATE_UMUL16] = {
.lhs = { [0] = { REG_DXAX, REGCM_DIVIDEND32 } },
- .rhs = {
+ .rhs = {
[0] = { REG_AX, REGCM_GPR16 },
[1] = { REG_UNSET, REGCM_GPR16 },
},
},
[TEMPLATE_UMUL32] = {
.lhs = { [0] = { REG_EDXEAX, REGCM_DIVIDEND64 } },
- .rhs = {
+ .rhs = {
[0] = { REG_EAX, REGCM_GPR32 },
[1] = { REG_UNSET, REGCM_GPR32 },
},
},
[TEMPLATE_DIV8] = {
- .lhs = {
+ .lhs = {
[0] = { REG_AL, REGCM_GPR8_LO },
[1] = { REG_AH, REGCM_GPR8 },
},
@@ -22996,7 +22996,7 @@
},
},
[TEMPLATE_DIV16] = {
- .lhs = {
+ .lhs = {
[0] = { REG_AX, REGCM_GPR16 },
[1] = { REG_DX, REGCM_GPR16 },
},
@@ -23006,7 +23006,7 @@
},
},
[TEMPLATE_DIV32] = {
- .lhs = {
+ .lhs = {
[0] = { REG_EAX, REGCM_GPR32 },
[1] = { REG_EDX, REGCM_GPR32 },
},
@@ -23027,7 +23027,7 @@
}
test = pre_triple(state, branch,
cmp_op, cmp_type, left, right);
- test->template_id = TEMPLATE_TEST32;
+ test->template_id = TEMPLATE_TEST32;
if (cmp_op == OP_CMP) {
test->template_id = TEMPLATE_CMP32_REG;
if (get_imm32(test, &RHS(test, 1))) {
@@ -23061,13 +23061,13 @@
right = RHS(cmp, 1);
}
branch = entry->member;
- fixup_branch(state, branch, jmp_op,
+ fixup_branch(state, branch, jmp_op,
cmp->op, cmp->type, left, right);
}
}
}
-static void bool_cmp(struct compile_state *state,
+static void bool_cmp(struct compile_state *state,
struct triple *ins, int cmp_op, int jmp_op, int set_op)
{
struct triple_set *entry, *next;
@@ -23134,7 +23134,7 @@
break;
default:
if (ins->template_id > LAST_TEMPLATE) {
- internal_error(state, ins, "bad template number %d",
+ internal_error(state, ins, "bad template number %d",
ins->template_id);
}
template = &templates[ins->template_id];
@@ -23169,7 +23169,7 @@
/* Fall through */
default:
if (ins->template_id > LAST_TEMPLATE) {
- internal_error(state, ins, "bad template number %d",
+ internal_error(state, ins, "bad template number %d",
ins->template_id);
}
template = &templates[ins->template_id];
@@ -23187,7 +23187,7 @@
struct triple *ins, int div_op, int index)
{
struct triple *div, *piece0, *piece1;
-
+
/* Generate the appropriate division instruction */
div = post_triple(state, ins, div_op, ins->type, 0, 0);
RHS(div, 0) = RHS(ins, 0);
@@ -23497,8 +23497,8 @@
case OP_NEG:
ins->template_id = TEMPLATE_UNARY32;
break;
- case OP_EQ:
- bool_cmp(state, ins, OP_CMP, OP_JMP_EQ, OP_SET_EQ);
+ case OP_EQ:
+ bool_cmp(state, ins, OP_CMP, OP_JMP_EQ, OP_SET_EQ);
break;
case OP_NOTEQ:
bool_cmp(state, ins, OP_CMP, OP_JMP_NOTEQ, OP_SET_NOTEQ);
@@ -23538,7 +23538,7 @@
ins->template_id = TEMPLATE_NOP;
break;
case OP_CBRANCH:
- fixup_branch(state, ins, OP_JMP_NOTEQ, OP_TEST,
+ fixup_branch(state, ins, OP_JMP_NOTEQ, OP_TEST,
RHS(ins, 0)->type, RHS(ins, 0), 0);
break;
case OP_CALL:
@@ -23644,20 +23644,20 @@
first = state->first;
label = first;
do {
- if ((label->op == OP_LABEL) ||
+ if ((label->op == OP_LABEL) ||
(label->op == OP_SDECL)) {
if (label->use) {
label->u.cval = next_label(state);
} else {
label->u.cval = 0;
}
-
+
}
label = label->next;
} while(label != first);
}
-static int check_reg(struct compile_state *state,
+static int check_reg(struct compile_state *state,
struct triple *triple, int classes)
{
unsigned mask;
@@ -23688,7 +23688,7 @@
"%edx:%eax",
"%dx:%ax",
"%mm0", "%mm1", "%mm2", "%mm3", "%mm4", "%mm5", "%mm6", "%mm7",
- "%xmm0", "%xmm1", "%xmm2", "%xmm3",
+ "%xmm0", "%xmm1", "%xmm2", "%xmm3",
"%xmm4", "%xmm5", "%xmm6", "%xmm7",
};
static const char *arch_reg_str(int reg)
@@ -23747,7 +23747,7 @@
}
return arch_reg_size(reg);
}
-
+
const char *type_suffix(struct compile_state *state, struct type *type)
@@ -23770,7 +23770,7 @@
{
switch(ins->op) {
case OP_INTCONST:
- fprintf(fp, " $%ld ",
+ fprintf(fp, " $%ld ",
(long)(ins->u.cval));
break;
case OP_ADDRCONST:
@@ -23783,7 +23783,7 @@
internal_error(state, ins, "unlabeled constant");
}
fprintf(fp, " $L%s%lu+%lu ",
- state->compiler->label_prefix,
+ state->compiler->label_prefix,
(unsigned long)(MISC(ins, 0)->u.cval),
(unsigned long)(ins->u.cval));
break;
@@ -23801,12 +23801,12 @@
switch(ins->type->type & TYPE_MASK) {
case TYPE_CHAR:
case TYPE_UCHAR:
- fprintf(fp, ".byte 0x%02lx\n",
+ fprintf(fp, ".byte 0x%02lx\n",
(unsigned long)(ins->u.cval));
break;
case TYPE_SHORT:
case TYPE_USHORT:
- fprintf(fp, ".short 0x%04lx\n",
+ fprintf(fp, ".short 0x%04lx\n",
(unsigned long)(ins->u.cval));
break;
case TYPE_INT:
@@ -23814,7 +23814,7 @@
case TYPE_LONG:
case TYPE_ULONG:
case TYPE_POINTER:
- fprintf(fp, ".int %lu\n",
+ fprintf(fp, ".int %lu\n",
(unsigned long)(ins->u.cval));
break;
default:
@@ -23824,7 +23824,7 @@
internal_error(state, ins, "Unknown constant type. Val: %lu",
(unsigned long)(ins->u.cval));
}
-
+
break;
case OP_ADDRCONST:
if ((MISC(ins, 0)->op != OP_SDECL) &&
@@ -23896,7 +23896,7 @@
}
static void print_binary_op(struct compile_state *state,
- const char *op, struct triple *ins, FILE *fp)
+ const char *op, struct triple *ins, FILE *fp)
{
unsigned mask;
mask = REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO;
@@ -23923,7 +23923,7 @@
reg(state, RHS(ins, 0), mask));
}
}
-static void print_unary_op(struct compile_state *state,
+static void print_unary_op(struct compile_state *state,
const char *op, struct triple *ins, FILE *fp)
{
unsigned mask;
@@ -23987,7 +23987,7 @@
internal_error(state, ins, "src != %%dx");
}
fprintf(fp, "\t%s %s, %s\n",
- op,
+ op,
reg(state, RHS(ins, 0), REGCM_GPR16),
reg(state, ins, mask));
}
@@ -24013,7 +24013,7 @@
internal_error(state, ins, "src != %%eax");
}
if (is_const(RHS(ins, 1))) {
- fprintf(fp, "\t%s %s,",
+ fprintf(fp, "\t%s %s,",
op, reg(state, RHS(ins, 0), mask));
print_const_val(state, RHS(ins, 1), fp);
fprintf(fp, "\n");
@@ -24025,7 +24025,7 @@
internal_error(state, ins, "dst != %%dx");
}
fprintf(fp, "\t%s %s, %s\n",
- op,
+ op,
reg(state, RHS(ins, 0), mask),
reg(state, RHS(ins, 1), REGCM_GPR16));
}
@@ -24075,7 +24075,7 @@
src_regcm = arch_reg_regcm(state, src_reg);
dst_regcm = arch_reg_regcm(state, dst_reg);
/* If the class is the same just move the register */
- if (src_regcm & dst_regcm &
+ if (src_regcm & dst_regcm &
(REGCM_GPR8_LO | REGCM_GPR16 | REGCM_GPR32)) {
if ((src_reg != dst_reg) || !omit_copy) {
fprintf(fp, "\tmov %s, %s\n",
@@ -24089,7 +24089,7 @@
src_reg = (src_reg - REGC_GPR32_FIRST) + REGC_GPR16_FIRST;
if ((src_reg != dst_reg) || !omit_copy) {
fprintf(fp, "\tmovw %s, %s\n",
- arch_reg_str(src_reg),
+ arch_reg_str(src_reg),
arch_reg_str(dst_reg));
}
}
@@ -24126,7 +24126,7 @@
}
}
/* Move 8/16bit to 16/32bit */
- else if ((src_regcm & (REGCM_GPR8_LO | REGCM_GPR16)) &&
+ else if ((src_regcm & (REGCM_GPR8_LO | REGCM_GPR16)) &&
(dst_regcm & (REGCM_GPR16 | REGCM_GPR32))) {
const char *op;
op = is_signed(src->type)? "movsx": "movzx";
@@ -24198,7 +24198,7 @@
const char *extend;
extend = is_signed(src->type)? "cltd":"movl $0, %edx";
fprintf(fp, "\tmov %s, %%eax\n\t%s\n",
- arch_reg_str(src_reg),
+ arch_reg_str(src_reg),
extend);
}
/* Move from 64bit gpr to gpr */
@@ -24206,7 +24206,7 @@
(dst_regcm & (REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO))) {
if (dst_regcm & REGCM_GPR32) {
src_reg = REG_EAX;
- }
+ }
else if (dst_regcm & REGCM_GPR16) {
src_reg = REG_AX;
}
@@ -24411,19 +24411,19 @@
}
if (dst_regcm & (REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO)) {
- fprintf(fp, "\tshl $%d, %s\n",
- shift_bits,
+ fprintf(fp, "\tshl $%d, %s\n",
+ shift_bits,
reg(state, dst, REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO));
- fprintf(fp, "\tsar $%d, %s\n",
- shift_bits,
+ fprintf(fp, "\tsar $%d, %s\n",
+ shift_bits,
reg(state, dst, REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO));
}
else if (dst_regcm & (REGCM_MMX | REGCM_XMM)) {
fprintf(fp, "\tpslld $%d, %s\n",
- shift_bits,
+ shift_bits,
reg(state, dst, REGCM_MMX | REGCM_XMM));
fprintf(fp, "\tpsrad $%d, %s\n",
- shift_bits,
+ shift_bits,
reg(state, dst, REGCM_MMX | REGCM_XMM));
}
else {
@@ -24454,7 +24454,7 @@
case TYPE_INT: case TYPE_UINT:
case TYPE_LONG: case TYPE_ULONG:
case TYPE_POINTER:
- op = "movl";
+ op = "movl";
break;
default:
internal_error(state, ins, "unknown type in load");
@@ -24462,7 +24462,7 @@
break;
}
fprintf(fp, "\t%s (%s), %s\n",
- op,
+ op,
reg(state, src, REGCM_GPR32),
reg(state, dst, REGCM_GPR32));
}
@@ -24497,8 +24497,8 @@
reg(state, src, REGCM_GPR8_LO | REGCM_GPR16 | REGCM_GPR32),
reg(state, dst, REGCM_GPR32));
}
-
-
+
+
}
static void print_op_smul(struct compile_state *state,
@@ -24599,7 +24599,7 @@
internal_error(state, branch, "Invalid branch op");
break;
}
-
+
}
#if 1
if (branch->op == OP_CALL) {
@@ -24607,7 +24607,7 @@
}
#endif
fprintf(fp, "\t%s L%s%lu\n",
- bop,
+ bop,
state->compiler->label_prefix,
(unsigned long)(TARG(branch, 0)->u.cval));
}
@@ -24653,19 +24653,19 @@
sop, reg(state, set, REGCM_GPR8_LO));
}
-static void print_op_bit_scan(struct compile_state *state,
- struct triple *ins, FILE *fp)
+static void print_op_bit_scan(struct compile_state *state,
+ struct triple *ins, FILE *fp)
{
const char *op;
switch(ins->op) {
case OP_BSF: op = "bsf"; break;
case OP_BSR: op = "bsr"; break;
- default:
+ default:
internal_error(state, ins, "unknown bit scan");
op = 0;
break;
}
- fprintf(fp,
+ fprintf(fp,
"\t%s %s, %s\n"
"\tjnz 1f\n"
"\tmovl $-1, %s\n"
@@ -24682,18 +24682,18 @@
{
fprintf(fp, ".section \"" DATA_SECTION "\"\n");
fprintf(fp, ".balign %ld\n", (long int)align_of_in_bytes(state, ins->type));
- fprintf(fp, "L%s%lu:\n",
+ fprintf(fp, "L%s%lu:\n",
state->compiler->label_prefix, (unsigned long)(ins->u.cval));
print_const(state, MISC(ins, 0), fp);
fprintf(fp, ".section \"" TEXT_SECTION "\"\n");
-
+
}
static void print_instruction(struct compile_state *state,
struct triple *ins, FILE *fp)
{
/* Assumption: after I have exted the register allocator
- * everything is in a valid register.
+ * everything is in a valid register.
*/
switch(ins->op) {
case OP_ASM:
@@ -24725,7 +24725,7 @@
case OP_SDECL:
print_sdecl(state, ins, fp);
break;
- case OP_COPY:
+ case OP_COPY:
case OP_CONVERT:
print_op_move(state, ins, fp);
break;
@@ -24760,10 +24760,10 @@
print_op_set(state, ins, fp);
break;
case OP_INB: case OP_INW: case OP_INL:
- print_op_in(state, ins, fp);
+ print_op_in(state, ins, fp);
break;
case OP_OUTB: case OP_OUTW: case OP_OUTL:
- print_op_out(state, ins, fp);
+ print_op_out(state, ins, fp);
break;
case OP_BSF:
case OP_BSR:
@@ -24792,7 +24792,7 @@
if (!ins->use) {
return;
}
- fprintf(fp, "L%s%lu:\n",
+ fprintf(fp, "L%s%lu:\n",
state->compiler->label_prefix, (unsigned long)(ins->u.cval));
break;
case OP_ADECL:
@@ -24839,7 +24839,7 @@
first = state->first;
ins = first;
do {
- if (print_location &&
+ if (print_location &&
last_occurance != ins->occurance) {
if (!ins->occurance->parent) {
fprintf(fp, "\t/* %s,%s:%d.%d */\n",
@@ -24886,7 +24886,7 @@
{
generate_local_labels(state);
print_instructions(state);
-
+
}
static void print_preprocessed_tokens(struct compile_state *state)
@@ -24907,7 +24907,7 @@
break;
}
tk = eat(state, tok);
- token_str =
+ token_str =
tk->ident ? tk->ident->name :
tk->str_len ? tk->val.str :
tokens[tk->tok];
@@ -24916,8 +24916,8 @@
while(file->macro && file->prev) {
file = file->prev;
}
- if (!file->macro &&
- ((file->line != line) || (file->basename != filename)))
+ if (!file->macro &&
+ ((file->line != line) || (file->basename != filename)))
{
int i, col;
if ((file->basename == filename) &&
@@ -24938,9 +24938,9 @@
fprintf(fp, " ");
}
}
-
+
fprintf(fp, "%s ", token_str);
-
+
if (state->compiler->debug & DEBUG_TOKENS) {
loc(state->dbgout, state, 0);
fprintf(state->dbgout, "%s <- `%s'\n",
@@ -25030,7 +25030,7 @@
register_builtins(&state);
compile_file(&state, filename, 1);
-
+
while (includes) {
compile_file(&state, includes->filename, 1);
includes=includes->next;
@@ -25047,8 +25047,8 @@
/* Exit the global definition scope */
end_scope(&state);
- /* Now that basic compilation has happened
- * optimize the intermediate code
+ /* Now that basic compilation has happened
+ * optimize the intermediate code
*/
optimize(&state);
@@ -25104,8 +25104,8 @@
struct compiler_state compiler;
struct arch_state arch;
int all_opts;
-
-
+
+
/* I don't want any surprises */
setlocale(LC_ALL, "C");
diff --git a/util/romcc/tests.sh b/util/romcc/tests.sh
index 4dddbb1..823d71d 100644
--- a/util/romcc/tests.sh
+++ b/util/romcc/tests.sh
@@ -21,7 +21,7 @@
base=tests/$stem
op="-Itests/include"
op="$op -feliminate-inefectual-code -fsimplify -fscc-transform "
-#op="$op -O2 "
+#op="$op -O2 "
#op="$op -mmmx -msse"
op="$op -finline-policy=defaulton"
#op="$op -finline-policy=nopenalty"
@@ -47,12 +47,12 @@
#op="-fdebug -fdebug-inline -O2 -mmmx "
#op="-fdebug -fdebug-live-range-conflicts -fdebug-live-range-conflicts2 -fno-debug-interference -fdebug-color-graph -fdebug-coalescing -fmax-allocation-passes=10 -O2 -mmmx -msse"
#op="-fdebug -O2 -mmmx -msse"
-#op="-fdebug -fdebug-inline -fno-eliminate-inefectual-code -fno-always-inline -mmmx"
-#op="-fdebug -fdebug-inline -fno-always-inline -mmmx"
+#op="-fdebug -fdebug-inline -fno-eliminate-inefectual-code -fno-always-inline -mmmx"
+#op="-fdebug -fdebug-inline -fno-always-inline -mmmx"
export ALLOC_CHECK_=2
-rm -f core $base.S $base.debug $base.debug2 $base.elf $base.out &&
-make romcc &&
-$ROMCC $op -o $base.S $base.c 2>&1 > $base.debug | tee $base.debug2
+rm -f core $base.S $base.debug $base.debug2 $base.elf $base.out &&
+make romcc &&
+$ROMCC $op -o $base.S $base.c 2>&1 > $base.debug | tee $base.debug2
if [ '(' -f $base.c ')' -a '(' '!' -f core ')' -a '(' -f $base.S ')' ]; then
if [ "$stem" = "linux_test$N" ] ; then
as $base.S -o $base.o &&
diff --git a/util/romcc/tests/fail_test10.c b/util/romcc/tests/fail_test10.c
index 1993e0e..7cfd9a9 100644
--- a/util/romcc/tests/fail_test10.c
+++ b/util/romcc/tests/fail_test10.c
@@ -14,6 +14,6 @@
result.b = 1;
result.c = b + 1;
result.d = a + 1;
-
+
}
diff --git a/util/romcc/tests/fail_test2.c b/util/romcc/tests/fail_test2.c
index 74d6eb1..6a02486 100644
--- a/util/romcc/tests/fail_test2.c
+++ b/util/romcc/tests/fail_test2.c
@@ -3,16 +3,16 @@
unsigned min;
int value, latency;
-
-
+
+
latency = -2;
-
+
if (latency > (((min) >> 8) & 0xff)) {
value = 0xa;
}
-
+
if (value < 0) return;
-
+
((min) = (((min) & ~0xff)));
}
diff --git a/util/romcc/tests/hello_world.c b/util/romcc/tests/hello_world.c
index b5ce540..cba88a9 100644
--- a/util/romcc/tests/hello_world.c
+++ b/util/romcc/tests/hello_world.c
@@ -66,7 +66,7 @@
void uart_wait_until_sent(void)
{
- while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
@@ -96,7 +96,7 @@
void __console_tx_char(unsigned char byte)
{
uart_tx_byte(byte);
-
+
}
void __console_tx_string(char *str)
diff --git a/util/romcc/tests/hello_world1.c b/util/romcc/tests/hello_world1.c
index b5ce540..cba88a9 100644
--- a/util/romcc/tests/hello_world1.c
+++ b/util/romcc/tests/hello_world1.c
@@ -66,7 +66,7 @@
void uart_wait_until_sent(void)
{
- while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
@@ -96,7 +96,7 @@
void __console_tx_char(unsigned char byte)
{
uart_tx_byte(byte);
-
+
}
void __console_tx_string(char *str)
diff --git a/util/romcc/tests/hello_world2.c b/util/romcc/tests/hello_world2.c
index 18380d3..c6e8092 100644
--- a/util/romcc/tests/hello_world2.c
+++ b/util/romcc/tests/hello_world2.c
@@ -66,7 +66,7 @@
void uart_wait_until_sent(void)
{
- while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
@@ -96,7 +96,7 @@
void __console_tx_char(unsigned char byte)
{
uart_tx_byte(byte);
-
+
}
void __console_tx_string(char *str)
diff --git a/util/romcc/tests/include/linux_console.h b/util/romcc/tests/include/linux_console.h
index 861c701..5f9dec2 100644
--- a/util/romcc/tests/include/linux_console.h
+++ b/util/romcc/tests/include/linux_console.h
@@ -6,37 +6,37 @@
static const char *addr_of_char(unsigned char ch)
{
static const char byte[] = {
- 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
- 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
- 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+ 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
- 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
+ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
- 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
+ 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
- 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
+ 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
- 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
+ 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
- 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
+ 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
- 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+ 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
- 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+ 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
- 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
+ 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
- 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
+ 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
- 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
+ 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
- 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
+ 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
- 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
+ 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
- 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
+ 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
};
return byte + ch;
diff --git a/util/romcc/tests/include/linuxi386_syscall.h b/util/romcc/tests/include/linuxi386_syscall.h
index d202661..30b4a2c 100644
--- a/util/romcc/tests/include/linuxi386_syscall.h
+++ b/util/romcc/tests/include/linuxi386_syscall.h
@@ -34,7 +34,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1));
return syscall_return(res);
-
+
}
static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)
@@ -45,7 +45,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2));
return syscall_return(res);
-
+
}
@@ -58,7 +58,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
return syscall_return(res);
-
+
}
static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -70,7 +70,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
return syscall_return(res);
-
+
}
static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -80,10 +80,10 @@
asm volatile(
"int $0x80"
: "=a" (res)
- : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),
+ : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),
"S" (arg4), "D" (arg5));
return syscall_return(res);
-
+
}
#define NR_exit 1
diff --git a/util/romcc/tests/linux_console.h b/util/romcc/tests/linux_console.h
index 0837dfc..1b6466e 100644
--- a/util/romcc/tests/linux_console.h
+++ b/util/romcc/tests/linux_console.h
@@ -6,37 +6,37 @@
static const char *addr_of_char(unsigned char ch)
{
static const char byte[] = {
- 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
- 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
- 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+ 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
- 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
+ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
- 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
+ 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
- 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
+ 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
- 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
+ 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
- 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
+ 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
- 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+ 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
- 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+ 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
- 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
+ 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
- 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
+ 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
- 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
+ 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
- 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
+ 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
- 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
+ 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
- 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
+ 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
};
return byte + ch;
diff --git a/util/romcc/tests/linux_test13.c b/util/romcc/tests/linux_test13.c
index 83ef239..9bc80ea 100644
--- a/util/romcc/tests/linux_test13.c
+++ b/util/romcc/tests/linux_test13.c
@@ -43,5 +43,5 @@
print_debug("A\n");
dimm_mask = spd_detect_dimms(cpu);
print_debug("B\n");
- _exit(0);
+ _exit(0);
}
diff --git a/util/romcc/tests/linux_test2.c b/util/romcc/tests/linux_test2.c
index 8f40fa0..766f498 100644
--- a/util/romcc/tests/linux_test2.c
+++ b/util/romcc/tests/linux_test2.c
@@ -70,14 +70,14 @@
(((FN) & 0x07) << 8) | \
((WHERE) & 0xFF))
- /* Routing Table Node i
- * F0:0x40 i = 0,
+ /* Routing Table Node i
+ * F0:0x40 i = 0,
* F0:0x44 i = 1,
- * F0:0x48 i = 2,
+ * F0:0x48 i = 2,
* F0:0x4c i = 3,
- * F0:0x50 i = 4,
+ * F0:0x50 i = 4,
* F0:0x54 i = 5,
- * F0:0x58 i = 6,
+ * F0:0x58 i = 6,
* F0:0x5c i = 7
* [ 0: 3] Request Route
* [0] Route to this node
@@ -104,7 +104,7 @@
PCI_ADDR(0, 0x18, 0, 0x58), 0xfff0f0f0, 0x00010101,
PCI_ADDR(0, 0x18, 0, 0x5c), 0xfff0f0f0, 0x00010101,
- /* Hypetransport Transaction Control Register
+ /* Hypetransport Transaction Control Register
* F0:0x68
* [ 0: 0] Disable read byte probe
* 0 = Probes issues
@@ -146,7 +146,7 @@
* [12:12] Change ISOC to Ordered
* 0 = Bit 1 of coherent HT RdSz/WrSz command used for iosynchronous prioritization
* 1 = Bit 1 of coherent HT RdSz/WrSz command used for ordering.
- * [14:13] Buffer Release Priority select
+ * [14:13] Buffer Release Priority select
* 00 = 64
* 01 = 16
* 10 = 8
@@ -253,7 +253,7 @@
* [13:13] HT Stop Tristate Enable
* 0 = Driven during an LDTSTOP_L
* 1 = Tristated during and LDTSTOP_L
- * [14:14] Extended CTL Time
+ * [14:14] Extended CTL Time
* 0 = CTL is asserted for 16 bit times during link initialization
* 1 = CTL is asserted for 50us during link initialization
* [18:16] Max Link Width In (Read-Only?)
@@ -519,7 +519,7 @@
* 1 = base/limit registers i are read-only
* [ 7: 4] Reserved
* [31: 8] Memory-Mapped I/O Base Address i (39-16)
- * This field defines the upper address bits of a 40bit address
+ * This field defines the upper address bits of a 40bit address
* that defines the start of memory-mapped I/O region i
*/
PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00e00003,
@@ -580,7 +580,7 @@
* [ 3: 2] Reserved
* [ 4: 4] VGA Enable
* 0 = VGA matches Disabled
- * 1 = matches all address < 64K and where A[9:0] is in the
+ * 1 = matches all address < 64K and where A[9:0] is in the
* range 3B0-3BB or 3C0-3DF independen of the base & limit registers
* [ 5: 5] ISA Enable
* 0 = ISA matches Disabled
@@ -588,7 +588,7 @@
* from matching agains this base/limit pair
* [11: 6] Reserved
* [24:12] PCI I/O Base i
- * This field defines the start of PCI I/O region n
+ * This field defines the start of PCI I/O region n
* [31:25] Reserved
*/
PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x0000d003,
diff --git a/util/romcc/tests/linux_test3.c b/util/romcc/tests/linux_test3.c
index 97187ae..4c7a882 100644
--- a/util/romcc/tests/linux_test3.c
+++ b/util/romcc/tests/linux_test3.c
@@ -4,15 +4,15 @@
{
int i;
print_debug("goto_test\n");
-
+
i = 0;
goto bottom;
{
top:
- print_debug("i = ");
- print_debug_hex8(i);
+ print_debug("i = ");
+ print_debug_hex8(i);
print_debug("\n");
-
+
i = i + 1;
}
bottom:
diff --git a/util/romcc/tests/linux_test4.c b/util/romcc/tests/linux_test4.c
index 1f09918..71f4d65 100644
--- a/util/romcc/tests/linux_test4.c
+++ b/util/romcc/tests/linux_test4.c
@@ -7,7 +7,7 @@
short across;
};
-static void main(void)
+static void main(void)
{
static const struct socket_desc cpu_socketsA[] = {
{ .up = 2, .down = -1, .across = 1 }, /* Node 0 */
diff --git a/util/romcc/tests/linux_test5.c b/util/romcc/tests/linux_test5.c
index 13093fb..473f572 100644
--- a/util/romcc/tests/linux_test5.c
+++ b/util/romcc/tests/linux_test5.c
@@ -4,7 +4,7 @@
inline int log2(int value)
{
/* __builtin_bsr is a exactly equivalent to the x86 machine
- * instruction with the exception that it returns -1
+ * instruction with the exception that it returns -1
* when the value presented to it is zero.
* Otherwise __builtin_bsr returns the zero based index of
* the highest bit set.
@@ -91,8 +91,8 @@
static void disable_dimm(unsigned index)
{
- print_debug("disabling dimm");
- print_debug_hex8(index);
+ print_debug("disabling dimm");
+ print_debug_hex8(index);
print_debug("\r\n");
#if 0
pci_write_config32(PCI_DEV(0, 0x18, 2), DRAM_CSBASE + (((index << 1)+0)<<2), 0);
@@ -175,8 +175,8 @@
min_latency = 2;
#if 1
- print_debug("min_cycle_time: ");
- print_debug_hex8(min_cycle_time);
+ print_debug("min_cycle_time: ");
+ print_debug_hex8(min_cycle_time);
print_debug(" min_latency: ");
print_debug_hex8(min_latency);
print_debug("\r\n");
@@ -236,8 +236,8 @@
#if 1
print_debug("device: ");
print_debug_hex8(device);
- print_debug(" new_cycle_time: ");
- print_debug_hex8(new_cycle_time);
+ print_debug(" new_cycle_time: ");
+ print_debug_hex8(new_cycle_time);
print_debug(" new_latency: ");
print_debug_hex8(new_latency);
print_debug("\r\n");
@@ -249,8 +249,8 @@
#if 1
print_debug("device: ");
print_debug_hex8(device);
- print_debug(" new_cycle_time: ");
- print_debug_hex8(new_cycle_time);
+ print_debug(" new_cycle_time: ");
+ print_debug_hex8(new_cycle_time);
print_debug(" new_latency: ");
print_debug_hex8(new_latency);
print_debug("\r\n");
@@ -270,8 +270,8 @@
#if 1
print_debug("device: ");
print_debug_hex8(device);
- print_debug(" min_cycle_time: ");
- print_debug_hex8(min_cycle_time);
+ print_debug(" min_cycle_time: ");
+ print_debug_hex8(min_cycle_time);
print_debug(" min_latency: ");
print_debug_hex8(min_latency);
print_debug("\r\n");
@@ -309,11 +309,11 @@
if ((latency != min_latency) || (index >= 3)) {
goto dimm_err;
}
-
+
/* Read the min_cycle_time for this latency */
value = smbus_read_byte(device, latency_indicies[index]);
-
- /* All is good if the selected clock speed
+
+ /* All is good if the selected clock speed
* is what I need or slower.
*/
if (value <= min_cycle_time) {
@@ -324,8 +324,8 @@
disable_dimm(spd_to_dimm(device));
}
#if 1
- print_debug("min_cycle_time: ");
- print_debug_hex8(min_cycle_time);
+ print_debug("min_cycle_time: ");
+ print_debug_hex8(min_cycle_time);
print_debug(" min_latency: ");
print_debug_hex8(min_latency);
print_debug("\r\n");
@@ -347,7 +347,7 @@
value |= latencies[min_latency - 2];
pci_write_config32(PCI_DEV(0, 0x18, 2), DRAM_CONFIG_LOW, value);
#endif
-
+
return param;
}
diff --git a/util/romcc/tests/linuxi386_syscall.h b/util/romcc/tests/linuxi386_syscall.h
index 7eb513d..96a5936 100644
--- a/util/romcc/tests/linuxi386_syscall.h
+++ b/util/romcc/tests/linuxi386_syscall.h
@@ -34,7 +34,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1));
return syscall_return(res);
-
+
}
static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)
@@ -45,7 +45,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2));
return syscall_return(res);
-
+
}
@@ -58,7 +58,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
return syscall_return(res);
-
+
}
static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -70,7 +70,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
return syscall_return(res);
-
+
}
static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -80,10 +80,10 @@
asm volatile(
"int $0x80"
: "=a" (res)
- : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),
+ : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),
"S" (arg4), "D" (arg5));
return syscall_return(res);
-
+
}
#define NR_exit 1
diff --git a/util/romcc/tests/raminit_test.c b/util/romcc/tests/raminit_test.c
index 2c6fa8c..569d75b 100644
--- a/util/romcc/tests/raminit_test.c
+++ b/util/romcc/tests/raminit_test.c
@@ -136,7 +136,7 @@
void uart_wait_until_sent(void)
{
- while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
@@ -355,7 +355,7 @@
/* CAS latency 2 */
#if (CAS_LATENCY == 2)
#define CAS_NB 0x17
- /*
+ /*
* 7 == 0111
* 1 == 0001
*/
@@ -367,7 +367,7 @@
#endif
/* CAS latency 3 */
-#if (CAS_LATENCY == 3)
+#if (CAS_LATENCY == 3)
#define CAS_NB 0x13
/*
* 3 == 0011
@@ -381,11 +381,11 @@
#endif
#ifndef CAS_NB
-#error "Nothing defined"
+#error "Nothing defined"
#endif
/* Default values for config registers */
-
+
static void set_nbxcfg(void)
{
/* NBXCFG 0x50 - 0x53 */
@@ -417,7 +417,7 @@
* ECC Diagnostic Mode Enable == 0 Not Enabled
* MDA present == 0 Not Present
* USWC Write Post During During I/O Bridge Access Enable == 1 Enabled
- * In Order Queue Depth (IQD) (RO) == ??
+ * In Order Queue Depth (IQD) (RO) == ??
*/
pcibios_write_config_dword(I440GX_BUS, I440GX_DEVFN, 0x50, 0xff00000c);
}
@@ -486,7 +486,7 @@
* MD[63:0]# Buffer Strength Control 1 == 3x
* MECC[7:0] Buffer Strength Control 2 == 3x
* MECC[7:0] Buffer Strength Control 1 == 3x
- * CSB7# Buffer Strength == 3x
+ * CSB7# Buffer Strength == 3x
* CSA7# Buffer Strength == 3x
* CSB6# Buffer Strength == 3x
* CSA6# Buffer Strength == 3x
@@ -575,13 +575,13 @@
static void set_mbfs(void)
{
/* MBFS - Memory Buffer Frequencey Select Register */
- /* 0xffff7f
- * [23:20] f == 1111
- * [19:16] f == 1111
- * [15:12] f == 1111
- * [11: 8] f == 1111
- * [ 7: 4] 7 == 0111
- * [ 3: 0] f == 1111
+ /* 0xffff7f
+ * [23:20] f == 1111
+ * [19:16] f == 1111
+ * [15:12] f == 1111
+ * [11: 8] f == 1111
+ * [ 7: 4] 7 == 0111
+ * [ 3: 0] f == 1111
* MAA[14:0], WEA#, SRASA#, SCASA# == 100Mhz Buffers Enabled
* MAB[14,13,10,12:11,9:0], WEB#, SRASB#, SCASB# == 100Mhz Buffers Enabled
* MD[63:0] Control 2 == 100 Mhz Buffer Enable
@@ -622,12 +622,12 @@
static void set_pmcr(void)
{
- /* PMCR -- BIOS sets 0x90 into it.
+ /* PMCR -- BIOS sets 0x90 into it.
* 0x10 is REQUIRED.
* we have never used it. So why did this ever work?
*/
pcibios_write_config_byte(I440GX_BUS, I440GX_DEVFN, 0x7a, 0x90);
-
+
}
void sdram_set_registers(void)
{
@@ -651,7 +651,7 @@
int log2(int value)
{
/* __builtin_bsr is a exactly equivalent to the x86 machine
- * instruction with the exception that it returns -1
+ * instruction with the exception that it returns -1
* when the value presented to it is zero.
* Otherwise __builtin_bsr returns the zero based index of
* the highest bit set.
@@ -670,7 +670,7 @@
unsigned end_of_memory;
unsigned device;
unsigned drb_reg;
-
+
end_of_memory = 0; /* in multiples of 8MiB */
device = SMBUS_MEM_DEVICE_START;
drb_reg = 0x60;
@@ -704,13 +704,13 @@
#else
side1_bits += log2((byte2 << 8) | byte);
#endif
-
+
/* now I have the ram size in bits as a power of two (less 1) */
/* Make it mulitples of 8MB */
side1_bits -= 25;
-
+
/* side two */
-
+
/* number of physical banks */
byte = smbus_read_byte(device, 5);
if (byte > 1) {
@@ -783,8 +783,8 @@
}
dramc = 0x8;
if ((byte & 0x12) != 0) {
- /* this is a registered part.
- * observation: for register parts, BIOS zeros (!)
+ /* this is a registered part.
+ * observation: for register parts, BIOS zeros (!)
* registers CA-CC. This has an undocumented meaning.
*/
/* But it does make sense the oppisite of registered
@@ -835,7 +835,7 @@
}
byte &= 0x7f;
/* Default refresh rate be conservative */
- refresh_rate = 5;
+ refresh_rate = 5;
/* see if the ram refresh is a supported one */
if (byte < 6) {
#if HAVE_STATIC_ARRAY_SUPPORT
@@ -856,7 +856,7 @@
static void spd_set_rps(void)
{
/*
- * Effects: Uses serial presence detect to set the row size
+ * Effects: Uses serial presence detect to set the row size
* on a given DIMM
* FIXME: Check for illegal/unsupported ram configurations and abort
*/
@@ -881,16 +881,16 @@
page_size = byte & 0xf;
/* make it in multiples of 2Kb */
page_size -= 11;
-
+
if (page_size <= 0) continue;
-
+
/* FIXME: do something with page sizes greather than 8KB!! */
page_sizes |= (page_size << index);
-
+
/* side two */
byte = smbus_read_byte(device, 5);
if (byte <= 1) continue;
-
+
/* For now only handle the symmetrical case */
page_sizes |= (page_size << (index +2));
}
@@ -898,10 +898,10 @@
/* we have just verified that we have to have this code. It appears that
* the registered SDRAMs do indeed set the RPS wrong. sheesh.
*/
- /* at this point, page_sizes holds the RPS for all ram.
- * we have verified that for registered DRAM the values are
+ /* at this point, page_sizes holds the RPS for all ram.
+ * we have verified that for registered DRAM the values are
* 1/2 the size they should be. So we test for registered
- * and then double the sizes if needed.
+ * and then double the sizes if needed.
*/
dramc = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x57);
@@ -909,9 +909,9 @@
/* registered */
/* BIOS makes weird page size for registered! */
- /* what we have found is you need to set the EVEN banks to
- * twice the size. Fortunately there is a very easy way to
- * do this. First, read the WORD value of register 0x74.
+ /* what we have found is you need to set the EVEN banks to
+ * twice the size. Fortunately there is a very easy way to
+ * do this. First, read the WORD value of register 0x74.
*/
page_sizes += 0x1111;
}
@@ -938,8 +938,8 @@
bank_sizes = 0;
bank = 0;
device = SMBUS_MEM_DEVICE_START;
- for(; device <= SMBUS_MEM_DEVICE_END;
- bank += 2, device += SMBUS_MEM_DEVICE_INC) {
+ for(; device <= SMBUS_MEM_DEVICE_END;
+ bank += 2, device += SMBUS_MEM_DEVICE_INC) {
int byte;
/* logical banks */
@@ -947,7 +947,7 @@
if (byte < 0) continue;
if (byte < 4) continue;
bank_sizes |= (1 << bank);
-
+
/* side 2 */
/* Number of physical banks */
byte = smbus_read_byte(device, 5);
@@ -974,14 +974,14 @@
/* Say all dimms have no ECC support */
reg = 0xff;
index = 0;
-
+
device = SMBUS_MEM_DEVICE_START;
for(; device <= SMBUS_MEM_DEVICE_END; index += 2, device += SMBUS_MEM_DEVICE_INC) {
int byte;
byte = smbus_read_byte(device, 11);
if (byte < 0) continue;
-#if !USE_ECC
+#if !USE_ECC
byte = 0; /* Disable ECC */
#endif
/* 0 == None, 1 == Parity, 2 == ECC */
@@ -1015,7 +1015,7 @@
/* try this.
* We should be setting bit 2 in register 76 and we're not
* technically we should see if CL=2 for the ram,
- * but registered is so screwed up that it's kind of a lost
+ * but registered is so screwed up that it's kind of a lost
* cause.
*/
byte = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x76);
@@ -1098,7 +1098,7 @@
int i;
for(i = 0; i < 8; i++) {
unsigned long dummy;
- unsigned long addr;
+ unsigned long addr;
unsigned long next_base;
next_base = dimm_base(i +1);
@@ -1108,8 +1108,8 @@
}
addr += offset;
#if HAVE_STRING_SUPPORT
- print_debug("Reading ");
- print_debug_hex32(addr);
+ print_debug("Reading ");
+ print_debug_hex32(addr);
print_debug("\n");
#endif
#if HAVE_POINTER_SUPPORT
@@ -1120,8 +1120,8 @@
#endif
#endif
#if HAVE_STRING_SUPPORT
- print_debug("Reading ");
- print_debug_hex32(addr ^ 0xddf8);
+ print_debug("Reading ");
+ print_debug_hex32(addr ^ 0xddf8);
print_debug("\n");
#endif
#if HAVE_POINTER_SUPPORT
@@ -1132,9 +1132,9 @@
#endif
#endif
#if HAVE_STRING_SUPPORT
- print_debug("Read ");
- print_debug_hex32(addr);
- print_debug_hex32(addr ^ 0xddf8);
+ print_debug("Read ");
+ print_debug_hex32(addr);
+ print_debug_hex32(addr ^ 0xddf8);
print_debug("\n");
#endif
}
@@ -1212,9 +1212,9 @@
#if HAVE_STRING_SUPPORT
print_debug("Ram Enable 2\n");
#endif
-
+
/* Now we need 8 AUTO REFRESH / CBR cycles to be performed */
-
+
sdram_set_command_cbr();
sdram_assert_command();
sdram_assert_command();
@@ -1224,11 +1224,11 @@
sdram_assert_command();
sdram_assert_command();
sdram_assert_command();
-
+
#if HAVE_STRING_SUPPORT
print_debug("Ram Enable 3\n");
#endif
-
+
/* mode register set */
sdram_set_mode_register();
/* MAx[14:0] lines,
@@ -1245,7 +1245,7 @@
/* normal operation */
sdram_set_command_none();
-
+
#if HAVE_STRING_SUPPORT
print_debug("Ram Enable 5\n");
#endif
@@ -1270,7 +1270,7 @@
print_debug("Ram3\n");
#endif
/* Now that everything is setup enable the SDRAM.
- * Some chipsets do the work for use while on others
+ * Some chipsets do the work for use while on others
* we need to it by hand.
*/
sdram_enable();
diff --git a/util/romcc/tests/raminit_test1.c b/util/romcc/tests/raminit_test1.c
index 2c6fa8c..569d75b 100644
--- a/util/romcc/tests/raminit_test1.c
+++ b/util/romcc/tests/raminit_test1.c
@@ -136,7 +136,7 @@
void uart_wait_until_sent(void)
{
- while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
@@ -355,7 +355,7 @@
/* CAS latency 2 */
#if (CAS_LATENCY == 2)
#define CAS_NB 0x17
- /*
+ /*
* 7 == 0111
* 1 == 0001
*/
@@ -367,7 +367,7 @@
#endif
/* CAS latency 3 */
-#if (CAS_LATENCY == 3)
+#if (CAS_LATENCY == 3)
#define CAS_NB 0x13
/*
* 3 == 0011
@@ -381,11 +381,11 @@
#endif
#ifndef CAS_NB
-#error "Nothing defined"
+#error "Nothing defined"
#endif
/* Default values for config registers */
-
+
static void set_nbxcfg(void)
{
/* NBXCFG 0x50 - 0x53 */
@@ -417,7 +417,7 @@
* ECC Diagnostic Mode Enable == 0 Not Enabled
* MDA present == 0 Not Present
* USWC Write Post During During I/O Bridge Access Enable == 1 Enabled
- * In Order Queue Depth (IQD) (RO) == ??
+ * In Order Queue Depth (IQD) (RO) == ??
*/
pcibios_write_config_dword(I440GX_BUS, I440GX_DEVFN, 0x50, 0xff00000c);
}
@@ -486,7 +486,7 @@
* MD[63:0]# Buffer Strength Control 1 == 3x
* MECC[7:0] Buffer Strength Control 2 == 3x
* MECC[7:0] Buffer Strength Control 1 == 3x
- * CSB7# Buffer Strength == 3x
+ * CSB7# Buffer Strength == 3x
* CSA7# Buffer Strength == 3x
* CSB6# Buffer Strength == 3x
* CSA6# Buffer Strength == 3x
@@ -575,13 +575,13 @@
static void set_mbfs(void)
{
/* MBFS - Memory Buffer Frequencey Select Register */
- /* 0xffff7f
- * [23:20] f == 1111
- * [19:16] f == 1111
- * [15:12] f == 1111
- * [11: 8] f == 1111
- * [ 7: 4] 7 == 0111
- * [ 3: 0] f == 1111
+ /* 0xffff7f
+ * [23:20] f == 1111
+ * [19:16] f == 1111
+ * [15:12] f == 1111
+ * [11: 8] f == 1111
+ * [ 7: 4] 7 == 0111
+ * [ 3: 0] f == 1111
* MAA[14:0], WEA#, SRASA#, SCASA# == 100Mhz Buffers Enabled
* MAB[14,13,10,12:11,9:0], WEB#, SRASB#, SCASB# == 100Mhz Buffers Enabled
* MD[63:0] Control 2 == 100 Mhz Buffer Enable
@@ -622,12 +622,12 @@
static void set_pmcr(void)
{
- /* PMCR -- BIOS sets 0x90 into it.
+ /* PMCR -- BIOS sets 0x90 into it.
* 0x10 is REQUIRED.
* we have never used it. So why did this ever work?
*/
pcibios_write_config_byte(I440GX_BUS, I440GX_DEVFN, 0x7a, 0x90);
-
+
}
void sdram_set_registers(void)
{
@@ -651,7 +651,7 @@
int log2(int value)
{
/* __builtin_bsr is a exactly equivalent to the x86 machine
- * instruction with the exception that it returns -1
+ * instruction with the exception that it returns -1
* when the value presented to it is zero.
* Otherwise __builtin_bsr returns the zero based index of
* the highest bit set.
@@ -670,7 +670,7 @@
unsigned end_of_memory;
unsigned device;
unsigned drb_reg;
-
+
end_of_memory = 0; /* in multiples of 8MiB */
device = SMBUS_MEM_DEVICE_START;
drb_reg = 0x60;
@@ -704,13 +704,13 @@
#else
side1_bits += log2((byte2 << 8) | byte);
#endif
-
+
/* now I have the ram size in bits as a power of two (less 1) */
/* Make it mulitples of 8MB */
side1_bits -= 25;
-
+
/* side two */
-
+
/* number of physical banks */
byte = smbus_read_byte(device, 5);
if (byte > 1) {
@@ -783,8 +783,8 @@
}
dramc = 0x8;
if ((byte & 0x12) != 0) {
- /* this is a registered part.
- * observation: for register parts, BIOS zeros (!)
+ /* this is a registered part.
+ * observation: for register parts, BIOS zeros (!)
* registers CA-CC. This has an undocumented meaning.
*/
/* But it does make sense the oppisite of registered
@@ -835,7 +835,7 @@
}
byte &= 0x7f;
/* Default refresh rate be conservative */
- refresh_rate = 5;
+ refresh_rate = 5;
/* see if the ram refresh is a supported one */
if (byte < 6) {
#if HAVE_STATIC_ARRAY_SUPPORT
@@ -856,7 +856,7 @@
static void spd_set_rps(void)
{
/*
- * Effects: Uses serial presence detect to set the row size
+ * Effects: Uses serial presence detect to set the row size
* on a given DIMM
* FIXME: Check for illegal/unsupported ram configurations and abort
*/
@@ -881,16 +881,16 @@
page_size = byte & 0xf;
/* make it in multiples of 2Kb */
page_size -= 11;
-
+
if (page_size <= 0) continue;
-
+
/* FIXME: do something with page sizes greather than 8KB!! */
page_sizes |= (page_size << index);
-
+
/* side two */
byte = smbus_read_byte(device, 5);
if (byte <= 1) continue;
-
+
/* For now only handle the symmetrical case */
page_sizes |= (page_size << (index +2));
}
@@ -898,10 +898,10 @@
/* we have just verified that we have to have this code. It appears that
* the registered SDRAMs do indeed set the RPS wrong. sheesh.
*/
- /* at this point, page_sizes holds the RPS for all ram.
- * we have verified that for registered DRAM the values are
+ /* at this point, page_sizes holds the RPS for all ram.
+ * we have verified that for registered DRAM the values are
* 1/2 the size they should be. So we test for registered
- * and then double the sizes if needed.
+ * and then double the sizes if needed.
*/
dramc = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x57);
@@ -909,9 +909,9 @@
/* registered */
/* BIOS makes weird page size for registered! */
- /* what we have found is you need to set the EVEN banks to
- * twice the size. Fortunately there is a very easy way to
- * do this. First, read the WORD value of register 0x74.
+ /* what we have found is you need to set the EVEN banks to
+ * twice the size. Fortunately there is a very easy way to
+ * do this. First, read the WORD value of register 0x74.
*/
page_sizes += 0x1111;
}
@@ -938,8 +938,8 @@
bank_sizes = 0;
bank = 0;
device = SMBUS_MEM_DEVICE_START;
- for(; device <= SMBUS_MEM_DEVICE_END;
- bank += 2, device += SMBUS_MEM_DEVICE_INC) {
+ for(; device <= SMBUS_MEM_DEVICE_END;
+ bank += 2, device += SMBUS_MEM_DEVICE_INC) {
int byte;
/* logical banks */
@@ -947,7 +947,7 @@
if (byte < 0) continue;
if (byte < 4) continue;
bank_sizes |= (1 << bank);
-
+
/* side 2 */
/* Number of physical banks */
byte = smbus_read_byte(device, 5);
@@ -974,14 +974,14 @@
/* Say all dimms have no ECC support */
reg = 0xff;
index = 0;
-
+
device = SMBUS_MEM_DEVICE_START;
for(; device <= SMBUS_MEM_DEVICE_END; index += 2, device += SMBUS_MEM_DEVICE_INC) {
int byte;
byte = smbus_read_byte(device, 11);
if (byte < 0) continue;
-#if !USE_ECC
+#if !USE_ECC
byte = 0; /* Disable ECC */
#endif
/* 0 == None, 1 == Parity, 2 == ECC */
@@ -1015,7 +1015,7 @@
/* try this.
* We should be setting bit 2 in register 76 and we're not
* technically we should see if CL=2 for the ram,
- * but registered is so screwed up that it's kind of a lost
+ * but registered is so screwed up that it's kind of a lost
* cause.
*/
byte = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x76);
@@ -1098,7 +1098,7 @@
int i;
for(i = 0; i < 8; i++) {
unsigned long dummy;
- unsigned long addr;
+ unsigned long addr;
unsigned long next_base;
next_base = dimm_base(i +1);
@@ -1108,8 +1108,8 @@
}
addr += offset;
#if HAVE_STRING_SUPPORT
- print_debug("Reading ");
- print_debug_hex32(addr);
+ print_debug("Reading ");
+ print_debug_hex32(addr);
print_debug("\n");
#endif
#if HAVE_POINTER_SUPPORT
@@ -1120,8 +1120,8 @@
#endif
#endif
#if HAVE_STRING_SUPPORT
- print_debug("Reading ");
- print_debug_hex32(addr ^ 0xddf8);
+ print_debug("Reading ");
+ print_debug_hex32(addr ^ 0xddf8);
print_debug("\n");
#endif
#if HAVE_POINTER_SUPPORT
@@ -1132,9 +1132,9 @@
#endif
#endif
#if HAVE_STRING_SUPPORT
- print_debug("Read ");
- print_debug_hex32(addr);
- print_debug_hex32(addr ^ 0xddf8);
+ print_debug("Read ");
+ print_debug_hex32(addr);
+ print_debug_hex32(addr ^ 0xddf8);
print_debug("\n");
#endif
}
@@ -1212,9 +1212,9 @@
#if HAVE_STRING_SUPPORT
print_debug("Ram Enable 2\n");
#endif
-
+
/* Now we need 8 AUTO REFRESH / CBR cycles to be performed */
-
+
sdram_set_command_cbr();
sdram_assert_command();
sdram_assert_command();
@@ -1224,11 +1224,11 @@
sdram_assert_command();
sdram_assert_command();
sdram_assert_command();
-
+
#if HAVE_STRING_SUPPORT
print_debug("Ram Enable 3\n");
#endif
-
+
/* mode register set */
sdram_set_mode_register();
/* MAx[14:0] lines,
@@ -1245,7 +1245,7 @@
/* normal operation */
sdram_set_command_none();
-
+
#if HAVE_STRING_SUPPORT
print_debug("Ram Enable 5\n");
#endif
@@ -1270,7 +1270,7 @@
print_debug("Ram3\n");
#endif
/* Now that everything is setup enable the SDRAM.
- * Some chipsets do the work for use while on others
+ * Some chipsets do the work for use while on others
* we need to it by hand.
*/
sdram_enable();
diff --git a/util/romcc/tests/raminit_test2.c b/util/romcc/tests/raminit_test2.c
index 2294b34..d20ae6d 100644
--- a/util/romcc/tests/raminit_test2.c
+++ b/util/romcc/tests/raminit_test2.c
@@ -136,7 +136,7 @@
void uart_wait_until_sent(void)
{
- while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
@@ -355,7 +355,7 @@
/* CAS latency 2 */
#if (CAS_LATENCY == 2)
#define CAS_NB 0x17
- /*
+ /*
* 7 == 0111
* 1 == 0001
*/
@@ -367,7 +367,7 @@
#endif
/* CAS latency 3 */
-#if (CAS_LATENCY == 3)
+#if (CAS_LATENCY == 3)
#define CAS_NB 0x13
/*
* 3 == 0011
@@ -381,11 +381,11 @@
#endif
#ifndef CAS_NB
-#error "Nothing defined"
+#error "Nothing defined"
#endif
/* Default values for config registers */
-
+
static void set_nbxcfg(void)
{
/* NBXCFG 0x50 - 0x53 */
@@ -417,7 +417,7 @@
* ECC Diagnostic Mode Enable == 0 Not Enabled
* MDA present == 0 Not Present
* USWC Write Post During During I/O Bridge Access Enable == 1 Enabled
- * In Order Queue Depth (IQD) (RO) == ??
+ * In Order Queue Depth (IQD) (RO) == ??
*/
pcibios_write_config_dword(I440GX_BUS, I440GX_DEVFN, 0x50, 0xff00000c);
}
@@ -486,7 +486,7 @@
* MD[63:0]# Buffer Strength Control 1 == 3x
* MECC[7:0] Buffer Strength Control 2 == 3x
* MECC[7:0] Buffer Strength Control 1 == 3x
- * CSB7# Buffer Strength == 3x
+ * CSB7# Buffer Strength == 3x
* CSA7# Buffer Strength == 3x
* CSB6# Buffer Strength == 3x
* CSA6# Buffer Strength == 3x
@@ -575,13 +575,13 @@
static void set_mbfs(void)
{
/* MBFS - Memory Buffer Frequencey Select Register */
- /* 0xffff7f
- * [23:20] f == 1111
- * [19:16] f == 1111
- * [15:12] f == 1111
- * [11: 8] f == 1111
- * [ 7: 4] 7 == 0111
- * [ 3: 0] f == 1111
+ /* 0xffff7f
+ * [23:20] f == 1111
+ * [19:16] f == 1111
+ * [15:12] f == 1111
+ * [11: 8] f == 1111
+ * [ 7: 4] 7 == 0111
+ * [ 3: 0] f == 1111
* MAA[14:0], WEA#, SRASA#, SCASA# == 100Mhz Buffers Enabled
* MAB[14,13,10,12:11,9:0], WEB#, SRASB#, SCASB# == 100Mhz Buffers Enabled
* MD[63:0] Control 2 == 100 Mhz Buffer Enable
@@ -622,12 +622,12 @@
static void set_pmcr(void)
{
- /* PMCR -- BIOS sets 0x90 into it.
+ /* PMCR -- BIOS sets 0x90 into it.
* 0x10 is REQUIRED.
* we have never used it. So why did this ever work?
*/
pcibios_write_config_byte(I440GX_BUS, I440GX_DEVFN, 0x7a, 0x90);
-
+
}
void sdram_set_registers(void)
{
@@ -651,7 +651,7 @@
int log2(int value)
{
/* __builtin_bsr is a exactly equivalent to the x86 machine
- * instruction with the exception that it returns -1
+ * instruction with the exception that it returns -1
* when the value presented to it is zero.
* Otherwise __builtin_bsr returns the zero based index of
* the highest bit set.
@@ -670,7 +670,7 @@
unsigned end_of_memory;
unsigned device;
unsigned drb_reg;
-
+
end_of_memory = 0; /* in multiples of 8MiB */
device = SMBUS_MEM_DEVICE_START;
drb_reg = 0x60;
@@ -704,13 +704,13 @@
#else
side1_bits += log2((byte2 << 8) | byte);
#endif
-
+
/* now I have the ram size in bits as a power of two (less 1) */
/* Make it mulitples of 8MB */
side1_bits -= 25;
-
+
/* side two */
-
+
/* number of physical banks */
byte = smbus_read_byte(device, 5);
if (byte > 1) {
@@ -783,8 +783,8 @@
}
dramc = 0x8;
if ((byte & 0x12) != 0) {
- /* this is a registered part.
- * observation: for register parts, BIOS zeros (!)
+ /* this is a registered part.
+ * observation: for register parts, BIOS zeros (!)
* registers CA-CC. This has an undocumented meaning.
*/
/* But it does make sense the oppisite of registered
@@ -835,7 +835,7 @@
}
byte &= 0x7f;
/* Default refresh rate be conservative */
- refresh_rate = 5;
+ refresh_rate = 5;
/* see if the ram refresh is a supported one */
if (byte < 6) {
#if HAVE_STATIC_ARRAY_SUPPORT
@@ -856,7 +856,7 @@
static void spd_set_rps(void)
{
/*
- * Effects: Uses serial presence detect to set the row size
+ * Effects: Uses serial presence detect to set the row size
* on a given DIMM
* FIXME: Check for illegal/unsupported ram configurations and abort
*/
@@ -881,16 +881,16 @@
page_size = byte & 0xf;
/* make it in multiples of 2Kb */
page_size -= 11;
-
+
if (page_size <= 0) continue;
-
+
/* FIXME: do something with page sizes greather than 8KB!! */
page_sizes |= (page_size << index);
-
+
/* side two */
byte = smbus_read_byte(device, 5);
if (byte <= 1) continue;
-
+
/* For now only handle the symmetrical case */
page_sizes |= (page_size << (index +2));
}
@@ -898,10 +898,10 @@
/* we have just verified that we have to have this code. It appears that
* the registered SDRAMs do indeed set the RPS wrong. sheesh.
*/
- /* at this point, page_sizes holds the RPS for all ram.
- * we have verified that for registered DRAM the values are
+ /* at this point, page_sizes holds the RPS for all ram.
+ * we have verified that for registered DRAM the values are
* 1/2 the size they should be. So we test for registered
- * and then double the sizes if needed.
+ * and then double the sizes if needed.
*/
dramc = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x57);
@@ -909,9 +909,9 @@
/* registered */
/* BIOS makes weird page size for registered! */
- /* what we have found is you need to set the EVEN banks to
- * twice the size. Fortunately there is a very easy way to
- * do this. First, read the WORD value of register 0x74.
+ /* what we have found is you need to set the EVEN banks to
+ * twice the size. Fortunately there is a very easy way to
+ * do this. First, read the WORD value of register 0x74.
*/
page_sizes += 0x1111;
}
@@ -938,8 +938,8 @@
bank_sizes = 0;
bank = 0;
device = SMBUS_MEM_DEVICE_START;
- for(; device <= SMBUS_MEM_DEVICE_END;
- bank += 2, device += SMBUS_MEM_DEVICE_INC) {
+ for(; device <= SMBUS_MEM_DEVICE_END;
+ bank += 2, device += SMBUS_MEM_DEVICE_INC) {
int byte;
/* logical banks */
@@ -947,7 +947,7 @@
if (byte < 0) continue;
if (byte < 4) continue;
bank_sizes |= (1 << bank);
-
+
/* side 2 */
/* Number of physical banks */
byte = smbus_read_byte(device, 5);
@@ -974,14 +974,14 @@
/* Say all dimms have no ECC support */
reg = 0xff;
index = 0;
-
+
device = SMBUS_MEM_DEVICE_START;
for(; device <= SMBUS_MEM_DEVICE_END; index += 2, device += SMBUS_MEM_DEVICE_INC) {
int byte;
byte = smbus_read_byte(device, 11);
if (byte < 0) continue;
-#if !USE_ECC
+#if !USE_ECC
byte = 0; /* Disable ECC */
#endif
/* 0 == None, 1 == Parity, 2 == ECC */
@@ -1015,7 +1015,7 @@
/* try this.
* We should be setting bit 2 in register 76 and we're not
* technically we should see if CL=2 for the ram,
- * but registered is so screwed up that it's kind of a lost
+ * but registered is so screwed up that it's kind of a lost
* cause.
*/
byte = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x76);
@@ -1098,7 +1098,7 @@
int i;
for(i = 0; i < 8; i++) {
unsigned long dummy;
- unsigned long addr;
+ unsigned long addr;
unsigned long next_base;
next_base = dimm_base(i +1);
@@ -1108,8 +1108,8 @@
}
addr += offset;
#if HAVE_STRING_SUPPORT
- print_debug("Reading ");
- print_debug_hex32(addr);
+ print_debug("Reading ");
+ print_debug_hex32(addr);
print_debug("\n");
#endif
#if HAVE_POINTER_SUPPORT
@@ -1120,8 +1120,8 @@
#endif
#endif
#if HAVE_STRING_SUPPORT
- print_debug("Reading ");
- print_debug_hex32(addr ^ 0xddf8);
+ print_debug("Reading ");
+ print_debug_hex32(addr ^ 0xddf8);
print_debug("\n");
#endif
#if HAVE_POINTER_SUPPORT
@@ -1132,9 +1132,9 @@
#endif
#endif
#if HAVE_STRING_SUPPORT
- print_debug("Read ");
- print_debug_hex32(addr);
- print_debug_hex32(addr ^ 0xddf8);
+ print_debug("Read ");
+ print_debug_hex32(addr);
+ print_debug_hex32(addr ^ 0xddf8);
print_debug("\n");
#endif
}
@@ -1212,9 +1212,9 @@
#if HAVE_STRING_SUPPORT
print_debug("Ram Enable 2\n");
#endif
-
+
/* Now we need 8 AUTO REFRESH / CBR cycles to be performed */
-
+
sdram_set_command_cbr();
sdram_assert_command();
sdram_assert_command();
@@ -1224,11 +1224,11 @@
sdram_assert_command();
sdram_assert_command();
sdram_assert_command();
-
+
#if HAVE_STRING_SUPPORT
print_debug("Ram Enable 3\n");
#endif
-
+
/* mode register set */
sdram_set_mode_register();
/* MAx[14:0] lines,
@@ -1245,7 +1245,7 @@
/* normal operation */
sdram_set_command_none();
-
+
#if HAVE_STRING_SUPPORT
print_debug("Ram Enable 5\n");
#endif
@@ -1270,7 +1270,7 @@
print_debug("Ram3\n");
#endif
/* Now that everything is setup enable the SDRAM.
- * Some chipsets do the work for use while on others
+ * Some chipsets do the work for use while on others
* we need to it by hand.
*/
sdram_enable();
diff --git a/util/romcc/tests/raminit_test6.c b/util/romcc/tests/raminit_test6.c
index a0c3f05..e99e355 100644
--- a/util/romcc/tests/raminit_test6.c
+++ b/util/romcc/tests/raminit_test6.c
@@ -1,30 +1,30 @@
typedef unsigned char uint8_t;
-typedef signed char int8_t;
+typedef signed char int8_t;
typedef unsigned short uint16_t;
typedef signed short int16_t;
typedef unsigned int uint32_t;
typedef signed int int32_t;
-
+
typedef unsigned char uint_least8_t;
-typedef signed char int_least8_t;
+typedef signed char int_least8_t;
typedef unsigned short uint_least16_t;
typedef signed short int_least16_t;
typedef unsigned int uint_least32_t;
typedef signed int int_least32_t;
-
+
typedef unsigned char uint_fast8_t;
-typedef signed char int_fast8_t;
+typedef signed char int_fast8_t;
typedef unsigned int uint_fast16_t;
typedef signed int int_fast16_t;
typedef unsigned int uint_fast32_t;
typedef signed int int_fast32_t;
-
+
typedef int intptr_t;
typedef unsigned int uintptr_t;
-
+
typedef long int intmax_t;
typedef unsigned long int uintmax_t;
-
+
static inline unsigned long apic_read(unsigned long reg)
{
return *((volatile unsigned long *)(0xfee00000 +reg));
@@ -37,7 +37,7 @@
{
do { } while ( apic_read( 0x300 ) & 0x01000 );
}
-
+
static void outb(unsigned char value, unsigned short port)
{
__builtin_outb(value, port);
@@ -65,7 +65,7 @@
static inline void outsb(uint16_t port, const void *addr, unsigned long count)
{
__asm__ __volatile__ (
- "cld ; rep ; outsb "
+ "cld ; rep ; outsb "
: "=S" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@@ -73,7 +73,7 @@
static inline void outsw(uint16_t port, const void *addr, unsigned long count)
{
__asm__ __volatile__ (
- "cld ; rep ; outsw "
+ "cld ; rep ; outsw "
: "=S" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@@ -81,7 +81,7 @@
static inline void outsl(uint16_t port, const void *addr, unsigned long count)
{
__asm__ __volatile__ (
- "cld ; rep ; outsl "
+ "cld ; rep ; outsl "
: "=S" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@@ -89,7 +89,7 @@
static inline void insb(uint16_t port, void *addr, unsigned long count)
{
__asm__ __volatile__ (
- "cld ; rep ; insb "
+ "cld ; rep ; insb "
: "=D" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@@ -97,7 +97,7 @@
static inline void insw(uint16_t port, void *addr, unsigned long count)
{
__asm__ __volatile__ (
- "cld ; rep ; insw "
+ "cld ; rep ; insw "
: "=D" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@@ -105,7 +105,7 @@
static inline void insl(uint16_t port, void *addr, unsigned long count)
{
__asm__ __volatile__ (
- "cld ; rep ; insl "
+ "cld ; rep ; insl "
: "=D" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@@ -180,7 +180,7 @@
}
int log2(int value)
{
-
+
return __builtin_bsr(value);
}
typedef unsigned device_t;
@@ -237,11 +237,11 @@
}
return (0xffffffffU) ;
}
-
-
-
-
-
+
+
+
+
+
static int uart_can_tx_byte(void)
{
return inb(1016 + 0x05 ) & 0x20;
@@ -253,29 +253,29 @@
}
static void uart_wait_until_sent(void)
{
- while(!(inb(1016 + 0x05 ) & 0x40))
+ while(!(inb(1016 + 0x05 ) & 0x40))
;
}
static void uart_tx_byte(unsigned char data)
{
uart_wait_to_tx_byte();
outb(data, 1016 + 0x00 );
-
+
uart_wait_until_sent();
}
static void uart_init(void)
{
-
+
outb(0x0, 1016 + 0x01 );
-
+
outb(0x01, 1016 + 0x02 );
-
+
outb(0x80 | 3 , 1016 + 0x03 );
outb((115200/ 115200 ) & 0xFF, 1016 + 0x00 );
outb(((115200/ 115200 ) >> 8) & 0xFF, 1016 + 0x01 );
outb(3 , 1016 + 0x03 );
}
-
+
static void __console_tx_byte(unsigned char byte)
{
uart_tx_byte(byte);
@@ -380,12 +380,12 @@
static void print_spew(const char *str) { __console_tx_string(8 , str); }
static void console_init(void)
{
- static const char console_test[] =
+ static const char console_test[] =
"\r\n\r\nLinuxBIOS-"
- "1.1.4"
- ".0Fallback"
+ "1.1.4"
+ ".0Fallback"
" "
- "Thu Oct 9 20:29:48 MDT 2003"
+ "Thu Oct 9 20:29:48 MDT 2003"
" starting...\r\n";
print_info(console_test);
}
@@ -400,9 +400,9 @@
{
asm volatile(
"movnti %1, (%0)"
- :
- : "r" (addr), "r" (value)
- :
+ :
+ : "r" (addr), "r" (value)
+ :
);
}
static unsigned long read_phys(unsigned long addr)
@@ -414,28 +414,28 @@
static void ram_fill(unsigned long start, unsigned long stop)
{
unsigned long addr;
-
+
print_debug("DRAM fill: ");
print_debug_hex32(start);
print_debug("-");
print_debug_hex32(stop);
print_debug("\r\n");
for(addr = start; addr < stop ; addr += 4) {
-
+
if (!(addr & 0xffff)) {
print_debug_hex32(addr);
print_debug("\r");
}
write_phys(addr, addr);
};
-
+
print_debug_hex32(addr);
print_debug("\r\nDRAM filled\r\n");
}
static void ram_verify(unsigned long start, unsigned long stop)
{
unsigned long addr;
-
+
print_debug("DRAM verify: ");
print_debug_hex32(start);
print_debug_char('-');
@@ -443,31 +443,31 @@
print_debug("\r\n");
for(addr = start; addr < stop ; addr += 4) {
unsigned long value;
-
+
if (!(addr & 0xffff)) {
print_debug_hex32(addr);
print_debug("\r");
}
value = read_phys(addr);
if (value != addr) {
-
+
print_err_hex32(addr);
print_err_char(':');
print_err_hex32(value);
print_err("\r\n");
}
}
-
+
print_debug_hex32(addr);
print_debug("\r\nDRAM verified\r\n");
}
void ram_check(unsigned long start, unsigned long stop)
{
int result;
-
+
print_debug("Testing DRAM : ");
print_debug_hex32(start);
- print_debug("-");
+ print_debug("-");
print_debug_hex32(stop);
print_debug("\r\n");
ram_fill(start, stop);
@@ -476,7 +476,7 @@
}
static int enumerate_ht_chain(unsigned link)
{
-
+
unsigned next_unitid, last_unitid;
int reset_needed = 0;
next_unitid = 1;
@@ -485,7 +485,7 @@
uint8_t hdr_type, pos;
last_unitid = next_unitid;
id = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x00 );
-
+
if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
(((id >> 16) & 0xffff) == 0xffff) ||
(((id >> 16) & 0xffff) == 0x0000)) {
@@ -531,7 +531,7 @@
pci_write_config32(dev, 0x58, 0x0f00 | 1);
enable = pci_read_config8(dev, 0x41);
pci_write_config8(dev, 0x41, enable | (1 << 7));
-
+
outw(inw(0x0f00 + 0xe0 ), 0x0f00 + 0xe0 );
}
static inline void smbus_delay(void)
@@ -550,7 +550,7 @@
break;
}
if(loops == ((100*1000*10) / 2)) {
- outw(inw(0x0f00 + 0xe0 ),
+ outw(inw(0x0f00 + 0xe0 ),
0x0f00 + 0xe0 );
}
} while(--loops);
@@ -563,7 +563,7 @@
do {
unsigned short val;
smbus_delay();
-
+
val = inw(0x0f00 + 0xe0 );
if (((val & 0x8) == 0) | ((val & 0x437) != 0)) {
break;
@@ -579,29 +579,29 @@
if (smbus_wait_until_ready() < 0) {
return -2;
}
-
-
-
+
+
+
outw(inw(0x0f00 + 0xe2 ) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), 0x0f00 + 0xe2 );
-
+
outw(((device & 0x7f) << 1) | 1, 0x0f00 + 0xe4 );
-
+
outb(address & 0xFF, 0x0f00 + 0xe8 );
-
+
outw((inw(0x0f00 + 0xe2 ) & ~7) | (0x2), 0x0f00 + 0xe2 );
-
-
+
+
outw(inw(0x0f00 + 0xe0 ), 0x0f00 + 0xe0 );
-
+
outw(0, 0x0f00 + 0xe6 );
-
+
outw((inw(0x0f00 + 0xe2 ) | (1 << 3)), 0x0f00 + 0xe2 );
-
+
if (smbus_wait_until_done() < 0) {
return -3;
}
global_status_register = inw(0x0f00 + 0xe0 );
-
+
byte = inw(0x0f00 + 0xe6 ) & 0xff;
if (global_status_register != (1 << 4)) {
return -1;
@@ -636,31 +636,31 @@
{
tsc_t res;
asm ("rdtsc"
- : "=a" (res.lo), "=d"(res.hi)
- :
- :
+ : "=a" (res.lo), "=d"(res.hi)
+ :
+ :
);
return res;
}
void init_timer(void)
{
-
+
apic_write(0x320 , (1 << 17)|(1<< 16)|(0 << 12)|(0 << 0));
-
+
apic_write(0x3E0 , 0xB );
-
+
apic_write(0x380 , 0xffffffff);
}
void udelay(unsigned usecs)
{
uint32_t start, value, ticks;
-
+
ticks = usecs * 200;
start = apic_read(0x390 );
do {
value = apic_read(0x390 );
} while((start - value) < ticks);
-
+
}
void mdelay(unsigned msecs)
{
@@ -732,8 +732,8 @@
static void print_pci_devices(void)
{
device_t dev;
- for(dev = ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) ;
- dev <= ( ((( 0 ) & 0xFF) << 16) | ((( 0x1f ) & 0x1f) << 11) | ((( 0x7 ) & 0x7) << 8)) ;
+ for(dev = ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) ;
+ dev <= ( ((( 0 ) & 0xFF) << 16) | ((( 0x1f ) & 0x1f) << 11) | ((( 0x7 ) & 0x7) << 8)) ;
dev += ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 1 ) & 0x7) << 8)) ) {
uint32_t id;
id = pci_read_config32(dev, 0x00 );
@@ -751,7 +751,7 @@
int i;
print_debug_pci_dev(dev);
print_debug("\r\n");
-
+
for(i = 0; i <= 255; i++) {
unsigned char val;
if ((i & 0x0f) == 0) {
@@ -769,8 +769,8 @@
static void dump_pci_devices(void)
{
device_t dev;
- for(dev = ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) ;
- dev <= ( ((( 0 ) & 0xFF) << 16) | ((( 0x1f ) & 0x1f) << 11) | ((( 0x7 ) & 0x7) << 8)) ;
+ for(dev = ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) ;
+ dev <= ( ((( 0 ) & 0xFF) << 16) | ((( 0x1f ) & 0x1f) << 11) | ((( 0x7 ) & 0x7) << 8)) ;
dev += ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 1 ) & 0x7) << 8)) ) {
uint32_t id;
id = pci_read_config32(dev, 0x00 );
@@ -791,8 +791,8 @@
device = ctrl->channel0[i];
if (device) {
int j;
- print_debug("dimm: ");
- print_debug_hex8(i);
+ print_debug("dimm: ");
+ print_debug_hex8(i);
print_debug(".0: ");
print_debug_hex8(device);
for(j = 0; j < 256; j++) {
@@ -817,8 +817,8 @@
device = ctrl->channel1[i];
if (device) {
int j;
- print_debug("dimm: ");
- print_debug_hex8(i);
+ print_debug("dimm: ");
+ print_debug_hex8(i);
print_debug(".1: ");
print_debug_hex8(device);
for(j = 0; j < 256; j++) {
@@ -842,13 +842,13 @@
}
}
}
-
+
static unsigned int cpuid(unsigned int op)
{
unsigned int ret;
unsigned dummy2,dummy3,dummy4;
- asm volatile (
- "cpuid"
+ asm volatile (
+ "cpuid"
: "=a" (ret), "=b" (dummy2), "=c" (dummy3), "=d" (dummy4)
: "a" (op)
);
@@ -865,13 +865,13 @@
static void memreset_setup(void)
{
if (is_cpu_pre_c0()) {
-
+
outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), 0x0f00 + 0xc0 + 28);
-
+
outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), 0x0f00 + 0xc0 + 29);
}
else {
-
+
outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), 0x0f00 + 0xc0 + 29);
}
}
@@ -879,15 +879,15 @@
{
if (is_cpu_pre_c0()) {
udelay(800);
-
+
outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), 0x0f00 + 0xc0 + 28);
udelay(90);
}
}
static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes)
{
-
- uint32_t ret=0x00010101;
+
+ uint32_t ret=0x00010101;
static const unsigned int rows_2p[2][2] = {
{ 0x00050101, 0x00010404 },
{ 0x00010404, 0x00050101 }
@@ -905,33 +905,33 @@
{
return smbus_read_byte(device, address);
}
-
+
static void coherent_ht_mainboard(unsigned cpus)
{
}
-
+
void cpu_ldtstop(unsigned cpus)
{
uint32_t tmp;
device_t dev;
unsigned cnt;
for(cnt=0; cnt<cpus; cnt++) {
-
+
pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 ) & 0x7) << 8)) ,0x81,0x23);
-
+
pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 ) & 0x7) << 8)) ,0xd4,0x00000701);
-
+
pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 ) & 0x7) << 8)) ,0xd8,0x00000000);
-
+
tmp=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 2 ) & 0x7) << 8)) ,0x90);
pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 2 ) & 0x7) << 8)) ,0x90, tmp | (1<<24) );
}
}
-
-
-
-
-
+
+
+
+
+
static void setup_resource_map(const unsigned int *register_values, int max)
{
int i;
@@ -952,8 +952,8 @@
static void setup_default_resource_map(void)
{
static const unsigned int register_values[] = {
-
-
+
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x44 ) & 0xFF)) , 0x0000f8f8, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x4C ) & 0xFF)) , 0x0000f8f8, 0x00000001,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x54 ) & 0xFF)) , 0x0000f8f8, 0x00000002,
@@ -962,7 +962,7 @@
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x6C ) & 0xFF)) , 0x0000f8f8, 0x00000005,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x74 ) & 0xFF)) , 0x0000f8f8, 0x00000006,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x7C ) & 0xFF)) , 0x0000f8f8, 0x00000007,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x40 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x48 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x50 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
@@ -971,7 +971,7 @@
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x68 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x70 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x78 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x84 ) & 0xFF)) , 0x00000048, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x8C ) & 0xFF)) , 0x00000048, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x94 ) & 0xFF)) , 0x00000048, 0x00000000,
@@ -980,7 +980,7 @@
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xAC ) & 0xFF)) , 0x00000048, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xB4 ) & 0xFF)) , 0x00000048, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xBC ) & 0xFF)) , 0x00000048, 0x00ffff00,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x80 ) & 0xFF)) , 0x000000f0, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x88 ) & 0xFF)) , 0x000000f0, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x90 ) & 0xFF)) , 0x000000f0, 0x00000000,
@@ -989,17 +989,17 @@
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xA8 ) & 0xFF)) , 0x000000f0, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xB0 ) & 0xFF)) , 0x000000f0, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xB8 ) & 0xFF)) , 0x000000f0, 0x00fc0003,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xC4 ) & 0xFF)) , 0xFE000FC8, 0x01fff000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xCC ) & 0xFF)) , 0xFE000FC8, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xD4 ) & 0xFF)) , 0xFE000FC8, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xDC ) & 0xFF)) , 0xFE000FC8, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xC0 ) & 0xFF)) , 0xFE000FCC, 0x00000003,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xC8 ) & 0xFF)) , 0xFE000FCC, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xD0 ) & 0xFF)) , 0xFE000FCC, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xD8 ) & 0xFF)) , 0xFE000FCC, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xE0 ) & 0xFF)) , 0x0000FC88, 0xff000003,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xE4 ) & 0xFF)) , 0x0000FC88, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xE8 ) & 0xFF)) , 0x0000FC88, 0x00000000,
@@ -1012,8 +1012,8 @@
static void sdram_set_registers(const struct mem_controller *ctrl)
{
static const unsigned int register_values[] = {
-
-
+
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x44 ) & 0xFF)) , 0x0000f8f8, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x4C ) & 0xFF)) , 0x0000f8f8, 0x00000001,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x54 ) & 0xFF)) , 0x0000f8f8, 0x00000002,
@@ -1022,7 +1022,7 @@
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x6C ) & 0xFF)) , 0x0000f8f8, 0x00000005,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x74 ) & 0xFF)) , 0x0000f8f8, 0x00000006,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x7C ) & 0xFF)) , 0x0000f8f8, 0x00000007,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x40 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x48 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x50 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
@@ -1031,7 +1031,7 @@
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x68 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x70 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x78 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x40 ) & 0xFF)) , 0x001f01fe, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x44 ) & 0xFF)) , 0x001f01fe, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x48 ) & 0xFF)) , 0x001f01fe, 0x00000000,
@@ -1040,7 +1040,7 @@
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x54 ) & 0xFF)) , 0x001f01fe, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x58 ) & 0xFF)) , 0x001f01fe, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x5C ) & 0xFF)) , 0x001f01fe, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x60 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x64 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x68 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
@@ -1049,33 +1049,33 @@
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x74 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x78 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x7C ) & 0xFF)) , 0xC01f01ff, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x80 ) & 0xFF)) , 0xffff8888, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x88 ) & 0xFF)) , 0xe8088008, 0x02522001 ,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x8c ) & 0xFF)) , 0xff8fe08e, (0 << 20)|(0 << 8)|(0 << 4)|(0 << 0),
-
- ( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x90 ) & 0xFF)) , 0xf0000000,
- (4 << 25)|(0 << 24)|
- (0 << 23)|(0 << 22)|(0 << 21)|(0 << 20)|
- (1 << 19)|(0 << 18)|(1 << 17)|(0 << 16)|
- (2 << 14)|(0 << 13)|(0 << 12)|
- (0 << 11)|(0 << 10)|(0 << 9)|(0 << 8)|
+
+ ( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x90 ) & 0xFF)) , 0xf0000000,
+ (4 << 25)|(0 << 24)|
+ (0 << 23)|(0 << 22)|(0 << 21)|(0 << 20)|
+ (1 << 19)|(0 << 18)|(1 << 17)|(0 << 16)|
+ (2 << 14)|(0 << 13)|(0 << 12)|
+ (0 << 11)|(0 << 10)|(0 << 9)|(0 << 8)|
(0 << 3) |(0 << 1) |(0 << 0),
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x94 ) & 0xFF)) , 0xc180f0f0,
(0 << 29)|(0 << 28)|(0 << 27)|(0 << 26)|(0 << 25)|
(0 << 20)|(0 << 19)|(3 << 16)|(0 << 8)|(0 << 0),
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x98 ) & 0xFF)) , 0xfc00ffff, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 3 ) & 0x07) << 8) | (( 0x58 ) & 0xFF)) , 0xffe0e0e0, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 3 ) & 0x07) << 8) | (( 0x5C ) & 0xFF)) , 0x0000003e, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 3 ) & 0x07) << 8) | (( 0x60 ) & 0xFF)) , 0xffffff00, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 3 ) & 0x07) << 8) | (( 0x94 ) & 0xFF)) , 0xffff8000, 0x00000f70,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 3 ) & 0x07) << 8) | (( 0x90 ) & 0xFF)) , 0xffffff80, 0x00000002,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 3 ) & 0x07) << 8) | (( 0x98 ) & 0xFF)) , 0x0000000f, 0x00068300,
@@ -1107,14 +1107,14 @@
}
static int is_opteron(const struct mem_controller *ctrl)
{
-
+
uint32_t nbcap;
nbcap = pci_read_config32(ctrl->f3, 0xE8 );
return !!(nbcap & 0x0001 );
}
static int is_registered(const struct mem_controller *ctrl)
{
-
+
uint32_t dcl;
dcl = pci_read_config32(ctrl->f2, 0x90 );
return !(dcl & (1<<18) );
@@ -1125,45 +1125,45 @@
};
static struct dimm_size spd_get_dimm_size(unsigned device)
{
-
+
struct dimm_size sz;
int value, low;
sz.side1 = 0;
sz.side2 = 0;
-
- value = spd_read_byte(device, 3);
+
+ value = spd_read_byte(device, 3);
if (value < 0) goto out;
sz.side1 += value & 0xf;
- value = spd_read_byte(device, 4);
+ value = spd_read_byte(device, 4);
if (value < 0) goto out;
sz.side1 += value & 0xf;
- value = spd_read_byte(device, 17);
+ value = spd_read_byte(device, 17);
if (value < 0) goto out;
sz.side1 += log2(value & 0xff);
-
- value = spd_read_byte(device, 7);
+
+ value = spd_read_byte(device, 7);
if (value < 0) goto out;
value &= 0xff;
value <<= 8;
-
- low = spd_read_byte(device, 6);
+
+ low = spd_read_byte(device, 6);
if (low < 0) goto out;
value = value | (low & 0xff);
sz.side1 += log2(value);
-
- value = spd_read_byte(device, 5);
+
+ value = spd_read_byte(device, 5);
if (value <= 1) goto out;
-
+
sz.side2 = sz.side1;
- value = spd_read_byte(device, 3);
+ value = spd_read_byte(device, 3);
if (value < 0) goto out;
- if ((value & 0xf0) == 0) goto out;
- sz.side2 -= (value & 0x0f);
- sz.side2 += ((value >> 4) & 0x0f);
- value = spd_read_byte(device, 4);
+ if ((value & 0xf0) == 0) goto out;
+ sz.side2 -= (value & 0x0f);
+ sz.side2 += ((value >> 4) & 0x0f);
+ value = spd_read_byte(device, 4);
if (value < 0) goto out;
- sz.side2 -= (value & 0x0f);
- sz.side2 += ((value >> 4) & 0x0f);
+ sz.side2 -= (value & 0x0f);
+ sz.side2 += ((value >> 4) & 0x0f);
out:
return sz;
}
@@ -1176,32 +1176,32 @@
}
map = pci_read_config32(ctrl->f2, 0x80 );
map &= ~(0xf << (index + 4));
-
-
+
+
base0 = base1 = 0;
-
+
if (sz.side1 >= (25 +3)) {
map |= (sz.side1 - (25 + 3)) << (index *4);
base0 = (1 << ((sz.side1 - (25 + 3)) + 21)) | 1;
}
-
+
if (sz.side2 >= (25 + 3)) {
base1 = (1 << ((sz.side2 - (25 + 3)) + 21)) | 1;
}
-
+
if (is_dual_channel(ctrl)) {
base0 = (base0 << 1) | (base0 & 1);
base1 = (base1 << 1) | (base1 & 1);
}
-
+
base0 &= ~0x001ffffe;
base1 &= ~0x001ffffe;
-
+
pci_write_config32(ctrl->f2, 0x40 + (((index << 1)+0)<<2), base0);
pci_write_config32(ctrl->f2, 0x40 + (((index << 1)+1)<<2), base1);
pci_write_config32(ctrl->f2, 0x80 , map);
-
-
+
+
if (base0) {
dch = pci_read_config32(ctrl->f2, 0x94 );
dch |= (1 << 26) << index;
@@ -1211,7 +1211,7 @@
static void spd_set_ram_size(const struct mem_controller *ctrl)
{
int i;
-
+
for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
struct dimm_size sz;
sz = spd_get_dimm_size(ctrl->channel0[i]);
@@ -1221,7 +1221,7 @@
static void route_dram_accesses(const struct mem_controller *ctrl,
unsigned long base_k, unsigned long limit_k)
{
-
+
unsigned node_id;
unsigned limit;
unsigned base;
@@ -1246,25 +1246,25 @@
}
static void set_top_mem(unsigned tom_k)
{
-
+
if (!tom_k) {
set_bios_reset();
print_debug("No memory - reset");
-
+
pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 0x04 ) & 0x1f) << 11) | ((( 3 ) & 0x7) << 8)) , 0x41, 0xf1);
-
+
outb(0x0e, 0x0cf9);
}
-
+
print_debug("RAM: 0x");
print_debug_hex32(tom_k);
print_debug(" KB\r\n");
-
+
msr_t msr;
msr.lo = (tom_k & 0x003fffff) << 10;
msr.hi = (tom_k & 0xffc00000) >> 22;
wrmsr(0xC001001D , msr);
-
+
if (tom_k >= 0x003f0000) {
tom_k = 0x3f0000;
}
@@ -1274,15 +1274,15 @@
}
static unsigned long interleave_chip_selects(const struct mem_controller *ctrl)
{
-
- static const uint32_t csbase_low[] = {
+
+ static const uint32_t csbase_low[] = {
(1 << (13 - 4)),
(1 << (14 - 4)),
- (1 << (14 - 4)),
+ (1 << (14 - 4)),
(1 << (15 - 4)),
(1 << (15 - 4)),
(1 << (16 - 4)),
- (1 << (16 - 4)),
+ (1 << (16 - 4)),
};
uint32_t csbase_inc;
int chip_selects, index;
@@ -1290,16 +1290,16 @@
int dual_channel;
unsigned common_size;
uint32_t csbase, csmask;
-
+
chip_selects = 0;
common_size = 0;
for(index = 0; index < 8; index++) {
unsigned size;
uint32_t value;
-
+
value = pci_read_config32(ctrl->f2, 0x40 + (index << 2));
-
-
+
+
if (!(value & 1)) {
continue;
}
@@ -1308,36 +1308,36 @@
if (common_size == 0) {
common_size = size;
}
-
+
if (common_size != size) {
return 0;
}
}
-
+
bits = log2(chip_selects);
if (((1 << bits) != chip_selects) || (bits < 1) || (bits > 3)) {
return 0;
-
+
}
-
+
if ((bits == 3) && (common_size == (1 << (32 - 3)))) {
print_debug("8 4GB chip selects cannot be interleaved\r\n");
return 0;
}
-
+
if (is_dual_channel(ctrl)) {
csbase_inc = csbase_low[log2(common_size) - 1] << 1;
} else {
csbase_inc = csbase_low[log2(common_size)];
}
-
+
csbase = 0 | 1;
csmask = (((common_size << bits) - 1) << 21);
csmask |= 0xfe00 & ~((csbase_inc << bits) - csbase_inc);
for(index = 0; index < 8; index++) {
uint32_t value;
value = pci_read_config32(ctrl->f2, 0x40 + (index << 2));
-
+
if (!(value & 1)) {
continue;
}
@@ -1345,19 +1345,19 @@
pci_write_config32(ctrl->f2, 0x60 + (index << 2), csmask);
csbase += csbase_inc;
}
-
+
print_debug("Interleaved\r\n");
-
+
return common_size << (15 + bits);
}
static unsigned long order_chip_selects(const struct mem_controller *ctrl)
{
unsigned long tom;
-
-
+
+
tom = 0;
for(;;) {
-
+
unsigned index, canidate;
uint32_t csbase, csmask;
unsigned size;
@@ -1366,46 +1366,46 @@
for(index = 0; index < 8; index++) {
uint32_t value;
value = pci_read_config32(ctrl->f2, 0x40 + (index << 2));
-
+
if (!(value & 1)) {
continue;
}
-
-
+
+
if (value <= csbase) {
continue;
}
-
-
+
+
if (tom & (1 << (index + 24))) {
continue;
}
-
+
csbase = value;
canidate = index;
}
-
+
if (csbase == 0) {
break;
}
-
+
size = csbase >> 21;
-
+
tom |= (1 << (canidate + 24));
-
+
csbase = (tom << 21) | 1;
-
+
tom += size;
-
+
csmask = ((size -1) << 21);
- csmask |= 0xfe00;
-
+ csmask |= 0xfe00;
+
pci_write_config32(ctrl->f2, 0x40 + (canidate << 2), csbase);
-
+
pci_write_config32(ctrl->f2, 0x60 + (canidate << 2), csmask);
-
+
}
-
+
return (tom & ~0xff000000) << 15;
}
static void order_dimms(const struct mem_controller *ctrl)
@@ -1416,14 +1416,14 @@
if (!tom_k) {
tom_k = order_chip_selects(ctrl);
}
-
+
base_k = 0;
for(node_id = 0; node_id < ctrl->node_id; node_id++) {
uint32_t limit, base;
unsigned index;
index = node_id << 3;
base = pci_read_config32(ctrl->f1, 0x40 + index);
-
+
if ((base & 3) == 3) {
limit = pci_read_config32(ctrl->f1, 0x44 + index);
base_k = ((limit + 0x00010000) & 0xffff0000) >> 2;
@@ -1435,8 +1435,8 @@
}
static void disable_dimm(const struct mem_controller *ctrl, unsigned index)
{
- print_debug("disabling dimm");
- print_debug_hex8(index);
+ print_debug("disabling dimm");
+ print_debug_hex8(index);
print_debug("\r\n");
pci_write_config32(ctrl->f2, 0x40 + (((index << 1)+0)<<2), 0);
pci_write_config32(ctrl->f2, 0x40 + (((index << 1)+1)<<2), 0);
@@ -1456,11 +1456,11 @@
disable_dimm(ctrl, i);
continue;
}
-
+
if (value & (1 << 1)) {
registered = 1;
- }
-
+ }
+
else {
unbuffered = 1;
}
@@ -1482,29 +1482,29 @@
{
int i;
uint32_t nbcap;
-
-
+
+
static const unsigned addresses[] = {
- 2,
- 3,
- 4,
- 5,
- 6,
- 7,
- 9,
- 11,
- 13,
- 17,
- 18,
- 21,
- 23,
- 26,
- 27,
- 28,
- 29,
- 30,
- 41,
- 42,
+ 2,
+ 3,
+ 4,
+ 5,
+ 6,
+ 7,
+ 9,
+ 11,
+ 13,
+ 17,
+ 18,
+ 21,
+ 23,
+ 26,
+ 27,
+ 28,
+ 29,
+ 30,
+ 41,
+ 42,
};
nbcap = pci_read_config32(ctrl->f3, 0xE8 );
if (!(nbcap & 0x0001 )) {
@@ -1543,7 +1543,7 @@
}
struct mem_param {
uint8_t cycle_time;
- uint8_t divisor;
+ uint8_t divisor;
uint8_t tRC;
uint8_t tRFC;
uint32_t dch_memclk;
@@ -1616,35 +1616,35 @@
}
static const struct mem_param *spd_set_memclk(const struct mem_controller *ctrl)
{
-
+
const struct mem_param *param;
unsigned min_cycle_time, min_latency;
int i;
uint32_t value;
static const int latency_indicies[] = { 26, 23, 9 };
static const unsigned char min_cycle_times[] = {
- [0 ] = 0x50,
- [1 ] = 0x60,
- [2 ] = 0x75,
- [3 ] = 0xa0,
+ [0 ] = 0x50,
+ [1 ] = 0x60,
+ [2 ] = 0x75,
+ [3 ] = 0xa0,
};
value = pci_read_config32(ctrl->f3, 0xE8 );
min_cycle_time = min_cycle_times[(value >> 5 ) & 3 ];
min_latency = 2;
-
+
for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
int new_cycle_time, new_latency;
int index;
int latencies;
int latency;
-
+
new_cycle_time = 0xa0;
new_latency = 5;
latencies = spd_read_byte(ctrl->channel0[i], 18);
if (latencies <= 0) continue;
-
+
latency = log2(latencies) -2;
-
+
for(index = 0; index < 3; index++, latency++) {
int value;
if ((latency < 2) || (latency > 4) ||
@@ -1655,7 +1655,7 @@
if (value < 0) {
continue;
}
-
+
if ((value >= min_cycle_time) && (value < new_cycle_time)) {
new_cycle_time = value;
new_latency = latency;
@@ -1664,17 +1664,17 @@
if (new_latency > 4){
continue;
}
-
+
if (new_cycle_time > min_cycle_time) {
min_cycle_time = new_cycle_time;
}
-
+
if (new_latency > min_latency) {
min_latency = new_latency;
}
}
-
-
+
+
for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
int latencies;
int latency;
@@ -1685,9 +1685,9 @@
if (latencies <= 0) {
goto dimm_err;
}
-
+
latency = log2(latencies) -2;
-
+
for(index = 0; index < 3; index++, latency++) {
if (!(latencies & (1 << latency))) {
continue;
@@ -1695,36 +1695,36 @@
if (latency == min_latency)
break;
}
-
+
if ((latency != min_latency) || (index >= 3)) {
goto dimm_err;
}
-
-
+
+
value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]);
-
-
+
+
if (value <= min_cycle_time) {
continue;
}
-
+
dimm_err:
disable_dimm(ctrl, i);
}
-
+
param = get_mem_param(min_cycle_time);
-
+
value = pci_read_config32(ctrl->f2, 0x94 );
value &= ~(0x7 << 20 );
value |= param->dch_memclk;
pci_write_config32(ctrl->f2, 0x94 , value);
static const unsigned latencies[] = { 1 , 5 , 2 };
-
+
value = pci_read_config32(ctrl->f2, 0x88 );
value &= ~(0x7 << 0 );
value |= latencies[min_latency - 2] << 0 ;
pci_write_config32(ctrl->f2, 0x88 , value);
-
+
return param;
}
static int update_dimm_Trc(const struct mem_controller *ctrl, const struct mem_param *param, int i)
@@ -1969,7 +1969,7 @@
{
uint32_t dth;
unsigned clocks;
- clocks = 1;
+ clocks = 1;
dth = pci_read_config32(ctrl->f2, 0x8c );
dth &= ~(0x1 << 0 );
dth |= ((clocks - 1 ) << 0 );
@@ -1988,11 +1988,11 @@
if (is_opteron(ctrl)) {
if (latency == 1 ) {
if (divisor == ((6 << 0) + 0)) {
-
+
clocks = 3;
}
else if (divisor > ((6 << 0)+0)) {
-
+
clocks = 2;
}
}
@@ -2001,11 +2001,11 @@
}
else if (latency == 2 ) {
if (divisor == ((6 << 0)+0)) {
-
+
clocks = 4;
}
else if (divisor > ((6 << 0)+0)) {
-
+
clocks = 3;
}
}
@@ -2037,7 +2037,7 @@
if ((clocks < 1 ) || (clocks > 6 )) {
die("Unknown Trwt");
}
-
+
dth = pci_read_config32(ctrl->f2, 0x8c );
dth &= ~(0x7 << 4 );
dth |= ((clocks - 1 ) << 4 );
@@ -2046,7 +2046,7 @@
}
static void set_Twcl(const struct mem_controller *ctrl, const struct mem_param *param)
{
-
+
uint32_t dth;
unsigned clocks;
if (is_registered(ctrl)) {
@@ -2070,19 +2070,19 @@
rdpreamble = 0;
if (is_registered(ctrl)) {
if (divisor == ((10 << 1)+0)) {
-
+
rdpreamble = ((9 << 1)+ 0);
}
else if (divisor == ((7 << 1)+1)) {
-
+
rdpreamble = ((8 << 1)+0);
}
else if (divisor == ((6 << 1)+0)) {
-
+
rdpreamble = ((7 << 1)+1);
}
else if (divisor == ((5 << 1)+0)) {
-
+
rdpreamble = ((7 << 1)+0);
}
}
@@ -2096,42 +2096,42 @@
}
}
if (divisor == ((10 << 1)+0)) {
-
+
if (slots <= 2) {
-
+
rdpreamble = ((9 << 1)+0);
} else {
-
+
rdpreamble = ((14 << 1)+0);
}
}
else if (divisor == ((7 << 1)+1)) {
-
+
if (slots <= 2) {
-
+
rdpreamble = ((7 << 1)+0);
} else {
-
+
rdpreamble = ((11 << 1)+0);
}
}
else if (divisor == ((6 << 1)+0)) {
-
+
if (slots <= 2) {
-
+
rdpreamble = ((7 << 1)+0);
} else {
-
+
rdpreamble = ((9 << 1)+0);
}
}
else if (divisor == ((5 << 1)+0)) {
-
+
if (slots <= 2) {
-
+
rdpreamble = ((5 << 1)+0);
} else {
-
+
rdpreamble = ((7 << 1)+0);
}
}
@@ -2154,11 +2154,11 @@
async_lat = 0;
if (is_registered(ctrl)) {
if (dimms == 4) {
-
+
async_lat = 9;
- }
+ }
else {
-
+
async_lat = 8;
}
}
@@ -2167,11 +2167,11 @@
die("Too many unbuffered dimms");
}
else if (dimms == 3) {
-
+
async_lat = 7;
}
else {
-
+
async_lat = 6;
}
}
@@ -2181,7 +2181,7 @@
static void set_idle_cycle_limit(const struct mem_controller *ctrl, const struct mem_param *param)
{
uint32_t dch;
-
+
dch = pci_read_config32(ctrl->f2, 0x94 );
dch &= ~(0x7 << 16 );
dch |= 3 << 16 ;
@@ -2193,39 +2193,39 @@
int dimms;
int i;
int rc;
-
+
init_Tref(ctrl, param);
for(i = 0; (i < 4) && ctrl->channel0[i]; i++) {
int rc;
-
+
if (update_dimm_Trc (ctrl, param, i) < 0) goto dimm_err;
if (update_dimm_Trfc(ctrl, param, i) < 0) goto dimm_err;
if (update_dimm_Trcd(ctrl, param, i) < 0) goto dimm_err;
if (update_dimm_Trrd(ctrl, param, i) < 0) goto dimm_err;
if (update_dimm_Tras(ctrl, param, i) < 0) goto dimm_err;
if (update_dimm_Trp (ctrl, param, i) < 0) goto dimm_err;
-
+
if (update_dimm_Tref(ctrl, param, i) < 0) goto dimm_err;
-
+
if (update_dimm_x4 (ctrl, param, i) < 0) goto dimm_err;
if (update_dimm_ecc(ctrl, param, i) < 0) goto dimm_err;
continue;
dimm_err:
disable_dimm(ctrl, i);
-
+
}
-
+
set_Twr(ctrl, param);
-
+
set_Twtr(ctrl, param);
set_Trwt(ctrl, param);
set_Twcl(ctrl, param);
-
+
set_read_preamble(ctrl, param);
set_max_async_latency(ctrl, param);
set_idle_cycle_limit(ctrl, param);
}
-static void sdram_set_spd_registers(const struct mem_controller *ctrl)
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)
{
const struct mem_param *param;
spd_enable_2channels(ctrl);
@@ -2238,18 +2238,18 @@
static void sdram_enable(int controllers, const struct mem_controller *ctrl)
{
int i;
-
+
for(i = 0; i < controllers; i++) {
uint32_t dch;
dch = pci_read_config32(ctrl[i].f2, 0x94 );
dch |= (1 << 25) ;
pci_write_config32(ctrl[i].f2, 0x94 , dch);
}
-
+
memreset(controllers, ctrl);
for(i = 0; i < controllers; i++) {
uint32_t dcl;
-
+
dcl = pci_read_config32(ctrl[i].f2, 0x90 );
if (dcl & (1<<17) ) {
uint32_t mnc;
@@ -2289,7 +2289,7 @@
if (dcl & (1<<17) ) {
print_debug("Clearing memory: ");
if (!is_cpu_pre_c0()) {
-
+
dcl &= ~((1<<11) | (1<<10) );
pci_write_config32(ctrl[i].f2, 0x90 , dcl);
do {
@@ -2299,10 +2299,10 @@
uint32_t base, last_scrub_k, scrub_k;
uint32_t cnt,zstart,zend;
msr_t msr,msr_201;
-
+
pci_write_config32(ctrl[i].f3, 0x58 ,
(0 << 16) | (0 << 8) | (0 << 0));
-
+
msr_201 = rdmsr(0x201);
zstart = pci_read_config32(ctrl[0].f1, 0x40 + (i*8));
zend = pci_read_config32(ctrl[0].f1, 0x44 + (i*8));
@@ -2313,50 +2313,50 @@
print_debug("-");
print_debug_hex32(zend);
print_debug("\r\n");
-
-
+
+
msr = rdmsr(0x2ff );
msr.lo &= ~(1<<10);
wrmsr(0x2ff , msr);
-
+
msr = rdmsr(0xc0010015);
msr.lo |= (1<<17);
wrmsr(0xc0010015,msr);
for(;zstart<zend;zstart+=4) {
-
+
if(zstart == 0x0fc)
continue;
-
-
+
+
__asm__ volatile(
"movl %%cr0, %0\n\t"
"orl $0x40000000, %0\n\t"
"movl %0, %%cr0\n\t"
:"=r" (cnt)
);
-
-
+
+
msr.lo = 1 + ((zstart&0x0ff)<<24);
msr.hi = (zstart&0x0ff00)>>8;
wrmsr(0x200,msr);
-
+
msr.hi = 0x000000ff;
msr.lo = 0xfc000800;
wrmsr(0x201,msr);
-
+
__asm__ volatile(
"movl %%cr0, %0\n\t"
"andl $0x9fffffff, %0\n\t"
- "movl %0, %%cr0\n\t"
- :"=r" (cnt)
+ "movl %0, %%cr0\n\t"
+ :"=r" (cnt)
);
-
+
msr.lo = (zstart&0xff) << 24;
msr.hi = (zstart&0xff00) >> 8;
wrmsr(0xc0000100,msr);
- print_debug_char((zstart > 0x0ff)?'+':'-');
-
-
+ print_debug_char((zstart > 0x0ff)?'+':'-');
+
+
__asm__ volatile(
"1: \n\t"
"movl %0, %%fs:(%1)\n\t"
@@ -2365,67 +2365,67 @@
"jnz 1b\n\t"
:
: "a" (0), "D" (0), "c" (0x01000000)
- );
+ );
}
-
-
+
+
__asm__ volatile(
"movl %%cr0, %0\n\t"
"orl $0x40000000, %0\n\t"
"movl %0, %%cr0\n\t"
- :"=r" (cnt)
+ :"=r" (cnt)
);
-
-
+
+
msr = rdmsr(0x2ff );
msr.lo |= 0x0400;
wrmsr(0x2ff , msr);
-
+
msr.lo = 6;
msr.hi = 0;
wrmsr(0x200,msr);
wrmsr(0x201,msr_201);
-
+
msr.lo = 0;
msr.hi = 0;
wrmsr(0xc0000100,msr);
-
+
__asm__ volatile(
"movl %%cr0, %0\n\t"
"andl $0x9fffffff, %0\n\t"
- "movl %0, %%cr0\n\t"
- :"=r" (cnt)
+ "movl %0, %%cr0\n\t"
+ :"=r" (cnt)
);
-
-
+
+
msr = rdmsr(0xc0010015);
msr.lo &= ~(1<<17);
wrmsr(0xc0010015,msr);
-
+
base = pci_read_config32(ctrl[i].f1, 0x40 + (ctrl[i].node_id << 3));
base &= 0xffff0000;
-
+
pci_write_config32(ctrl[i].f3, 0x5C , base << 8);
pci_write_config32(ctrl[i].f3, 0x60 , base >> 24);
-
- pci_write_config32(ctrl[i].f3, 0x58 ,
+
+ pci_write_config32(ctrl[i].f3, 0x58 ,
(22 << 16) | (22 << 8) | (22 << 0));
print_debug("done\r\n");
}
}
}
-
-
-
-
-
+
+
+
+
+
typedef uint8_t u8;
typedef uint32_t u32;
typedef int8_t bool;
static void disable_probes(void)
{
-
-
+
+
u32 val;
print_debug("Disabling read/write/fill probes for UP... ");
val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 0 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x68);
@@ -2433,8 +2433,8 @@
pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 0 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x68, val);
print_debug("done.\r\n");
}
-
-static void wait_ap_stop(u8 node)
+
+static void wait_ap_stop(u8 node)
{
unsigned long reg;
unsigned long i;
@@ -2444,7 +2444,7 @@
if((regx & (1<<4))==1) break;
}
reg = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) ,0x6c);
- reg &= ~(1<<4);
+ reg &= ~(1<<4);
pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x6c, reg);
}
static void notify_bsp_ap_is_stopped(void)
@@ -2453,31 +2453,31 @@
unsigned long apic_id;
apic_id = *((volatile unsigned long *)(0xfee00000 + 0x020 ));
apic_id >>= 24;
-
+
if(apic_id != 0) {
-
+
reg = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ apic_id ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x6C);
reg |= 1<<4;
pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ apic_id ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x6C, reg);
}
-
+
}
-
+
static void enable_routing(u8 node)
{
u32 val;
-
-
+
+
print_debug("Enabling routing table for node ");
print_debug_hex32(node);
val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x6c);
val &= ~((1<<6)|(1<<5)|(1<<4)|(1<<1)|(1<<0));
pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x6c, val);
-
+
if(node!=0) {
wait_ap_stop(node);
}
-
+
print_debug(" done.\r\n");
}
static void rename_temp_node(u8 node)
@@ -2486,21 +2486,21 @@
print_debug("Renaming current temp node to ");
print_debug_hex32(node);
val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 7 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x60);
- val &= (~7);
- val |= node;
+ val &= (~7);
+ val |= node;
pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 7 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x60, val);
print_debug(" done.\r\n");
}
static bool check_connection(u8 src, u8 dest, u8 link)
{
-
+
u32 val;
-
-
+
+
val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ src ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x98+link);
if ( (val&0x17) != 0x03)
return 0;
-
+
val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ dest ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) ,0);
if(val != 0x11001022)
return 0;
@@ -2513,37 +2513,37 @@
uint16_t freq_cap1, freq_cap2, freq_cap, freq_mask;
uint8_t width_cap1, width_cap2, width_cap, width, ln_width1, ln_width2;
uint8_t freq;
-
-
+
+
freq_cap1 = pci_read_config16(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x80 + link1 + 0x0a );
freq_cap2 = pci_read_config16(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x80 + link2 + 0x0a );
-
-
+
+
freq = log2(freq_cap1 & freq_cap2 & 0xff);
-
+
pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x80 + link1 + 0x09 , freq);
pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x80 + link2 + 0x09 , freq);
-
+
width_cap1 = pci_read_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x80 + link1 + 6 );
width_cap2 = pci_read_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x80 + link2 + 6 );
-
+
ln_width1 = link_width_to_pow2[width_cap1 & 7];
ln_width2 = link_width_to_pow2[(width_cap2 >> 4) & 7];
if (ln_width1 > ln_width2) {
ln_width1 = ln_width2;
}
width = pow2_to_link_width[ln_width1];
-
+
ln_width1 = link_width_to_pow2[(width_cap1 >> 4) & 7];
ln_width2 = link_width_to_pow2[width_cap2 & 7];
if (ln_width1 > ln_width2) {
ln_width1 = ln_width2;
}
width |= pow2_to_link_width[ln_width1] << 4;
-
-
+
+
pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x80 + link1 + 6 + 1, width);
-
+
width = ((width & 0x70) >> 4) | ((width & 0x7) << 4);
pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x80 + link2 + 6 + 1, width);
}
@@ -2571,8 +2571,8 @@
}
static void setup_remote_node(u8 node, u8 cpus)
{
- static const uint8_t pci_reg[] = {
- 0x44, 0x4c, 0x54, 0x5c, 0x64, 0x6c, 0x74, 0x7c,
+ static const uint8_t pci_reg[] = {
+ 0x44, 0x4c, 0x54, 0x5c, 0x64, 0x6c, 0x74, 0x7c,
0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78,
0x84, 0x8c, 0x94, 0x9c, 0xa4, 0xac, 0xb4, 0xbc,
0x80, 0x88, 0x90, 0x98, 0xa0, 0xa8, 0xb0, 0xb8,
@@ -2585,7 +2585,7 @@
print_debug("setup_remote_node\r\n");
for(row=0; row<cpus; row++)
setup_remote_row(node, row, cpus);
-
+
for(i = 0; i < sizeof(pci_reg)/sizeof(pci_reg[0]); i++) {
uint32_t value;
uint8_t reg;
@@ -2606,24 +2606,24 @@
u8 cpus=2;
print_debug("Enabling SMP settings\r\n");
setup_row(0,0,cpus);
-
+
setup_temp_row(0,1,cpus);
-
+
if (!check_connection(0, 7, 0x20 )) {
print_debug("No connection to Node 1.\r\n");
- fill_row( 0 ,7,0x00010101 ) ;
- setup_uniprocessor();
+ fill_row( 0 ,7,0x00010101 ) ;
+ setup_uniprocessor();
return 1;
}
-
+
optimize_connection(0, 0x20 , 7, 0x20 );
- setup_node(0, cpus);
- setup_remote_node(1, cpus);
- rename_temp_node(1);
- enable_routing(1);
-
- fill_row( 0 ,7,0x00010101 ) ;
-
+ setup_node(0, cpus);
+ setup_remote_node(1, cpus);
+ rename_temp_node(1);
+ enable_routing(1);
+
+ fill_row( 0 ,7,0x00010101 ) ;
+
print_debug_hex32(cpus);
print_debug(" nodes initialized.\r\n");
return cpus;
@@ -2636,29 +2636,29 @@
print_debug_hex32(cpus);
print_debug("\r\n");
if (cpus>2)
- mask=0x06;
+ mask=0x06;
else
- mask=0x02;
+ mask=0x02;
for (node=0; node<cpus; node++) {
if ((pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node ) & 0x1f) << 11) | ((( 3 ) & 0x7) << 8)) , 0xe8) & mask)!=mask)
mp_cap= (0) ;
}
if (mp_cap)
return cpus;
-
+
print_debug("One of the CPUs is not MP capable. Going back to UP\r\n");
for (node=cpus; node>0; node--)
for (row=cpus; row>0; row--)
fill_row(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node-1 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , row-1, 0x00010101 );
-
+
return setup_uniprocessor();
}
static void coherent_ht_finalize(unsigned cpus)
{
int node;
bool rev_a0;
-
-
+
+
print_debug("coherent_ht_finalize\r\n");
rev_a0= is_cpu_rev_a0();
for (node=0; node<cpus; node++) {
@@ -2686,36 +2686,36 @@
cpus=setup_smp();
cpus=detect_mp_capabilities(cpus);
coherent_ht_finalize(cpus);
-
+
coherent_ht_mainboard(cpus);
return reset_needed;
}
void sdram_no_memory(void)
{
print_err("No memory!!\r\n");
- while(1) {
- hlt();
+ while(1) {
+ hlt();
}
}
-
+
void sdram_initialize(int controllers, const struct mem_controller *ctrl)
{
int i;
-
+
for(i = 0; i < controllers; i++) {
print_debug("Ram1.");
print_debug_hex8(i);
print_debug("\r\n");
sdram_set_registers(ctrl + i);
}
-
+
for(i = 0; i < controllers; i++) {
print_debug("Ram2.");
print_debug_hex8(i);
print_debug("\r\n");
sdram_set_spd_registers(ctrl + i);
}
-
+
print_debug("Ram3\r\n");
sdram_enable(controllers, ctrl);
print_debug("Ram4\r\n");
@@ -2733,17 +2733,17 @@
{
unsigned apicid;
apicid = apic_read(0x020 ) >> 24;
-
+
apic_write(0x310 , (( apicid )<<24) );
apic_write(0x300 , 0x08000 | 0x04000 | 0x00500 );
-
+
apic_wait_icr_idle();
-
+
apic_write(0x310 , (( apicid )<<24) );
apic_write(0x300 , 0x08000 | 0x00500 );
-
+
apic_wait_icr_idle();
-
+
for(;;) {
hlt();
}
@@ -2756,7 +2756,7 @@
}
static void main(void)
{
-
+
static const struct mem_controller cpu[] = {
{
.node_id = 0,
@@ -2792,9 +2792,9 @@
setup_coherent_ht_domain();
enumerate_ht_chain(0);
distinguish_cpu_resets(0);
-
+
enable_smbus();
memreset_setup();
sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
-
+
}
diff --git a/util/romcc/tests/raminit_test7.c b/util/romcc/tests/raminit_test7.c
index be62d30..184e912 100644
--- a/util/romcc/tests/raminit_test7.c
+++ b/util/romcc/tests/raminit_test7.c
@@ -1,30 +1,30 @@
typedef unsigned char uint8_t;
-typedef signed char int8_t;
+typedef signed char int8_t;
typedef unsigned short uint16_t;
typedef signed short int16_t;
typedef unsigned int uint32_t;
typedef signed int int32_t;
-
+
typedef unsigned char uint_least8_t;
-typedef signed char int_least8_t;
+typedef signed char int_least8_t;
typedef unsigned short uint_least16_t;
typedef signed short int_least16_t;
typedef unsigned int uint_least32_t;
typedef signed int int_least32_t;
-
+
typedef unsigned char uint_fast8_t;
-typedef signed char int_fast8_t;
+typedef signed char int_fast8_t;
typedef unsigned int uint_fast16_t;
typedef signed int int_fast16_t;
typedef unsigned int uint_fast32_t;
typedef signed int int_fast32_t;
-
+
typedef int intptr_t;
typedef unsigned int uintptr_t;
-
+
typedef long int intmax_t;
typedef unsigned long int uintmax_t;
-
+
static inline unsigned long apic_read(unsigned long reg)
{
return *((volatile unsigned long *)(0xfee00000 +reg));
@@ -37,7 +37,7 @@
{
do { } while ( apic_read( 0x300 ) & 0x01000 );
}
-
+
static void outb(unsigned char value, unsigned short port)
{
__builtin_outb(value, port);
@@ -65,7 +65,7 @@
static inline void outsb(uint16_t port, const void *addr, unsigned long count)
{
__asm__ __volatile__ (
- "cld ; rep ; outsb "
+ "cld ; rep ; outsb "
: "=S" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@@ -73,7 +73,7 @@
static inline void outsw(uint16_t port, const void *addr, unsigned long count)
{
__asm__ __volatile__ (
- "cld ; rep ; outsw "
+ "cld ; rep ; outsw "
: "=S" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@@ -81,7 +81,7 @@
static inline void outsl(uint16_t port, const void *addr, unsigned long count)
{
__asm__ __volatile__ (
- "cld ; rep ; outsl "
+ "cld ; rep ; outsl "
: "=S" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@@ -89,7 +89,7 @@
static inline void insb(uint16_t port, void *addr, unsigned long count)
{
__asm__ __volatile__ (
- "cld ; rep ; insb "
+ "cld ; rep ; insb "
: "=D" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@@ -97,7 +97,7 @@
static inline void insw(uint16_t port, void *addr, unsigned long count)
{
__asm__ __volatile__ (
- "cld ; rep ; insw "
+ "cld ; rep ; insw "
: "=D" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@@ -105,7 +105,7 @@
static inline void insl(uint16_t port, void *addr, unsigned long count)
{
__asm__ __volatile__ (
- "cld ; rep ; insl "
+ "cld ; rep ; insl "
: "=D" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@@ -180,7 +180,7 @@
}
int log2(int value)
{
-
+
return __builtin_bsr(value);
}
typedef unsigned device_t;
@@ -237,11 +237,11 @@
}
return (0xffffffffU) ;
}
-
-
-
-
-
+
+
+
+
+
static int uart_can_tx_byte(void)
{
return inb(1016 + 0x05 ) & 0x20;
@@ -253,29 +253,29 @@
}
static void uart_wait_until_sent(void)
{
- while(!(inb(1016 + 0x05 ) & 0x40))
+ while(!(inb(1016 + 0x05 ) & 0x40))
;
}
static void uart_tx_byte(unsigned char data)
{
uart_wait_to_tx_byte();
outb(data, 1016 + 0x00 );
-
+
uart_wait_until_sent();
}
static void uart_init(void)
{
-
+
outb(0x0, 1016 + 0x01 );
-
+
outb(0x01, 1016 + 0x02 );
-
+
outb(0x80 | 3 , 1016 + 0x03 );
outb((115200/ 115200 ) & 0xFF, 1016 + 0x00 );
outb(((115200/ 115200 ) >> 8) & 0xFF, 1016 + 0x01 );
outb(3 , 1016 + 0x03 );
}
-
+
static void __console_tx_byte(unsigned char byte)
{
uart_tx_byte(byte);
@@ -385,12 +385,12 @@
static void print_spew(const char *str) { __console_tx_string(8 , str); }
static void console_init(void)
{
- static const char console_test[] =
+ static const char console_test[] =
"\r\n\r\nLinuxBIOS-"
- "1.1.4"
- ".0Fallback"
+ "1.1.4"
+ ".0Fallback"
" "
- "Thu Oct 9 20:29:48 MDT 2003"
+ "Thu Oct 9 20:29:48 MDT 2003"
" starting...\r\n";
print_info(console_test);
}
@@ -405,9 +405,9 @@
{
asm volatile(
"movnti %1, (%0)"
- :
- : "r" (addr), "r" (value)
- :
+ :
+ : "r" (addr), "r" (value)
+ :
);
}
static unsigned long read_phys(unsigned long addr)
@@ -419,28 +419,28 @@
static void ram_fill(unsigned long start, unsigned long stop)
{
unsigned long addr;
-
+
print_debug("DRAM fill: ");
print_debug_hex32(start);
print_debug("-");
print_debug_hex32(stop);
print_debug("\r\n");
for(addr = start; addr < stop ; addr += 4) {
-
+
if (!(addr & 0xffff)) {
print_debug_hex32(addr);
print_debug("\r");
}
write_phys(addr, addr);
};
-
+
print_debug_hex32(addr);
print_debug("\r\nDRAM filled\r\n");
}
static void ram_verify(unsigned long start, unsigned long stop)
{
unsigned long addr;
-
+
print_debug("DRAM verify: ");
print_debug_hex32(start);
print_debug_char('-');
@@ -448,31 +448,31 @@
print_debug("\r\n");
for(addr = start; addr < stop ; addr += 4) {
unsigned long value;
-
+
if (!(addr & 0xffff)) {
print_debug_hex32(addr);
print_debug("\r");
}
value = read_phys(addr);
if (value != addr) {
-
+
print_err_hex32(addr);
print_err_char(':');
print_err_hex32(value);
print_err("\r\n");
}
}
-
+
print_debug_hex32(addr);
print_debug("\r\nDRAM verified\r\n");
}
void ram_check(unsigned long start, unsigned long stop)
{
int result;
-
+
print_debug("Testing DRAM : ");
print_debug_hex32(start);
- print_debug("-");
+ print_debug("-");
print_debug_hex32(stop);
print_debug("\r\n");
ram_fill(start, stop);
@@ -481,7 +481,7 @@
}
static int enumerate_ht_chain(unsigned link)
{
-
+
unsigned next_unitid, last_unitid;
int reset_needed = 0;
next_unitid = 1;
@@ -490,7 +490,7 @@
uint8_t hdr_type, pos;
last_unitid = next_unitid;
id = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x00 );
-
+
if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
(((id >> 16) & 0xffff) == 0xffff) ||
(((id >> 16) & 0xffff) == 0x0000)) {
@@ -536,7 +536,7 @@
pci_write_config32(dev, 0x58, 0x0f00 | 1);
enable = pci_read_config8(dev, 0x41);
pci_write_config8(dev, 0x41, enable | (1 << 7));
-
+
outw(inw(0x0f00 + 0xe0 ), 0x0f00 + 0xe0 );
}
static inline void smbus_delay(void)
@@ -555,7 +555,7 @@
break;
}
if(loops == ((100*1000*10) / 2)) {
- outw(inw(0x0f00 + 0xe0 ),
+ outw(inw(0x0f00 + 0xe0 ),
0x0f00 + 0xe0 );
}
} while(--loops);
@@ -568,7 +568,7 @@
do {
unsigned short val;
smbus_delay();
-
+
val = inw(0x0f00 + 0xe0 );
if (((val & 0x8) == 0) | ((val & 0x437) != 0)) {
break;
@@ -584,29 +584,29 @@
if (smbus_wait_until_ready() < 0) {
return -2;
}
-
-
-
+
+
+
outw(inw(0x0f00 + 0xe2 ) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), 0x0f00 + 0xe2 );
-
+
outw(((device & 0x7f) << 1) | 1, 0x0f00 + 0xe4 );
-
+
outb(address & 0xFF, 0x0f00 + 0xe8 );
-
+
outw((inw(0x0f00 + 0xe2 ) & ~7) | (0x2), 0x0f00 + 0xe2 );
-
-
+
+
outw(inw(0x0f00 + 0xe0 ), 0x0f00 + 0xe0 );
-
+
outw(0, 0x0f00 + 0xe6 );
-
+
outw((inw(0x0f00 + 0xe2 ) | (1 << 3)), 0x0f00 + 0xe2 );
-
+
if (smbus_wait_until_done() < 0) {
return -3;
}
global_status_register = inw(0x0f00 + 0xe0 );
-
+
byte = inw(0x0f00 + 0xe6 ) & 0xff;
if (global_status_register != (1 << 4)) {
return -1;
@@ -641,31 +641,31 @@
{
tsc_t res;
asm ("rdtsc"
- : "=a" (res.lo), "=d"(res.hi)
- :
- :
+ : "=a" (res.lo), "=d"(res.hi)
+ :
+ :
);
return res;
}
void init_timer(void)
{
-
+
apic_write(0x320 , (1 << 17)|(1<< 16)|(0 << 12)|(0 << 0));
-
+
apic_write(0x3E0 , 0xB );
-
+
apic_write(0x380 , 0xffffffff);
}
void udelay(unsigned usecs)
{
uint32_t start, value, ticks;
-
+
ticks = usecs * 200;
start = apic_read(0x390 );
do {
value = apic_read(0x390 );
} while((start - value) < ticks);
-
+
}
void mdelay(unsigned msecs)
{
@@ -737,8 +737,8 @@
static void print_pci_devices(void)
{
device_t dev;
- for(dev = ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) ;
- dev <= ( ((( 0 ) & 0xFF) << 16) | ((( 0x1f ) & 0x1f) << 11) | ((( 0x7 ) & 0x7) << 8)) ;
+ for(dev = ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) ;
+ dev <= ( ((( 0 ) & 0xFF) << 16) | ((( 0x1f ) & 0x1f) << 11) | ((( 0x7 ) & 0x7) << 8)) ;
dev += ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 1 ) & 0x7) << 8)) ) {
uint32_t id;
id = pci_read_config32(dev, 0x00 );
@@ -756,7 +756,7 @@
int i;
print_debug_pci_dev(dev);
print_debug("\r\n");
-
+
for(i = 0; i <= 255; i++) {
unsigned char val;
if ((i & 0x0f) == 0) {
@@ -774,8 +774,8 @@
static void dump_pci_devices(void)
{
device_t dev;
- for(dev = ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) ;
- dev <= ( ((( 0 ) & 0xFF) << 16) | ((( 0x1f ) & 0x1f) << 11) | ((( 0x7 ) & 0x7) << 8)) ;
+ for(dev = ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) ;
+ dev <= ( ((( 0 ) & 0xFF) << 16) | ((( 0x1f ) & 0x1f) << 11) | ((( 0x7 ) & 0x7) << 8)) ;
dev += ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 1 ) & 0x7) << 8)) ) {
uint32_t id;
id = pci_read_config32(dev, 0x00 );
@@ -796,8 +796,8 @@
device = ctrl->channel0[i];
if (device) {
int j;
- print_debug("dimm: ");
- print_debug_hex8(i);
+ print_debug("dimm: ");
+ print_debug_hex8(i);
print_debug(".0: ");
print_debug_hex8(device);
for(j = 0; j < 256; j++) {
@@ -822,8 +822,8 @@
device = ctrl->channel1[i];
if (device) {
int j;
- print_debug("dimm: ");
- print_debug_hex8(i);
+ print_debug("dimm: ");
+ print_debug_hex8(i);
print_debug(".1: ");
print_debug_hex8(device);
for(j = 0; j < 256; j++) {
@@ -847,13 +847,13 @@
}
}
}
-
+
static unsigned int cpuid(unsigned int op)
{
unsigned int ret;
unsigned dummy2,dummy3,dummy4;
- asm volatile (
- "cpuid"
+ asm volatile (
+ "cpuid"
: "=a" (ret), "=b" (dummy2), "=c" (dummy3), "=d" (dummy4)
: "a" (op)
);
@@ -870,13 +870,13 @@
static void memreset_setup(void)
{
if (is_cpu_pre_c0()) {
-
+
outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), 0x0f00 + 0xc0 + 28);
-
+
outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), 0x0f00 + 0xc0 + 29);
}
else {
-
+
outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), 0x0f00 + 0xc0 + 29);
}
}
@@ -884,15 +884,15 @@
{
if (is_cpu_pre_c0()) {
udelay(800);
-
+
outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), 0x0f00 + 0xc0 + 28);
udelay(90);
}
}
static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes)
{
-
- uint32_t ret=0x00010101;
+
+ uint32_t ret=0x00010101;
static const unsigned int rows_2p[2][2] = {
{ 0x00050101, 0x00010404 },
{ 0x00010404, 0x00050101 }
@@ -910,33 +910,33 @@
{
return smbus_read_byte(device, address);
}
-
+
static void coherent_ht_mainboard(unsigned cpus)
{
}
-
+
void cpu_ldtstop(unsigned cpus)
{
uint32_t tmp;
device_t dev;
unsigned cnt;
for(cnt=0; cnt<cpus; cnt++) {
-
+
pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 ) & 0x7) << 8)) ,0x81,0x23);
-
+
pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 ) & 0x7) << 8)) ,0xd4,0x00000701);
-
+
pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 ) & 0x7) << 8)) ,0xd8,0x00000000);
-
+
tmp=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 2 ) & 0x7) << 8)) ,0x90);
pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 2 ) & 0x7) << 8)) ,0x90, tmp | (1<<24) );
}
}
-
-
-
-
-
+
+
+
+
+
static void setup_resource_map(const unsigned int *register_values, int max)
{
int i;
@@ -957,8 +957,8 @@
static void setup_default_resource_map(void)
{
static const unsigned int register_values[] = {
-
-
+
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x44 ) & 0xFF)) , 0x0000f8f8, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x4C ) & 0xFF)) , 0x0000f8f8, 0x00000001,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x54 ) & 0xFF)) , 0x0000f8f8, 0x00000002,
@@ -967,7 +967,7 @@
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x6C ) & 0xFF)) , 0x0000f8f8, 0x00000005,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x74 ) & 0xFF)) , 0x0000f8f8, 0x00000006,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x7C ) & 0xFF)) , 0x0000f8f8, 0x00000007,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x40 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x48 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x50 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
@@ -976,7 +976,7 @@
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x68 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x70 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x78 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x84 ) & 0xFF)) , 0x00000048, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x8C ) & 0xFF)) , 0x00000048, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x94 ) & 0xFF)) , 0x00000048, 0x00000000,
@@ -985,7 +985,7 @@
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xAC ) & 0xFF)) , 0x00000048, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xB4 ) & 0xFF)) , 0x00000048, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xBC ) & 0xFF)) , 0x00000048, 0x00ffff00,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x80 ) & 0xFF)) , 0x000000f0, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x88 ) & 0xFF)) , 0x000000f0, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x90 ) & 0xFF)) , 0x000000f0, 0x00000000,
@@ -994,17 +994,17 @@
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xA8 ) & 0xFF)) , 0x000000f0, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xB0 ) & 0xFF)) , 0x000000f0, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xB8 ) & 0xFF)) , 0x000000f0, 0x00fc0003,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xC4 ) & 0xFF)) , 0xFE000FC8, 0x01fff000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xCC ) & 0xFF)) , 0xFE000FC8, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xD4 ) & 0xFF)) , 0xFE000FC8, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xDC ) & 0xFF)) , 0xFE000FC8, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xC0 ) & 0xFF)) , 0xFE000FCC, 0x00000003,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xC8 ) & 0xFF)) , 0xFE000FCC, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xD0 ) & 0xFF)) , 0xFE000FCC, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xD8 ) & 0xFF)) , 0xFE000FCC, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xE0 ) & 0xFF)) , 0x0000FC88, 0xff000003,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xE4 ) & 0xFF)) , 0x0000FC88, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0xE8 ) & 0xFF)) , 0x0000FC88, 0x00000000,
@@ -1017,8 +1017,8 @@
static void sdram_set_registers(const struct mem_controller *ctrl)
{
static const unsigned int register_values[] = {
-
-
+
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x44 ) & 0xFF)) , 0x0000f8f8, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x4C ) & 0xFF)) , 0x0000f8f8, 0x00000001,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x54 ) & 0xFF)) , 0x0000f8f8, 0x00000002,
@@ -1027,7 +1027,7 @@
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x6C ) & 0xFF)) , 0x0000f8f8, 0x00000005,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x74 ) & 0xFF)) , 0x0000f8f8, 0x00000006,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x7C ) & 0xFF)) , 0x0000f8f8, 0x00000007,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x40 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x48 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x50 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
@@ -1036,7 +1036,7 @@
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x68 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x70 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 1 ) & 0x07) << 8) | (( 0x78 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x40 ) & 0xFF)) , 0x001f01fe, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x44 ) & 0xFF)) , 0x001f01fe, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x48 ) & 0xFF)) , 0x001f01fe, 0x00000000,
@@ -1045,7 +1045,7 @@
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x54 ) & 0xFF)) , 0x001f01fe, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x58 ) & 0xFF)) , 0x001f01fe, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x5C ) & 0xFF)) , 0x001f01fe, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x60 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x64 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x68 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
@@ -1054,33 +1054,33 @@
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x74 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x78 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x7C ) & 0xFF)) , 0xC01f01ff, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x80 ) & 0xFF)) , 0xffff8888, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x88 ) & 0xFF)) , 0xe8088008, 0x02522001 ,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x8c ) & 0xFF)) , 0xff8fe08e, (0 << 20)|(0 << 8)|(0 << 4)|(0 << 0),
-
- ( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x90 ) & 0xFF)) , 0xf0000000,
- (4 << 25)|(0 << 24)|
- (0 << 23)|(0 << 22)|(0 << 21)|(0 << 20)|
- (1 << 19)|(0 << 18)|(1 << 17)|(0 << 16)|
- (2 << 14)|(0 << 13)|(0 << 12)|
- (0 << 11)|(0 << 10)|(0 << 9)|(0 << 8)|
+
+ ( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x90 ) & 0xFF)) , 0xf0000000,
+ (4 << 25)|(0 << 24)|
+ (0 << 23)|(0 << 22)|(0 << 21)|(0 << 20)|
+ (1 << 19)|(0 << 18)|(1 << 17)|(0 << 16)|
+ (2 << 14)|(0 << 13)|(0 << 12)|
+ (0 << 11)|(0 << 10)|(0 << 9)|(0 << 8)|
(0 << 3) |(0 << 1) |(0 << 0),
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x94 ) & 0xFF)) , 0xc180f0f0,
(0 << 29)|(0 << 28)|(0 << 27)|(0 << 26)|(0 << 25)|
(0 << 20)|(0 << 19)|(3 << 16)|(0 << 8)|(0 << 0),
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 2 ) & 0x07) << 8) | (( 0x98 ) & 0xFF)) , 0xfc00ffff, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 3 ) & 0x07) << 8) | (( 0x58 ) & 0xFF)) , 0xffe0e0e0, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 3 ) & 0x07) << 8) | (( 0x5C ) & 0xFF)) , 0x0000003e, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 3 ) & 0x07) << 8) | (( 0x60 ) & 0xFF)) , 0xffffff00, 0x00000000,
-
+
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 3 ) & 0x07) << 8) | (( 0x94 ) & 0xFF)) , 0xffff8000, 0x00000f70,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 3 ) & 0x07) << 8) | (( 0x90 ) & 0xFF)) , 0xffffff80, 0x00000002,
( ((( 0 ) & 0xFF) << 16) | ((( 0x18 ) & 0x1f) << 11) | ((( 3 ) & 0x07) << 8) | (( 0x98 ) & 0xFF)) , 0x0000000f, 0x00068300,
@@ -1112,14 +1112,14 @@
}
static int is_opteron(const struct mem_controller *ctrl)
{
-
+
uint32_t nbcap;
nbcap = pci_read_config32(ctrl->f3, 0xE8 );
return !!(nbcap & 0x0001 );
}
static int is_registered(const struct mem_controller *ctrl)
{
-
+
uint32_t dcl;
dcl = pci_read_config32(ctrl->f2, 0x90 );
return !(dcl & (1<<18) );
@@ -1130,45 +1130,45 @@
};
static struct dimm_size spd_get_dimm_size(unsigned device)
{
-
+
struct dimm_size sz;
int value, low;
sz.side1 = 0;
sz.side2 = 0;
-
- value = spd_read_byte(device, 3);
+
+ value = spd_read_byte(device, 3);
if (value < 0) goto out;
sz.side1 += value & 0xf;
- value = spd_read_byte(device, 4);
+ value = spd_read_byte(device, 4);
if (value < 0) goto out;
sz.side1 += value & 0xf;
- value = spd_read_byte(device, 17);
+ value = spd_read_byte(device, 17);
if (value < 0) goto out;
sz.side1 += log2(value & 0xff);
-
- value = spd_read_byte(device, 7);
+
+ value = spd_read_byte(device, 7);
if (value < 0) goto out;
value &= 0xff;
value <<= 8;
-
- low = spd_read_byte(device, 6);
+
+ low = spd_read_byte(device, 6);
if (low < 0) goto out;
value = value | (low & 0xff);
sz.side1 += log2(value);
-
- value = spd_read_byte(device, 5);
+
+ value = spd_read_byte(device, 5);
if (value <= 1) goto out;
-
+
sz.side2 = sz.side1;
- value = spd_read_byte(device, 3);
+ value = spd_read_byte(device, 3);
if (value < 0) goto out;
- if ((value & 0xf0) == 0) goto out;
- sz.side2 -= (value & 0x0f);
- sz.side2 += ((value >> 4) & 0x0f);
- value = spd_read_byte(device, 4);
+ if ((value & 0xf0) == 0) goto out;
+ sz.side2 -= (value & 0x0f);
+ sz.side2 += ((value >> 4) & 0x0f);
+ value = spd_read_byte(device, 4);
if (value < 0) goto out;
- sz.side2 -= (value & 0x0f);
- sz.side2 += ((value >> 4) & 0x0f);
+ sz.side2 -= (value & 0x0f);
+ sz.side2 += ((value >> 4) & 0x0f);
out:
return sz;
}
@@ -1181,32 +1181,32 @@
}
map = pci_read_config32(ctrl->f2, 0x80 );
map &= ~(0xf << (index + 4));
-
-
+
+
base0 = base1 = 0;
-
+
if (sz.side1 >= (25 +3)) {
map |= (sz.side1 - (25 + 3)) << (index *4);
base0 = (1 << ((sz.side1 - (25 + 3)) + 21)) | 1;
}
-
+
if (sz.side2 >= (25 + 3)) {
base1 = (1 << ((sz.side2 - (25 + 3)) + 21)) | 1;
}
-
+
if (is_dual_channel(ctrl)) {
base0 = (base0 << 1) | (base0 & 1);
base1 = (base1 << 1) | (base1 & 1);
}
-
+
base0 &= ~0x001ffffe;
base1 &= ~0x001ffffe;
-
+
pci_write_config32(ctrl->f2, 0x40 + (((index << 1)+0)<<2), base0);
pci_write_config32(ctrl->f2, 0x40 + (((index << 1)+1)<<2), base1);
pci_write_config32(ctrl->f2, 0x80 , map);
-
-
+
+
if (base0) {
dch = pci_read_config32(ctrl->f2, 0x94 );
dch |= (1 << 26) << index;
@@ -1216,7 +1216,7 @@
static void spd_set_ram_size(const struct mem_controller *ctrl)
{
int i;
-
+
for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
struct dimm_size sz;
sz = spd_get_dimm_size(ctrl->channel0[i]);
@@ -1226,7 +1226,7 @@
static void route_dram_accesses(const struct mem_controller *ctrl,
unsigned long base_k, unsigned long limit_k)
{
-
+
unsigned node_id;
unsigned limit;
unsigned base;
@@ -1251,25 +1251,25 @@
}
static void set_top_mem(unsigned tom_k)
{
-
+
if (!tom_k) {
set_bios_reset();
print_debug("No memory - reset");
-
+
pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 0x04 ) & 0x1f) << 11) | ((( 3 ) & 0x7) << 8)) , 0x41, 0xf1);
-
+
outb(0x0e, 0x0cf9);
}
-
+
print_debug("RAM: 0x");
print_debug_hex32(tom_k);
print_debug(" KB\r\n");
-
+
msr_t msr;
msr.lo = (tom_k & 0x003fffff) << 10;
msr.hi = (tom_k & 0xffc00000) >> 22;
wrmsr(0xC001001D , msr);
-
+
if (tom_k >= 0x003f0000) {
tom_k = 0x3f0000;
}
@@ -1279,15 +1279,15 @@
}
static unsigned long interleave_chip_selects(const struct mem_controller *ctrl)
{
-
- static const uint32_t csbase_low[] = {
+
+ static const uint32_t csbase_low[] = {
(1 << (13 - 4)),
(1 << (14 - 4)),
- (1 << (14 - 4)),
+ (1 << (14 - 4)),
(1 << (15 - 4)),
(1 << (15 - 4)),
(1 << (16 - 4)),
- (1 << (16 - 4)),
+ (1 << (16 - 4)),
};
uint32_t csbase_inc;
int chip_selects, index;
@@ -1295,16 +1295,16 @@
int dual_channel;
unsigned common_size;
uint32_t csbase, csmask;
-
+
chip_selects = 0;
common_size = 0;
for(index = 0; index < 8; index++) {
unsigned size;
uint32_t value;
-
+
value = pci_read_config32(ctrl->f2, 0x40 + (index << 2));
-
-
+
+
if (!(value & 1)) {
continue;
}
@@ -1313,36 +1313,36 @@
if (common_size == 0) {
common_size = size;
}
-
+
if (common_size != size) {
return 0;
}
}
-
+
bits = log2(chip_selects);
if (((1 << bits) != chip_selects) || (bits < 1) || (bits > 3)) {
return 0;
-
+
}
-
+
if ((bits == 3) && (common_size == (1 << (32 - 3)))) {
print_debug("8 4GB chip selects cannot be interleaved\r\n");
return 0;
}
-
+
if (is_dual_channel(ctrl)) {
csbase_inc = csbase_low[log2(common_size) - 1] << 1;
} else {
csbase_inc = csbase_low[log2(common_size)];
}
-
+
csbase = 0 | 1;
csmask = (((common_size << bits) - 1) << 21);
csmask |= 0xfe00 & ~((csbase_inc << bits) - csbase_inc);
for(index = 0; index < 8; index++) {
uint32_t value;
value = pci_read_config32(ctrl->f2, 0x40 + (index << 2));
-
+
if (!(value & 1)) {
continue;
}
@@ -1350,19 +1350,19 @@
pci_write_config32(ctrl->f2, 0x60 + (index << 2), csmask);
csbase += csbase_inc;
}
-
+
print_debug("Interleaved\r\n");
-
+
return common_size << (15 + bits);
}
static unsigned long order_chip_selects(const struct mem_controller *ctrl)
{
unsigned long tom;
-
-
+
+
tom = 0;
for(;;) {
-
+
unsigned index, canidate;
uint32_t csbase, csmask;
unsigned size;
@@ -1371,46 +1371,46 @@
for(index = 0; index < 8; index++) {
uint32_t value;
value = pci_read_config32(ctrl->f2, 0x40 + (index << 2));
-
+
if (!(value & 1)) {
continue;
}
-
-
+
+
if (value <= csbase) {
continue;
}
-
-
+
+
if (tom & (1 << (index + 24))) {
continue;
}
-
+
csbase = value;
canidate = index;
}
-
+
if (csbase == 0) {
break;
}
-
+
size = csbase >> 21;
-
+
tom |= (1 << (canidate + 24));
-
+
csbase = (tom << 21) | 1;
-
+
tom += size;
-
+
csmask = ((size -1) << 21);
- csmask |= 0xfe00;
-
+ csmask |= 0xfe00;
+
pci_write_config32(ctrl->f2, 0x40 + (canidate << 2), csbase);
-
+
pci_write_config32(ctrl->f2, 0x60 + (canidate << 2), csmask);
-
+
}
-
+
return (tom & ~0xff000000) << 15;
}
static void order_dimms(const struct mem_controller *ctrl)
@@ -1421,14 +1421,14 @@
if (!tom_k) {
tom_k = order_chip_selects(ctrl);
}
-
+
base_k = 0;
for(node_id = 0; node_id < ctrl->node_id; node_id++) {
uint32_t limit, base;
unsigned index;
index = node_id << 3;
base = pci_read_config32(ctrl->f1, 0x40 + index);
-
+
if ((base & 3) == 3) {
limit = pci_read_config32(ctrl->f1, 0x44 + index);
base_k = ((limit + 0x00010000) & 0xffff0000) >> 2;
@@ -1440,8 +1440,8 @@
}
static void disable_dimm(const struct mem_controller *ctrl, unsigned index)
{
- print_debug("disabling dimm");
- print_debug_hex8(index);
+ print_debug("disabling dimm");
+ print_debug_hex8(index);
print_debug("\r\n");
pci_write_config32(ctrl->f2, 0x40 + (((index << 1)+0)<<2), 0);
pci_write_config32(ctrl->f2, 0x40 + (((index << 1)+1)<<2), 0);
@@ -1461,11 +1461,11 @@
disable_dimm(ctrl, i);
continue;
}
-
+
if (value & (1 << 1)) {
registered = 1;
- }
-
+ }
+
else {
unbuffered = 1;
}
@@ -1487,29 +1487,29 @@
{
int i;
uint32_t nbcap;
-
-
+
+
static const unsigned addresses[] = {
- 2,
- 3,
- 4,
- 5,
- 6,
- 7,
- 9,
- 11,
- 13,
- 17,
- 18,
- 21,
- 23,
- 26,
- 27,
- 28,
- 29,
- 30,
- 41,
- 42,
+ 2,
+ 3,
+ 4,
+ 5,
+ 6,
+ 7,
+ 9,
+ 11,
+ 13,
+ 17,
+ 18,
+ 21,
+ 23,
+ 26,
+ 27,
+ 28,
+ 29,
+ 30,
+ 41,
+ 42,
};
nbcap = pci_read_config32(ctrl->f3, 0xE8 );
if (!(nbcap & 0x0001 )) {
@@ -1548,7 +1548,7 @@
}
struct mem_param {
uint8_t cycle_time;
- uint8_t divisor;
+ uint8_t divisor;
uint8_t tRC;
uint8_t tRFC;
uint32_t dch_memclk;
@@ -1621,35 +1621,35 @@
}
static const struct mem_param *spd_set_memclk(const struct mem_controller *ctrl)
{
-
+
const struct mem_param *param;
unsigned min_cycle_time, min_latency;
int i;
uint32_t value;
static const int latency_indicies[] = { 26, 23, 9 };
static const unsigned char min_cycle_times[] = {
- [0 ] = 0x50,
- [1 ] = 0x60,
- [2 ] = 0x75,
- [3 ] = 0xa0,
+ [0 ] = 0x50,
+ [1 ] = 0x60,
+ [2 ] = 0x75,
+ [3 ] = 0xa0,
};
value = pci_read_config32(ctrl->f3, 0xE8 );
min_cycle_time = min_cycle_times[(value >> 5 ) & 3 ];
min_latency = 2;
-
+
for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
int new_cycle_time, new_latency;
int index;
int latencies;
int latency;
-
+
new_cycle_time = 0xa0;
new_latency = 5;
latencies = spd_read_byte(ctrl->channel0[i], 18);
if (latencies <= 0) continue;
-
+
latency = log2(latencies) -2;
-
+
for(index = 0; index < 3; index++, latency++) {
int value;
if ((latency < 2) || (latency > 4) ||
@@ -1660,7 +1660,7 @@
if (value < 0) {
continue;
}
-
+
if ((value >= min_cycle_time) && (value < new_cycle_time)) {
new_cycle_time = value;
new_latency = latency;
@@ -1669,17 +1669,17 @@
if (new_latency > 4){
continue;
}
-
+
if (new_cycle_time > min_cycle_time) {
min_cycle_time = new_cycle_time;
}
-
+
if (new_latency > min_latency) {
min_latency = new_latency;
}
}
-
-
+
+
for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
int latencies;
int latency;
@@ -1690,9 +1690,9 @@
if (latencies <= 0) {
goto dimm_err;
}
-
+
latency = log2(latencies) -2;
-
+
for(index = 0; index < 3; index++, latency++) {
if (!(latencies & (1 << latency))) {
continue;
@@ -1700,36 +1700,36 @@
if (latency == min_latency)
break;
}
-
+
if ((latency != min_latency) || (index >= 3)) {
goto dimm_err;
}
-
-
+
+
value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]);
-
-
+
+
if (value <= min_cycle_time) {
continue;
}
-
+
dimm_err:
disable_dimm(ctrl, i);
}
-
+
param = get_mem_param(min_cycle_time);
-
+
value = pci_read_config32(ctrl->f2, 0x94 );
value &= ~(0x7 << 20 );
value |= param->dch_memclk;
pci_write_config32(ctrl->f2, 0x94 , value);
static const unsigned latencies[] = { 1 , 5 , 2 };
-
+
value = pci_read_config32(ctrl->f2, 0x88 );
value &= ~(0x7 << 0 );
value |= latencies[min_latency - 2] << 0 ;
pci_write_config32(ctrl->f2, 0x88 , value);
-
+
return param;
}
static int update_dimm_Trc(const struct mem_controller *ctrl, const struct mem_param *param, int i)
@@ -1974,7 +1974,7 @@
{
uint32_t dth;
unsigned clocks;
- clocks = 1;
+ clocks = 1;
dth = pci_read_config32(ctrl->f2, 0x8c );
dth &= ~(0x1 << 0 );
dth |= ((clocks - 1 ) << 0 );
@@ -1993,11 +1993,11 @@
if (is_opteron(ctrl)) {
if (latency == 1 ) {
if (divisor == ((6 << 0) + 0)) {
-
+
clocks = 3;
}
else if (divisor > ((6 << 0)+0)) {
-
+
clocks = 2;
}
}
@@ -2006,11 +2006,11 @@
}
else if (latency == 2 ) {
if (divisor == ((6 << 0)+0)) {
-
+
clocks = 4;
}
else if (divisor > ((6 << 0)+0)) {
-
+
clocks = 3;
}
}
@@ -2042,7 +2042,7 @@
if ((clocks < 1 ) || (clocks > 6 )) {
die("Unknown Trwt");
}
-
+
dth = pci_read_config32(ctrl->f2, 0x8c );
dth &= ~(0x7 << 4 );
dth |= ((clocks - 1 ) << 4 );
@@ -2051,7 +2051,7 @@
}
static void set_Twcl(const struct mem_controller *ctrl, const struct mem_param *param)
{
-
+
uint32_t dth;
unsigned clocks;
if (is_registered(ctrl)) {
@@ -2075,19 +2075,19 @@
rdpreamble = 0;
if (is_registered(ctrl)) {
if (divisor == ((10 << 1)+0)) {
-
+
rdpreamble = ((9 << 1)+ 0);
}
else if (divisor == ((7 << 1)+1)) {
-
+
rdpreamble = ((8 << 1)+0);
}
else if (divisor == ((6 << 1)+0)) {
-
+
rdpreamble = ((7 << 1)+1);
}
else if (divisor == ((5 << 1)+0)) {
-
+
rdpreamble = ((7 << 1)+0);
}
}
@@ -2101,42 +2101,42 @@
}
}
if (divisor == ((10 << 1)+0)) {
-
+
if (slots <= 2) {
-
+
rdpreamble = ((9 << 1)+0);
} else {
-
+
rdpreamble = ((14 << 1)+0);
}
}
else if (divisor == ((7 << 1)+1)) {
-
+
if (slots <= 2) {
-
+
rdpreamble = ((7 << 1)+0);
} else {
-
+
rdpreamble = ((11 << 1)+0);
}
}
else if (divisor == ((6 << 1)+0)) {
-
+
if (slots <= 2) {
-
+
rdpreamble = ((7 << 1)+0);
} else {
-
+
rdpreamble = ((9 << 1)+0);
}
}
else if (divisor == ((5 << 1)+0)) {
-
+
if (slots <= 2) {
-
+
rdpreamble = ((5 << 1)+0);
} else {
-
+
rdpreamble = ((7 << 1)+0);
}
}
@@ -2159,11 +2159,11 @@
async_lat = 0;
if (is_registered(ctrl)) {
if (dimms == 4) {
-
+
async_lat = 9;
- }
+ }
else {
-
+
async_lat = 8;
}
}
@@ -2172,11 +2172,11 @@
die("Too many unbuffered dimms");
}
else if (dimms == 3) {
-
+
async_lat = 7;
}
else {
-
+
async_lat = 6;
}
}
@@ -2186,7 +2186,7 @@
static void set_idle_cycle_limit(const struct mem_controller *ctrl, const struct mem_param *param)
{
uint32_t dch;
-
+
dch = pci_read_config32(ctrl->f2, 0x94 );
dch &= ~(0x7 << 16 );
dch |= 3 << 16 ;
@@ -2198,39 +2198,39 @@
int dimms;
int i;
int rc;
-
+
init_Tref(ctrl, param);
for(i = 0; (i < 4) && ctrl->channel0[i]; i++) {
int rc;
-
+
if (update_dimm_Trc (ctrl, param, i) < 0) goto dimm_err;
if (update_dimm_Trfc(ctrl, param, i) < 0) goto dimm_err;
if (update_dimm_Trcd(ctrl, param, i) < 0) goto dimm_err;
if (update_dimm_Trrd(ctrl, param, i) < 0) goto dimm_err;
if (update_dimm_Tras(ctrl, param, i) < 0) goto dimm_err;
if (update_dimm_Trp (ctrl, param, i) < 0) goto dimm_err;
-
+
if (update_dimm_Tref(ctrl, param, i) < 0) goto dimm_err;
-
+
if (update_dimm_x4 (ctrl, param, i) < 0) goto dimm_err;
if (update_dimm_ecc(ctrl, param, i) < 0) goto dimm_err;
continue;
dimm_err:
disable_dimm(ctrl, i);
-
+
}
-
+
set_Twr(ctrl, param);
-
+
set_Twtr(ctrl, param);
set_Trwt(ctrl, param);
set_Twcl(ctrl, param);
-
+
set_read_preamble(ctrl, param);
set_max_async_latency(ctrl, param);
set_idle_cycle_limit(ctrl, param);
}
-static void sdram_set_spd_registers(const struct mem_controller *ctrl)
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)
{
const struct mem_param *param;
spd_enable_2channels(ctrl);
@@ -2243,18 +2243,18 @@
static void sdram_enable(int controllers, const struct mem_controller *ctrl)
{
int i;
-
+
for(i = 0; i < controllers; i++) {
uint32_t dch;
dch = pci_read_config32(ctrl[i].f2, 0x94 );
dch |= (1 << 25) ;
pci_write_config32(ctrl[i].f2, 0x94 , dch);
}
-
+
memreset(controllers, ctrl);
for(i = 0; i < controllers; i++) {
uint32_t dcl;
-
+
dcl = pci_read_config32(ctrl[i].f2, 0x90 );
if (dcl & (1<<17) ) {
uint32_t mnc;
@@ -2294,7 +2294,7 @@
if (dcl & (1<<17) ) {
print_debug("Clearing memory: ");
if (!is_cpu_pre_c0()) {
-
+
dcl &= ~((1<<11) | (1<<10) );
pci_write_config32(ctrl[i].f2, 0x90 , dcl);
do {
@@ -2304,10 +2304,10 @@
uint32_t base, last_scrub_k, scrub_k;
uint32_t cnt,zstart,zend;
msr_t msr,msr_201;
-
+
pci_write_config32(ctrl[i].f3, 0x58 ,
(0 << 16) | (0 << 8) | (0 << 0));
-
+
msr_201 = rdmsr(0x201);
zstart = pci_read_config32(ctrl[0].f1, 0x40 + (i*8));
zend = pci_read_config32(ctrl[0].f1, 0x44 + (i*8));
@@ -2318,50 +2318,50 @@
print_debug("-");
print_debug_hex32(zend);
print_debug("\r\n");
-
-
+
+
msr = rdmsr(0x2ff );
msr.lo &= ~(1<<10);
wrmsr(0x2ff , msr);
-
+
msr = rdmsr(0xc0010015);
msr.lo |= (1<<17);
wrmsr(0xc0010015,msr);
for(;zstart<zend;zstart+=4) {
-
+
if(zstart == 0x0fc)
continue;
-
-
+
+
__asm__ volatile(
"movl %%cr0, %0\n\t"
"orl $0x40000000, %0\n\t"
"movl %0, %%cr0\n\t"
:"=r" (cnt)
);
-
-
+
+
msr.lo = 1 + ((zstart&0x0ff)<<24);
msr.hi = (zstart&0x0ff00)>>8;
wrmsr(0x200,msr);
-
+
msr.hi = 0x000000ff;
msr.lo = 0xfc000800;
wrmsr(0x201,msr);
-
+
__asm__ volatile(
"movl %%cr0, %0\n\t"
"andl $0x9fffffff, %0\n\t"
- "movl %0, %%cr0\n\t"
- :"=r" (cnt)
+ "movl %0, %%cr0\n\t"
+ :"=r" (cnt)
);
-
+
msr.lo = (zstart&0xff) << 24;
msr.hi = (zstart&0xff00) >> 8;
wrmsr(0xc0000100,msr);
- print_debug_char((zstart > 0x0ff)?'+':'-');
-
-
+ print_debug_char((zstart > 0x0ff)?'+':'-');
+
+
__asm__ volatile(
"1: \n\t"
"movl %0, %%fs:(%1)\n\t"
@@ -2370,67 +2370,67 @@
"jnz 1b\n\t"
:
: "a" (0), "D" (0), "c" (0x01000000)
- );
+ );
}
-
-
+
+
__asm__ volatile(
"movl %%cr0, %0\n\t"
"orl $0x40000000, %0\n\t"
"movl %0, %%cr0\n\t"
- :"=r" (cnt)
+ :"=r" (cnt)
);
-
-
+
+
msr = rdmsr(0x2ff );
msr.lo |= 0x0400;
wrmsr(0x2ff , msr);
-
+
msr.lo = 6;
msr.hi = 0;
wrmsr(0x200,msr);
wrmsr(0x201,msr_201);
-
+
msr.lo = 0;
msr.hi = 0;
wrmsr(0xc0000100,msr);
-
+
__asm__ volatile(
"movl %%cr0, %0\n\t"
"andl $0x9fffffff, %0\n\t"
- "movl %0, %%cr0\n\t"
- :"=r" (cnt)
+ "movl %0, %%cr0\n\t"
+ :"=r" (cnt)
);
-
-
+
+
msr = rdmsr(0xc0010015);
msr.lo &= ~(1<<17);
wrmsr(0xc0010015,msr);
-
+
base = pci_read_config32(ctrl[i].f1, 0x40 + (ctrl[i].node_id << 3));
base &= 0xffff0000;
-
+
pci_write_config32(ctrl[i].f3, 0x5C , base << 8);
pci_write_config32(ctrl[i].f3, 0x60 , base >> 24);
-
- pci_write_config32(ctrl[i].f3, 0x58 ,
+
+ pci_write_config32(ctrl[i].f3, 0x58 ,
(22 << 16) | (22 << 8) | (22 << 0));
print_debug("done\r\n");
}
}
}
-
-
-
-
-
+
+
+
+
+
typedef uint8_t u8;
typedef uint32_t u32;
typedef int8_t bool;
static void disable_probes(void)
{
-
-
+
+
u32 val;
print_debug("Disabling read/write/fill probes for UP... ");
val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 0 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x68);
@@ -2438,8 +2438,8 @@
pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 0 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x68, val);
print_debug("done.\r\n");
}
-
-static void wait_ap_stop(u8 node)
+
+static void wait_ap_stop(u8 node)
{
unsigned long reg;
unsigned long i;
@@ -2449,7 +2449,7 @@
if((regx & (1<<4))==1) break;
}
reg = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) ,0x6c);
- reg &= ~(1<<4);
+ reg &= ~(1<<4);
pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x6c, reg);
}
static void notify_bsp_ap_is_stopped(void)
@@ -2458,31 +2458,31 @@
unsigned long apic_id;
apic_id = *((volatile unsigned long *)(0xfee00000 + 0x020 ));
apic_id >>= 24;
-
+
if(apic_id != 0) {
-
+
reg = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ apic_id ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x6C);
reg |= 1<<4;
pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ apic_id ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x6C, reg);
}
-
+
}
-
+
static void enable_routing(u8 node)
{
u32 val;
-
-
+
+
print_debug("Enabling routing table for node ");
print_debug_hex32(node);
val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x6c);
val &= ~((1<<6)|(1<<5)|(1<<4)|(1<<1)|(1<<0));
pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x6c, val);
-
+
if(node!=0) {
wait_ap_stop(node);
}
-
+
print_debug(" done.\r\n");
}
static void rename_temp_node(u8 node)
@@ -2491,21 +2491,21 @@
print_debug("Renaming current temp node to ");
print_debug_hex32(node);
val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 7 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x60);
- val &= (~7);
- val |= node;
+ val &= (~7);
+ val |= node;
pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 7 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x60, val);
print_debug(" done.\r\n");
}
static bool check_connection(u8 src, u8 dest, u8 link)
{
-
+
u32 val;
-
-
+
+
val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ src ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x98+link);
if ( (val&0x17) != 0x03)
return 0;
-
+
val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ dest ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) ,0);
if(val != 0x11001022)
return 0;
@@ -2518,37 +2518,37 @@
uint16_t freq_cap1, freq_cap2, freq_cap, freq_mask;
uint8_t width_cap1, width_cap2, width_cap, width, ln_width1, ln_width2;
uint8_t freq;
-
-
+
+
freq_cap1 = pci_read_config16(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x80 + link1 + 0x0a );
freq_cap2 = pci_read_config16(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x80 + link2 + 0x0a );
-
-
+
+
freq = log2(freq_cap1 & freq_cap2 & 0xff);
-
+
pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x80 + link1 + 0x09 , freq);
pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x80 + link2 + 0x09 , freq);
-
+
width_cap1 = pci_read_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x80 + link1 + 6 );
width_cap2 = pci_read_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x80 + link2 + 6 );
-
+
ln_width1 = link_width_to_pow2[width_cap1 & 7];
ln_width2 = link_width_to_pow2[(width_cap2 >> 4) & 7];
if (ln_width1 > ln_width2) {
ln_width1 = ln_width2;
}
width = pow2_to_link_width[ln_width1];
-
+
ln_width1 = link_width_to_pow2[(width_cap1 >> 4) & 7];
ln_width2 = link_width_to_pow2[width_cap2 & 7];
if (ln_width1 > ln_width2) {
ln_width1 = ln_width2;
}
width |= pow2_to_link_width[ln_width1] << 4;
-
-
+
+
pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x80 + link1 + 6 + 1, width);
-
+
width = ((width & 0x70) >> 4) | ((width & 0x7) << 4);
pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , 0x80 + link2 + 6 + 1, width);
}
@@ -2576,8 +2576,8 @@
}
static void setup_remote_node(u8 node, u8 cpus)
{
- static const uint8_t pci_reg[] = {
- 0x44, 0x4c, 0x54, 0x5c, 0x64, 0x6c, 0x74, 0x7c,
+ static const uint8_t pci_reg[] = {
+ 0x44, 0x4c, 0x54, 0x5c, 0x64, 0x6c, 0x74, 0x7c,
0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78,
0x84, 0x8c, 0x94, 0x9c, 0xa4, 0xac, 0xb4, 0xbc,
0x80, 0x88, 0x90, 0x98, 0xa0, 0xa8, 0xb0, 0xb8,
@@ -2590,7 +2590,7 @@
print_debug("setup_remote_node\r\n");
for(row=0; row<cpus; row++)
setup_remote_row(node, row, cpus);
-
+
for(i = 0; i < sizeof(pci_reg)/sizeof(pci_reg[0]); i++) {
uint32_t value;
uint8_t reg;
@@ -2611,24 +2611,24 @@
u8 cpus=2;
print_debug("Enabling SMP settings\r\n");
setup_row(0,0,cpus);
-
+
setup_temp_row(0,1,cpus);
-
+
if (!check_connection(0, 7, 0x20 )) {
print_debug("No connection to Node 1.\r\n");
- fill_row( 0 ,7,0x00010101 ) ;
- setup_uniprocessor();
+ fill_row( 0 ,7,0x00010101 ) ;
+ setup_uniprocessor();
return 1;
}
-
+
optimize_connection(0, 0x20 , 7, 0x20 );
- setup_node(0, cpus);
- setup_remote_node(1, cpus);
- rename_temp_node(1);
- enable_routing(1);
-
- fill_row( 0 ,7,0x00010101 ) ;
-
+ setup_node(0, cpus);
+ setup_remote_node(1, cpus);
+ rename_temp_node(1);
+ enable_routing(1);
+
+ fill_row( 0 ,7,0x00010101 ) ;
+
print_debug_hex32(cpus);
print_debug(" nodes initialized.\r\n");
return cpus;
@@ -2641,29 +2641,29 @@
print_debug_hex32(cpus);
print_debug("\r\n");
if (cpus>2)
- mask=0x06;
+ mask=0x06;
else
- mask=0x02;
+ mask=0x02;
for (node=0; node<cpus; node++) {
if ((pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node ) & 0x1f) << 11) | ((( 3 ) & 0x7) << 8)) , 0xe8) & mask)!=mask)
mp_cap= (0) ;
}
if (mp_cap)
return cpus;
-
+
print_debug("One of the CPUs is not MP capable. Going back to UP\r\n");
for (node=cpus; node>0; node--)
for (row=cpus; row>0; row--)
fill_row(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node-1 ) & 0x1f) << 11) | ((( 0 ) & 0x7) << 8)) , row-1, 0x00010101 );
-
+
return setup_uniprocessor();
}
static void coherent_ht_finalize(unsigned cpus)
{
int node;
bool rev_a0;
-
-
+
+
print_debug("coherent_ht_finalize\r\n");
rev_a0= is_cpu_rev_a0();
for (node=0; node<cpus; node++) {
@@ -2691,36 +2691,36 @@
cpus=setup_smp();
cpus=detect_mp_capabilities(cpus);
coherent_ht_finalize(cpus);
-
+
coherent_ht_mainboard(cpus);
return reset_needed;
}
void sdram_no_memory(void)
{
print_err("No memory!!\r\n");
- while(1) {
- hlt();
+ while(1) {
+ hlt();
}
}
-
+
void sdram_initialize(int controllers, const struct mem_controller *ctrl)
{
int i;
-
+
for(i = 0; i < controllers; i++) {
print_debug("Ram1.");
print_debug_hex8(i);
print_debug("\r\n");
sdram_set_registers(ctrl + i);
}
-
+
for(i = 0; i < controllers; i++) {
print_debug("Ram2.");
print_debug_hex8(i);
print_debug("\r\n");
sdram_set_spd_registers(ctrl + i);
}
-
+
print_debug("Ram3\r\n");
sdram_enable(controllers, ctrl);
print_debug("Ram4\r\n");
@@ -2738,17 +2738,17 @@
{
unsigned apicid;
apicid = apic_read(0x020 ) >> 24;
-
+
apic_write(0x310 , (( apicid )<<24) );
apic_write(0x300 , 0x08000 | 0x04000 | 0x00500 );
-
+
apic_wait_icr_idle();
-
+
apic_write(0x310 , (( apicid )<<24) );
apic_write(0x300 , 0x08000 | 0x00500 );
-
+
apic_wait_icr_idle();
-
+
for(;;) {
hlt();
}
@@ -2761,7 +2761,7 @@
}
static void main(void)
{
-
+
static const struct mem_controller cpu[] = {
{
.node_id = 0,
@@ -2797,9 +2797,9 @@
setup_coherent_ht_domain();
enumerate_ht_chain(0);
distinguish_cpu_resets(0);
-
+
enable_smbus();
memreset_setup();
sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
-
+
}
diff --git a/util/romcc/tests/simple_test.c b/util/romcc/tests/simple_test.c
index 4065c51..9791d9e 100644
--- a/util/romcc/tests/simple_test.c
+++ b/util/romcc/tests/simple_test.c
@@ -78,7 +78,7 @@
void uart_wait_until_sent(void)
{
- while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
@@ -170,7 +170,7 @@
i = 1;
j = 2;
k = i && j;
-
+
}
static void and_test(void)
{
@@ -236,9 +236,9 @@
static void func(void)
{
int bar, baz;
- int i;
-
- baz = add(1, 2);
+ int i;
+
+ baz = add(1, 2);
baz = add(1, 2);
bar = 1;
baz = 2;
diff --git a/util/romcc/tests/simple_test1.c b/util/romcc/tests/simple_test1.c
index 4065c51..9791d9e 100644
--- a/util/romcc/tests/simple_test1.c
+++ b/util/romcc/tests/simple_test1.c
@@ -78,7 +78,7 @@
void uart_wait_until_sent(void)
{
- while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
@@ -170,7 +170,7 @@
i = 1;
j = 2;
k = i && j;
-
+
}
static void and_test(void)
{
@@ -236,9 +236,9 @@
static void func(void)
{
int bar, baz;
- int i;
-
- baz = add(1, 2);
+ int i;
+
+ baz = add(1, 2);
baz = add(1, 2);
bar = 1;
baz = 2;
diff --git a/util/romcc/tests/simple_test10.c b/util/romcc/tests/simple_test10.c
index 3e7f510..af9bf07 100644
--- a/util/romcc/tests/simple_test10.c
+++ b/util/romcc/tests/simple_test10.c
@@ -11,7 +11,7 @@
*/
unsigned end_of_memory;
unsigned char device;
-
+
end_of_memory = 0; /* in multiples of 8MiB */
device = SMBUS_MEM_DEVICE_START;
while (device <= SMBUS_MEM_DEVICE_END) {
diff --git a/util/romcc/tests/simple_test19.c b/util/romcc/tests/simple_test19.c
index 0bdcf42..cb1f494 100644
--- a/util/romcc/tests/simple_test19.c
+++ b/util/romcc/tests/simple_test19.c
@@ -1,4 +1,4 @@
-static void hlt(void)
+static void hlt(void)
{
__builtin_hlt();
}
diff --git a/util/romcc/tests/simple_test2.c b/util/romcc/tests/simple_test2.c
index aef936a..b576d30 100644
--- a/util/romcc/tests/simple_test2.c
+++ b/util/romcc/tests/simple_test2.c
@@ -18,7 +18,7 @@
*/
unsigned end_of_memory;
unsigned device;
-
+
end_of_memory = 0; /* in multiples of 8MiB */
device = SMBUS_MEM_DEVICE_START;
while (device <= SMBUS_MEM_DEVICE_END) {
diff --git a/util/romcc/tests/simple_test20.c b/util/romcc/tests/simple_test20.c
index 1998853..f32aeac 100644
--- a/util/romcc/tests/simple_test20.c
+++ b/util/romcc/tests/simple_test20.c
@@ -86,7 +86,7 @@
void uart_wait_until_sent(void)
{
- while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
diff --git a/util/romcc/tests/simple_test22.c b/util/romcc/tests/simple_test22.c
index 81d2ed0..a67f5fd 100644
--- a/util/romcc/tests/simple_test22.c
+++ b/util/romcc/tests/simple_test22.c
@@ -34,7 +34,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1));
return syscall_return(res);
-
+
}
static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)
@@ -45,7 +45,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2));
return syscall_return(res);
-
+
}
@@ -58,7 +58,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
return syscall_return(res);
-
+
}
static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -70,7 +70,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
return syscall_return(res);
-
+
}
static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -80,10 +80,10 @@
asm volatile(
"int $0x80"
: "=a" (res)
- : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),
+ : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),
"S" (arg4), "D" (arg5));
return syscall_return(res);
-
+
}
#define NR_exit 1
diff --git a/util/romcc/tests/simple_test27.c b/util/romcc/tests/simple_test27.c
index f278f62..ac52368 100644
--- a/util/romcc/tests/simple_test27.c
+++ b/util/romcc/tests/simple_test27.c
@@ -66,7 +66,7 @@
void uart_wait_until_sent(void)
{
- while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
@@ -96,7 +96,7 @@
void __console_tx_char(unsigned char byte)
{
uart_tx_byte(byte);
-
+
}
void __console_tx_string(char *str)
diff --git a/util/romcc/tests/simple_test3.c b/util/romcc/tests/simple_test3.c
index 008d0ab..864760c 100644
--- a/util/romcc/tests/simple_test3.c
+++ b/util/romcc/tests/simple_test3.c
@@ -7,7 +7,7 @@
*/
unsigned end_of_memory;
unsigned device;
-
+
end_of_memory = 0; /* in multiples of 8MiB */
device = 0x50;
while (device <= 0x53) {
@@ -23,7 +23,7 @@
/* Make it mulitples of 8MB */
side1_bits -= 25;
}
-
+
/* Compute the end address for the DRB register */
/* Only process dimms < 2GB (2^8 * 8MB) */
if (1) {
diff --git a/util/romcc/tests/simple_test30.c b/util/romcc/tests/simple_test30.c
index 6582a91..ede2091 100644
--- a/util/romcc/tests/simple_test30.c
+++ b/util/romcc/tests/simple_test30.c
@@ -34,7 +34,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1));
return syscall_return(res);
-
+
}
static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)
@@ -45,7 +45,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2));
return syscall_return(res);
-
+
}
@@ -58,7 +58,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
return syscall_return(res);
-
+
}
static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -70,7 +70,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
return syscall_return(res);
-
+
}
static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -80,10 +80,10 @@
asm volatile(
"int $0x80"
: "=a" (res)
- : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),
+ : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),
"S" (arg4), "D" (arg5));
return syscall_return(res);
-
+
}
#define NR_exit 1
@@ -301,37 +301,37 @@
static const char *addr_of_char(unsigned char ch)
{
static const char byte[] = {
- 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
- 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
- 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+ 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
- 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
+ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
- 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
+ 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
- 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
+ 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
- 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
+ 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
- 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
+ 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
- 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+ 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
- 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+ 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
- 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
+ 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
- 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
+ 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
- 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
+ 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
- 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
+ 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
- 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
+ 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
- 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
+ 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
};
return byte + ch;
@@ -484,14 +484,14 @@
(((FN) & 0x07) << 8) | \
((WHERE) & 0xFF))
- /* Routing Table Node i
- * F0:0x40 i = 0,
+ /* Routing Table Node i
+ * F0:0x40 i = 0,
* F0:0x44 i = 1,
- * F0:0x48 i = 2,
+ * F0:0x48 i = 2,
* F0:0x4c i = 3,
- * F0:0x50 i = 4,
+ * F0:0x50 i = 4,
* F0:0x54 i = 5,
- * F0:0x58 i = 6,
+ * F0:0x58 i = 6,
* F0:0x5c i = 7
* [ 0: 3] Request Route
* [0] Route to this node
@@ -518,7 +518,7 @@
PCI_ADDR(0, 0x18, 0, 0x58), 0xfff0f0f0, 0x00010101,
PCI_ADDR(0, 0x18, 0, 0x5c), 0xfff0f0f0, 0x00010101,
- /* Hypetransport Transaction Control Register
+ /* Hypetransport Transaction Control Register
* F0:0x68
* [ 0: 0] Disable read byte probe
* 0 = Probes issues
@@ -560,7 +560,7 @@
* [12:12] Change ISOC to Ordered
* 0 = Bit 1 of coherent HT RdSz/WrSz command used for iosynchronous prioritization
* 1 = Bit 1 of coherent HT RdSz/WrSz command used for ordering.
- * [14:13] Buffer Release Priority select
+ * [14:13] Buffer Release Priority select
* 00 = 64
* 01 = 16
* 10 = 8
@@ -667,7 +667,7 @@
* [13:13] HT Stop Tristate Enable
* 0 = Driven during an LDTSTOP_L
* 1 = Tristated during and LDTSTOP_L
- * [14:14] Extended CTL Time
+ * [14:14] Extended CTL Time
* 0 = CTL is asserted for 16 bit times during link initialization
* 1 = CTL is asserted for 50us during link initialization
* [18:16] Max Link Width In (Read-Only?)
@@ -933,7 +933,7 @@
* 1 = base/limit registers i are read-only
* [ 7: 4] Reserved
* [31: 8] Memory-Mapped I/O Base Address i (39-16)
- * This field defines the upper address bits of a 40bit address
+ * This field defines the upper address bits of a 40bit address
* that defines the start of memory-mapped I/O region i
*/
PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00e00003,
@@ -994,7 +994,7 @@
* [ 3: 2] Reserved
* [ 4: 4] VGA Enable
* 0 = VGA matches Disabled
- * 1 = matches all address < 64K and where A[9:0] is in the
+ * 1 = matches all address < 64K and where A[9:0] is in the
* range 3B0-3BB or 3C0-3DF independen of the base & limit registers
* [ 5: 5] ISA Enable
* 0 = ISA matches Disabled
@@ -1002,7 +1002,7 @@
* from matching agains this base/limit pair
* [11: 6] Reserved
* [24:12] PCI I/O Base i
- * This field defines the start of PCI I/O region n
+ * This field defines the start of PCI I/O region n
* [31:25] Reserved
*/
PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x0000d003,
diff --git a/util/romcc/tests/simple_test32.c b/util/romcc/tests/simple_test32.c
index bd6947a..28dbb89 100644
--- a/util/romcc/tests/simple_test32.c
+++ b/util/romcc/tests/simple_test32.c
@@ -3,7 +3,7 @@
unsigned long addr, start, stop;
start = 0x00100000;
stop = 0x00180000;
-
+
for(addr = start; addr < stop ;) {
unsigned char ch;
@@ -12,7 +12,7 @@
while(__builtin_inb(0x3f))
;
__builtin_outb(ch, 0x3f8);
-
+
while(__builtin_inb(0x3f))
;
}
diff --git a/util/romcc/tests/simple_test36.c b/util/romcc/tests/simple_test36.c
index 9044bda..53aaf91 100644
--- a/util/romcc/tests/simple_test36.c
+++ b/util/romcc/tests/simple_test36.c
@@ -34,7 +34,7 @@
__builtin_outl(0xc260, 0xCF8);
__builtin_outl(csmask, 0xCFC);
}
-
+
tom &= ~0xff000000;
__builtin_outl(tom, 0x1234);
diff --git a/util/romcc/tests/simple_test37.c b/util/romcc/tests/simple_test37.c
index 85c622b..d6ddc2e 100644
--- a/util/romcc/tests/simple_test37.c
+++ b/util/romcc/tests/simple_test37.c
@@ -4,7 +4,7 @@
csbase = 0x40;
csmask = 0xfe00;
-
+
__builtin_outl(csbase, 0x40);
__builtin_outl(csmask, 0x60);
}
diff --git a/util/romcc/tests/simple_test38.c b/util/romcc/tests/simple_test38.c
index db001a2..9239664 100644
--- a/util/romcc/tests/simple_test38.c
+++ b/util/romcc/tests/simple_test38.c
@@ -34,7 +34,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1));
return syscall_return(res);
-
+
}
static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)
@@ -45,7 +45,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2));
return syscall_return(res);
-
+
}
@@ -58,7 +58,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
return syscall_return(res);
-
+
}
static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -70,7 +70,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
return syscall_return(res);
-
+
}
static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -80,10 +80,10 @@
asm volatile(
"int $0x80"
: "=a" (res)
- : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),
+ : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),
"S" (arg4), "D" (arg5));
return syscall_return(res);
-
+
}
#define NR_exit 1
@@ -301,37 +301,37 @@
static const char *addr_of_char(unsigned char ch)
{
static const char byte[] = {
- 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
- 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
- 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+ 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
- 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
+ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
- 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
+ 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
- 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
+ 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
- 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
+ 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
- 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
+ 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
- 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+ 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
- 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+ 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
- 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
+ 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
- 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
+ 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
- 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
+ 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
- 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
+ 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
- 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
+ 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
- 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
+ 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
};
return byte + ch;
@@ -401,15 +401,15 @@
{
int i;
print_debug("goto_test\n");
-
+
i = 0;
goto bottom;
{
top:
- print_debug("i = ");
- print_debug_hex8(i);
+ print_debug("i = ");
+ print_debug_hex8(i);
print_debug("\n");
-
+
i = i + 1;
}
bottom:
diff --git a/util/romcc/tests/simple_test39.c b/util/romcc/tests/simple_test39.c
index a7b999b..1c67cab 100644
--- a/util/romcc/tests/simple_test39.c
+++ b/util/romcc/tests/simple_test39.c
@@ -34,7 +34,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1));
return syscall_return(res);
-
+
}
static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)
@@ -45,7 +45,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2));
return syscall_return(res);
-
+
}
@@ -58,7 +58,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
return syscall_return(res);
-
+
}
static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -70,7 +70,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
return syscall_return(res);
-
+
}
static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -80,10 +80,10 @@
asm volatile(
"int $0x80"
: "=a" (res)
- : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),
+ : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),
"S" (arg4), "D" (arg5));
return syscall_return(res);
-
+
}
#define NR_exit 1
@@ -301,37 +301,37 @@
static const char *addr_of_char(unsigned char ch)
{
static const char byte[] = {
- 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
- 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
- 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+ 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
- 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
+ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
- 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
+ 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
- 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
+ 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
- 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
+ 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
- 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
+ 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
- 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+ 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
- 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+ 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
- 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
+ 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
- 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
+ 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
- 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
+ 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
- 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
+ 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
- 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
+ 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
- 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
+ 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
};
return byte + ch;
@@ -401,15 +401,15 @@
{
int i;
print_debug("goto_test\n");
-
+
i = 0;
goto bottom;
{
top:
- print_debug("i = ");
- print_debug_hex8(i);
+ print_debug("i = ");
+ print_debug_hex8(i);
print_debug("\n");
-
+
i = i + 1;
}
bottom:
@@ -424,7 +424,7 @@
short across;
};
-static void main(void)
+static void main(void)
{
static const struct socket_desc cpu_socketsA[] = {
{ .up = 2, .down = -1, .across = 1 }, /* Node 0 */
diff --git a/util/romcc/tests/simple_test4.c b/util/romcc/tests/simple_test4.c
index 4f72dca..2ac6a4d 100644
--- a/util/romcc/tests/simple_test4.c
+++ b/util/romcc/tests/simple_test4.c
@@ -86,7 +86,7 @@
int log2(int value)
{
/* __builtin_bsr is a exactly equivalent to the x86 machine
- * instruction with the exception that it returns -1
+ * instruction with the exception that it returns -1
* when the value presented to it is zero.
* Otherwise __builtin_bsr returns the zero based index of
* the highest bit set.
@@ -149,7 +149,7 @@
void uart_wait_until_sent(void)
{
- while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
+ while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
@@ -274,7 +274,7 @@
#define PM_BUS 0
#define PM_DEVFN (PIIX4_DEVFN+3)
-#if HAVE_CONSTANT_PROPOGATION
+#if HAVE_CONSTANT_PROPOGATION
#define SMBUS_IO_BASE 0x1000
#define SMBHSTSTAT 0
#define SMBHSTCTL 2
@@ -428,7 +428,7 @@
unsigned end_of_memory;
unsigned char device;
unsigned char drb_reg;
-
+
end_of_memory = 0; /* in multiples of 8MiB */
device = SMBUS_MEM_DEVICE_START;
#if !CALCULATE_DRB_REG
@@ -464,13 +464,13 @@
#else
side1_bits += log2((((byte2 << 8) | byte));
#endif
-
+
/* now I have the ram size in bits as a power of two (less 1) */
/* Make it mulitples of 8MB */
side1_bits -= 25;
/* side two */
-
+
/* number of physical banks */
byte = smbus_read_byte(device, 5);
if (byte > 1) {
@@ -487,7 +487,7 @@
#if CALCULATE_DRB_REG
drb_reg = ((device - SMBUS_MEM_DEVICE_START) << 1) + 0x60;
#endif
-
+
#if HAVE_STRING_SUPPORT
print_debug("end_of_memory: "); print_debug_hex32(end_of_memory); print_debug("\n");
#endif
diff --git a/util/romcc/tests/simple_test43.c b/util/romcc/tests/simple_test43.c
index 4fb2735..464f26f 100644
--- a/util/romcc/tests/simple_test43.c
+++ b/util/romcc/tests/simple_test43.c
@@ -24,13 +24,13 @@
if (!loops) {
goto end;
}
-
+
loops = 1000000;
while(--loops)
;
- end:
+ end:
;
-
+
}
loops = 1000000;
while(--loops)
diff --git a/util/romcc/tests/simple_test45.c b/util/romcc/tests/simple_test45.c
index beb0417..5e8d742 100644
--- a/util/romcc/tests/simple_test45.c
+++ b/util/romcc/tests/simple_test45.c
@@ -10,8 +10,8 @@
device = 0x50;
new_cycle_time = 0xa0;
new_latency = 5;
-
-
+
+
latency = 0;
for(index = 0; index < 3; index++, latency++) {
unsigned long loops;
@@ -23,10 +23,10 @@
if (!loops) {
continue;
}
-
+
__builtin_outb(device, 0xe4);
__builtin_outb(index, 0xe8);
-
+
loops = 1000000;
while(--loops)
;
diff --git a/util/romcc/tests/simple_test46.c b/util/romcc/tests/simple_test46.c
index bd84246..0b83125 100644
--- a/util/romcc/tests/simple_test46.c
+++ b/util/romcc/tests/simple_test46.c
@@ -22,16 +22,16 @@
if (loops < 0) {
continue;
}
-
+
__builtin_outb(device, 0x10e4);
__builtin_outb(address, 0x10e8);
-
+
loops = 1000000;
if ((loops?0:-1) < 0) {
continue;
}
}
-
+
if (new_cycle_time > min_cycle_time) {
min_cycle_time = new_cycle_time;
}
diff --git a/util/romcc/tests/simple_test47.c b/util/romcc/tests/simple_test47.c
index 28d72ea..d1c54ae 100644
--- a/util/romcc/tests/simple_test47.c
+++ b/util/romcc/tests/simple_test47.c
@@ -16,18 +16,18 @@
for(index = 0; index < 3; index++, latency++) {
unsigned long loops;
unsigned address = index;
-
+
loops = 1000000;
do {
} while(--loops);
if (loops) {
continue;
}
-
+
__builtin_outb(device, 0x10e4);
-
+
__builtin_outb(address & 0xFF, 0x10e8);
-
+
loops = 1000000;
while(--loops)
;
diff --git a/util/romcc/tests/simple_test48.c b/util/romcc/tests/simple_test48.c
index 779ecfd..cf9ee8a 100644
--- a/util/romcc/tests/simple_test48.c
+++ b/util/romcc/tests/simple_test48.c
@@ -9,5 +9,5 @@
__builtin_outb(j, 0xef90);
next:
__builtin_outb(i, 0x5678);
-
+
}
diff --git a/util/romcc/tests/simple_test49.c b/util/romcc/tests/simple_test49.c
index a5a12c1..b18b4cb 100644
--- a/util/romcc/tests/simple_test49.c
+++ b/util/romcc/tests/simple_test49.c
@@ -11,5 +11,5 @@
}
}
__builtin_outb(i, 0x5678);
-
+
}
diff --git a/util/romcc/tests/simple_test5.c b/util/romcc/tests/simple_test5.c
index efc1e94..725d745 100644
--- a/util/romcc/tests/simple_test5.c
+++ b/util/romcc/tests/simple_test5.c
@@ -85,7 +85,7 @@
int log2(int value)
{
/* __builtin_bsr is a exactly equivalent to the x86 machine
- * instruction with the exception that it returns -1
+ * instruction with the exception that it returns -1
* when the value presented to it is zero.
* Otherwise __builtin_bsr returns the zero based index of
* the highest bit set.
@@ -102,7 +102,7 @@
#define PM_BUS 0
#define PM_DEVFN (PIIX4_DEVFN+3)
-#if HAVE_CONSTANT_PROPOGATION
+#if HAVE_CONSTANT_PROPOGATION
#define SMBUS_IO_BASE 0x1000
#define SMBHSTSTAT 0
#define SMBHSTCTL 2
@@ -290,7 +290,7 @@
}
byte &= 0x7f;
/* Default refresh rate be conservative */
- refresh_rate = 5;
+ refresh_rate = 5;
/* see if the ram refresh is a supported one */
if (byte < 6) {
#if HAVE_STATIC_ARRAY_SUPPORT
diff --git a/util/romcc/tests/simple_test50.c b/util/romcc/tests/simple_test50.c
index 51c7c50..f8d29b7 100644
--- a/util/romcc/tests/simple_test50.c
+++ b/util/romcc/tests/simple_test50.c
@@ -3,17 +3,17 @@
typedef __builtin_udiv_t udiv_t;
typedef __builtin_uldiv_t uldiv_t;
-static div_t div(int numer, int denom)
-{
- return __builtin_div(numer, denom);
+static div_t div(int numer, int denom)
+{
+ return __builtin_div(numer, denom);
}
-static ldiv_t ldiv(long numer, long denom)
-{
- return __builtin_ldiv(numer, denom);
+static ldiv_t ldiv(long numer, long denom)
+{
+ return __builtin_ldiv(numer, denom);
}
static udiv_t udiv(unsigned numer, unsigned denom)
-{
- return __builtin_udiv(numer, denom);
+{
+ return __builtin_udiv(numer, denom);
}
static uldiv_t uldiv(unsigned long numer, unsigned long denom)
{
diff --git a/util/romcc/tests/simple_test54.c b/util/romcc/tests/simple_test54.c
index ec3208f..37dce79 100644
--- a/util/romcc/tests/simple_test54.c
+++ b/util/romcc/tests/simple_test54.c
@@ -34,7 +34,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1));
return syscall_return(res);
-
+
}
static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)
@@ -45,7 +45,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2));
return syscall_return(res);
-
+
}
@@ -58,7 +58,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
return syscall_return(res);
-
+
}
static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -70,7 +70,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
return syscall_return(res);
-
+
}
static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -80,10 +80,10 @@
asm volatile(
"int $0x80"
: "=a" (res)
- : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),
+ : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),
"S" (arg4), "D" (arg5));
return syscall_return(res);
-
+
}
#define NR_exit 1
@@ -301,37 +301,37 @@
static const char *addr_of_char(unsigned char ch)
{
static const char byte[] = {
- 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
- 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
- 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+ 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
- 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
+ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
- 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
+ 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
- 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
+ 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
- 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
+ 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
- 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
+ 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
- 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+ 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
- 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+ 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
- 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
+ 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
- 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
+ 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
- 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
+ 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
- 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
+ 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
- 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
+ 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
- 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
+ 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
};
return byte + ch;
@@ -407,7 +407,7 @@
int log2(int value)
{
/* __builtin_bsr is a exactly equivalent to the x86 machine
- * instruction with the exception that it returns -1
+ * instruction with the exception that it returns -1
* when the value presented to it is zero.
* Otherwise __builtin_bsr returns the zero based index of
* the highest bit set.
@@ -503,8 +503,8 @@
static void disable_dimm(unsigned index)
{
- print_debug("disabling dimm");
- print_debug_hex8(index);
+ print_debug("disabling dimm");
+ print_debug_hex8(index);
print_debug("\r\n");
#if 0
pci_write_config32(PCI_DEV(0, 0x18, 2), DRAM_CSBASE + (((index << 1)+0)<<2), 0);
@@ -587,8 +587,8 @@
min_latency = 2;
#if 1
- print_debug("min_cycle_time: ");
- print_debug_hex8(min_cycle_time);
+ print_debug("min_cycle_time: ");
+ print_debug_hex8(min_cycle_time);
print_debug(" min_latency: ");
print_debug_hex8(min_latency);
print_debug("\r\n");
@@ -648,8 +648,8 @@
#if 1
print_debug("device: ");
print_debug_hex8(device);
- print_debug(" new_cycle_time: ");
- print_debug_hex8(new_cycle_time);
+ print_debug(" new_cycle_time: ");
+ print_debug_hex8(new_cycle_time);
print_debug(" new_latency: ");
print_debug_hex8(new_latency);
print_debug("\r\n");
@@ -661,8 +661,8 @@
#if 1
print_debug("device: ");
print_debug_hex8(device);
- print_debug(" new_cycle_time: ");
- print_debug_hex8(new_cycle_time);
+ print_debug(" new_cycle_time: ");
+ print_debug_hex8(new_cycle_time);
print_debug(" new_latency: ");
print_debug_hex8(new_latency);
print_debug("\r\n");
@@ -682,8 +682,8 @@
#if 1
print_debug("device: ");
print_debug_hex8(device);
- print_debug(" min_cycle_time: ");
- print_debug_hex8(min_cycle_time);
+ print_debug(" min_cycle_time: ");
+ print_debug_hex8(min_cycle_time);
print_debug(" min_latency: ");
print_debug_hex8(min_latency);
print_debug("\r\n");
@@ -721,11 +721,11 @@
if ((latency != min_latency) || (index >= 3)) {
goto dimm_err;
}
-
+
/* Read the min_cycle_time for this latency */
value = smbus_read_byte(device, latency_indicies[index]);
-
- /* All is good if the selected clock speed
+
+ /* All is good if the selected clock speed
* is what I need or slower.
*/
if (value <= min_cycle_time) {
@@ -736,8 +736,8 @@
disable_dimm(spd_to_dimm(device));
}
#if 1
- print_debug("min_cycle_time: ");
- print_debug_hex8(min_cycle_time);
+ print_debug("min_cycle_time: ");
+ print_debug_hex8(min_cycle_time);
print_debug(" min_latency: ");
print_debug_hex8(min_latency);
print_debug("\r\n");
@@ -759,7 +759,7 @@
value |= latencies[min_latency - 2];
pci_write_config32(PCI_DEV(0, 0x18, 2), DRAM_CONFIG_LOW, value);
#endif
-
+
return param;
}
diff --git a/util/romcc/tests/simple_test56.c b/util/romcc/tests/simple_test56.c
index 831ee9a..570b4ee 100644
--- a/util/romcc/tests/simple_test56.c
+++ b/util/romcc/tests/simple_test56.c
@@ -31,7 +31,7 @@
}
byte &= 0x7f;
/* Default refresh rate be conservative */
- refresh_rate = 5;
+ refresh_rate = 5;
/* see if the ram refresh is a supported one */
if (byte < 6) {
refresh_rate = refresh_rates[byte];
diff --git a/util/romcc/tests/simple_test59.c b/util/romcc/tests/simple_test59.c
index 4b0ee36..a54c043 100644
--- a/util/romcc/tests/simple_test59.c
+++ b/util/romcc/tests/simple_test59.c
@@ -34,7 +34,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1));
return syscall_return(res);
-
+
}
static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)
@@ -45,7 +45,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2));
return syscall_return(res);
-
+
}
@@ -58,7 +58,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
return syscall_return(res);
-
+
}
static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -70,7 +70,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
return syscall_return(res);
-
+
}
static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -80,10 +80,10 @@
asm volatile(
"int $0x80"
: "=a" (res)
- : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),
+ : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),
"S" (arg4), "D" (arg5));
return syscall_return(res);
-
+
}
#define NR_exit 1
@@ -301,37 +301,37 @@
static const char *addr_of_char(unsigned char ch)
{
static const char byte[] = {
- 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
- 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
- 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+ 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
- 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
+ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
- 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
+ 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
- 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
+ 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
- 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
+ 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
- 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
+ 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
- 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+ 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
- 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+ 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
- 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
+ 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
- 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
+ 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
- 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
+ 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
- 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
+ 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
- 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
+ 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
- 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
+ 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
};
return byte + ch;
diff --git a/util/romcc/tests/simple_test6.c b/util/romcc/tests/simple_test6.c
index aba7f1f..147614e 100644
--- a/util/romcc/tests/simple_test6.c
+++ b/util/romcc/tests/simple_test6.c
@@ -81,7 +81,7 @@
int log2(int value)
{
/* __builtin_bsr is a exactly equivalent to the x86 machine
- * instruction with the exception that it returns -1
+ * instruction with the exception that it returns -1
* when the value presented to it is zero.
* Otherwise __builtin_bsr returns the zero based index of
* the highest bit set.
@@ -98,7 +98,7 @@
#define PM_BUS 0
#define PM_DEVFN (PIIX4_DEVFN+3)
-#if HAVE_CONSTANT_PROPOGATION
+#if HAVE_CONSTANT_PROPOGATION
#define SMBUS_IO_BASE 0x1000
#define SMBHSTSTAT 0
#define SMBHSTCTL 2
diff --git a/util/romcc/tests/simple_test61.c b/util/romcc/tests/simple_test61.c
index 583a9db..2b235cc 100644
--- a/util/romcc/tests/simple_test61.c
+++ b/util/romcc/tests/simple_test61.c
@@ -16,7 +16,7 @@
/* set the device I'm talking too */
__builtin_outb(device, 0x1004);
-
+
/* poll for transaction completion */
byte = __builtin_inb(0x10);
while(byte == 0) {
diff --git a/util/romcc/tests/simple_test65.c b/util/romcc/tests/simple_test65.c
index 642882c..9921e2e 100644
--- a/util/romcc/tests/simple_test65.c
+++ b/util/romcc/tests/simple_test65.c
@@ -6,5 +6,5 @@
{
enum tag foo;
foo = Y;
-
+
}
diff --git a/util/romcc/tests/simple_test66.c b/util/romcc/tests/simple_test66.c
index 5857855..afc0255 100644
--- a/util/romcc/tests/simple_test66.c
+++ b/util/romcc/tests/simple_test66.c
@@ -1,8 +1,8 @@
typedef unsigned char uint8_t;
static unsigned int generate_row(uint8_t row, uint8_t maxnodes)
{
-
- unsigned int ret=0x00010101;
+
+ unsigned int ret=0x00010101;
static const unsigned int rows_2p[2][2] = {
{ 0x00050101, 0x00010404 },
{ 0x00010404, 0x00050101 }
diff --git a/util/romcc/tests/simple_test67.c b/util/romcc/tests/simple_test67.c
index 3bfdc5a..70d7170 100644
--- a/util/romcc/tests/simple_test67.c
+++ b/util/romcc/tests/simple_test67.c
@@ -11,7 +11,7 @@
if (!(dcl & (1 << 8))) {
if (dimms == 4) {
async_lat = 9;
- }
+ }
else {
async_lat = 8;
}
diff --git a/util/romcc/tests/simple_test7.c b/util/romcc/tests/simple_test7.c
index 571f2cd..a206546 100644
--- a/util/romcc/tests/simple_test7.c
+++ b/util/romcc/tests/simple_test7.c
@@ -1,4 +1,4 @@
-void main(void)
+void main(void)
{
int i;
i = 0;
@@ -8,5 +8,5 @@
j = i++;
__builtin_outb(j, 0xdc);
} while(i <= 9);
-
+
}
diff --git a/util/romcc/tests/simple_test72.c b/util/romcc/tests/simple_test72.c
index 2011fea..10f6ee9 100644
--- a/util/romcc/tests/simple_test72.c
+++ b/util/romcc/tests/simple_test72.c
@@ -1,37 +1,37 @@
static const char *addr_of_char(unsigned char ch)
{
static const char byte[] = {
- 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
- 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
- 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+ 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
- 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
+ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
- 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
+ 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
- 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
+ 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
- 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
+ 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
- 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
+ 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
- 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+ 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
- 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+ 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
- 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
+ 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
- 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
+ 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
- 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
+ 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
- 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
+ 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
- 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
+ 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
- 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
+ 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
};
return byte + ch;
@@ -45,7 +45,7 @@
:
: "a" (4), "b" (1), "c" (addr_of_char(c)), "d" (1)
);
-
+
}
static void print_debug_nibble(unsigned nibble)
{
@@ -122,7 +122,7 @@
int index;
int latencies;
int latency;
-
+
/* First find the supported CAS latencies
* Byte 18 for DDR SDRAM is interpreted:
* bit 0 == CAS Latency = 1.0
@@ -138,12 +138,12 @@
new_latency = 5;
latencies = smbus_read_byte(device, 18);
-
+
/* Compute the lowest cas latency supported */
latency = __builtin_bsr(latencies) -2;
/* Loop through and find a fast clock with a low latency */
- for(index = 0; index < 1; index++, latency++)
+ for(index = 0; index < 1; index++, latency++)
{
int value;
@@ -152,7 +152,7 @@
continue;
}
value = smbus_read_byte(device, index);
-
+
/* Only increase the latency if we decreas the clock */
if ((value >= min_cycle_time) && (value < new_cycle_time)) {
new_cycle_time = value;
diff --git a/util/romcc/tests/simple_test73.c b/util/romcc/tests/simple_test73.c
index f9e00cd..da69cf5 100644
--- a/util/romcc/tests/simple_test73.c
+++ b/util/romcc/tests/simple_test73.c
@@ -1,37 +1,37 @@
static const char *addr_of_char(unsigned char ch)
{
static const char byte[] = {
- 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
- 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
- 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+ 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
- 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
+ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
- 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
+ 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
- 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
+ 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
- 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
+ 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
- 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
+ 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
- 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+ 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
- 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+ 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
- 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
+ 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
- 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
+ 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
- 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
+ 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
- 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
+ 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
- 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
+ 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
- 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
+ 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
};
return byte + ch;
diff --git a/util/romcc/tests/simple_test74.c b/util/romcc/tests/simple_test74.c
index 177e00f..fff1a16 100644
--- a/util/romcc/tests/simple_test74.c
+++ b/util/romcc/tests/simple_test74.c
@@ -24,7 +24,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1));
return syscall_return(res);
-
+
}
@@ -37,7 +37,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
return syscall_return(res);
-
+
}
#define NR_exit 1
diff --git a/util/romcc/tests/simple_test75.c b/util/romcc/tests/simple_test75.c
index 1ad87bd..ae28a3c 100644
--- a/util/romcc/tests/simple_test75.c
+++ b/util/romcc/tests/simple_test75.c
@@ -1,7 +1,7 @@
static void goto_test(void)
{
int i;
-
+
i = 0;
goto bottom;
{
diff --git a/util/romcc/tests/simple_test76.c b/util/romcc/tests/simple_test76.c
index 4f682d3..74b1cf1 100644
--- a/util/romcc/tests/simple_test76.c
+++ b/util/romcc/tests/simple_test76.c
@@ -23,7 +23,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1));
return syscall_return(res);
-
+
}
static struct syscall_result syscall3(unsigned long nr, unsigned long arg1, unsigned long arg2,
@@ -35,7 +35,7 @@
: "=a" (res)
: "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
return syscall_return(res);
-
+
}
#define NR_exit 1
diff --git a/util/romcc/tests/simple_test81.c b/util/romcc/tests/simple_test81.c
index e942679..1f647aa 100644
--- a/util/romcc/tests/simple_test81.c
+++ b/util/romcc/tests/simple_test81.c
@@ -4,5 +4,5 @@
i = __builtin_inb(0x1234);
int j;
j = __builtin_inb(0xabcd);
-
+
}