haswell: Drop `struct romstage_params` type

It only contains a pointer to another struct. Flatten it.

Change-Id: Iab427592c332646e032a768719fc380c5794086b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43106
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
diff --git a/src/mainboard/asrock/b85m_pro4/romstage.c b/src/mainboard/asrock/b85m_pro4/romstage.c
index a72418a..c99bb6f 100644
--- a/src/mainboard/asrock/b85m_pro4/romstage.c
+++ b/src/mainboard/asrock/b85m_pro4/romstage.c
@@ -70,9 +70,5 @@
 		},
 	};
 
-	struct romstage_params romstage_params = {
-		.pei_data = &pei_data,
-	};
-
-	romstage_common(&romstage_params);
+	romstage_common(&pei_data);
 }
diff --git a/src/mainboard/asrock/h81m-hds/romstage.c b/src/mainboard/asrock/h81m-hds/romstage.c
index 73c38e7..5ce0145 100644
--- a/src/mainboard/asrock/h81m-hds/romstage.c
+++ b/src/mainboard/asrock/h81m-hds/romstage.c
@@ -70,9 +70,5 @@
 		},
 	};
 
-	struct romstage_params romstage_params = {
-		.pei_data = &pei_data,
-	};
-
-	romstage_common(&romstage_params);
+	romstage_common(&pei_data);
 }
diff --git a/src/mainboard/google/beltino/romstage.c b/src/mainboard/google/beltino/romstage.c
index 6f95831..d410f55 100644
--- a/src/mainboard/google/beltino/romstage.c
+++ b/src/mainboard/google/beltino/romstage.c
@@ -100,10 +100,6 @@
 		},
 	};
 
-	struct romstage_params romstage_params = {
-		.pei_data = &pei_data,
-	};
-
 	/* Call into the real romstage main with this board's attributes. */
-	romstage_common(&romstage_params);
+	romstage_common(&pei_data);
 }
diff --git a/src/mainboard/google/slippy/romstage.c b/src/mainboard/google/slippy/romstage.c
index 5261ddc..c724049 100644
--- a/src/mainboard/google/slippy/romstage.c
+++ b/src/mainboard/google/slippy/romstage.c
@@ -73,12 +73,8 @@
 		.usb_xhci_on_resume = 1,
 	};
 
-	struct romstage_params romstage_params = {
-		.pei_data = &pei_data,
-	};
-
-	variant_romstage_entry(&romstage_params);
+	variant_romstage_entry(&pei_data);
 
 	/* Call into the real romstage main with this board's attributes. */
-	romstage_common(&romstage_params);
+	romstage_common(&pei_data);
 }
diff --git a/src/mainboard/google/slippy/variant.h b/src/mainboard/google/slippy/variant.h
index 7eaac84..2263f9d 100644
--- a/src/mainboard/google/slippy/variant.h
+++ b/src/mainboard/google/slippy/variant.h
@@ -3,6 +3,6 @@
 #ifndef VARIANT_H
 #define VARIANT_H
 
-void variant_romstage_entry(struct romstage_params *rp);
+void variant_romstage_entry(struct pei_data *pei_data);
 
 #endif
diff --git a/src/mainboard/google/slippy/variants/falco/romstage.c b/src/mainboard/google/slippy/variants/falco/romstage.c
index 901c70e..11515cf 100644
--- a/src/mainboard/google/slippy/variants/falco/romstage.c
+++ b/src/mainboard/google/slippy/variants/falco/romstage.c
@@ -50,9 +50,9 @@
 	}
 }
 
-void variant_romstage_entry(struct romstage_params *rp)
+void variant_romstage_entry(struct pei_data *pei_data)
 {
-	rp->pei_data->ddr_refresh_2x = 1; /* Enable 2x refresh mode */
+	pei_data->ddr_refresh_2x = 1; /* Enable 2x refresh mode */
 
 	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
@@ -82,6 +82,6 @@
 		{ 0, USB_OC_PIN_SKIP }, /* P4; */
 	};
 
-	memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
-	memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
+	memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
+	memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
 }
diff --git a/src/mainboard/google/slippy/variants/leon/romstage.c b/src/mainboard/google/slippy/variants/leon/romstage.c
index 78c46dc..7a13b90 100644
--- a/src/mainboard/google/slippy/variants/leon/romstage.c
+++ b/src/mainboard/google/slippy/variants/leon/romstage.c
@@ -46,7 +46,7 @@
 			spd_file + (spd_index * spd_len), spd_len);
 }
 
-void variant_romstage_entry(struct romstage_params *rp)
+void variant_romstage_entry(struct pei_data *pei_data)
 {
 	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
@@ -76,6 +76,6 @@
 		{ 0, USB_OC_PIN_SKIP }, /* P4; */
 	};
 
-	memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
-	memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
+	memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
+	memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
 }
diff --git a/src/mainboard/google/slippy/variants/peppy/romstage.c b/src/mainboard/google/slippy/variants/peppy/romstage.c
index c962fe0..230595e 100644
--- a/src/mainboard/google/slippy/variants/peppy/romstage.c
+++ b/src/mainboard/google/slippy/variants/peppy/romstage.c
@@ -63,7 +63,7 @@
 	}
 }
 
-void variant_romstage_entry(struct romstage_params *rp)
+void variant_romstage_entry(struct pei_data *pei_data)
 {
 	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
@@ -93,6 +93,6 @@
 		{ 0, USB_OC_PIN_SKIP }, /* P4; */
 	};
 
-	memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
-	memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
+	memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
+	memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
 }
diff --git a/src/mainboard/google/slippy/variants/wolf/romstage.c b/src/mainboard/google/slippy/variants/wolf/romstage.c
index c3c01a3..4e02f73 100644
--- a/src/mainboard/google/slippy/variants/wolf/romstage.c
+++ b/src/mainboard/google/slippy/variants/wolf/romstage.c
@@ -50,7 +50,7 @@
 	}
 }
 
-void variant_romstage_entry(struct romstage_params *rp)
+void variant_romstage_entry(struct pei_data *pei_data)
 {
 	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
@@ -80,6 +80,6 @@
 		{ 0, USB_OC_PIN_SKIP }, /* P4; */
 	};
 
-	memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
-	memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
+	memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
+	memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
 }
diff --git a/src/mainboard/intel/baskingridge/romstage.c b/src/mainboard/intel/baskingridge/romstage.c
index 3a8a03b..0ef12f5 100644
--- a/src/mainboard/intel/baskingridge/romstage.c
+++ b/src/mainboard/intel/baskingridge/romstage.c
@@ -112,10 +112,6 @@
 		},
 	};
 
-	struct romstage_params romstage_params = {
-		.pei_data = &pei_data,
-	};
-
 	/* Call into the real romstage main with this board's attributes. */
-	romstage_common(&romstage_params);
+	romstage_common(&pei_data);
 }
diff --git a/src/mainboard/lenovo/t440p/romstage.c b/src/mainboard/lenovo/t440p/romstage.c
index 900bef5..0943f1d 100644
--- a/src/mainboard/lenovo/t440p/romstage.c
+++ b/src/mainboard/lenovo/t440p/romstage.c
@@ -92,9 +92,5 @@
 		},
 	};
 
-	struct romstage_params romstage_params = {
-		.pei_data = &pei_data,
-	};
-
-	romstage_common(&romstage_params);
+	romstage_common(&pei_data);
 }
diff --git a/src/mainboard/supermicro/x10slm-f/romstage.c b/src/mainboard/supermicro/x10slm-f/romstage.c
index 8bcabd9..2e3f42e 100644
--- a/src/mainboard/supermicro/x10slm-f/romstage.c
+++ b/src/mainboard/supermicro/x10slm-f/romstage.c
@@ -68,9 +68,5 @@
 		},
 	};
 
-	struct romstage_params romstage_params = {
-		.pei_data = &pei_data,
-	};
-
-	romstage_common(&romstage_params);
+	romstage_common(&pei_data);
 }
diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h
index 24d773f..6eb8de5 100644
--- a/src/northbridge/intel/haswell/haswell.h
+++ b/src/northbridge/intel/haswell/haswell.h
@@ -190,10 +190,7 @@
 void intel_northbridge_haswell_finalize_smm(void);
 
 struct pei_data;
-struct romstage_params {
-	struct pei_data *pei_data;
-};
-void romstage_common(const struct romstage_params *params);
+void romstage_common(struct pei_data *pei_data);
 void mb_late_romstage_setup(void); /* optional */
 
 void haswell_early_initialization(void);
diff --git a/src/northbridge/intel/haswell/romstage.c b/src/northbridge/intel/haswell/romstage.c
index 00f5f47..46633d1 100644
--- a/src/northbridge/intel/haswell/romstage.c
+++ b/src/northbridge/intel/haswell/romstage.c
@@ -22,7 +22,7 @@
 {
 }
 
-void romstage_common(const struct romstage_params *params)
+void romstage_common(struct pei_data *pei_data)
 {
 	int wake_from_s3;
 
@@ -52,15 +52,15 @@
 	post_code(0x3a);
 
 	/* MRC has hardcoded assumptions of 2 meaning S3 wake. Normalize it here. */
-	params->pei_data->boot_mode = wake_from_s3 ? 2 : 0;
+	pei_data->boot_mode = wake_from_s3 ? 2 : 0;
 
 	timestamp_add_now(TS_BEFORE_INITRAM);
 
 	report_platform_info();
 
-	copy_spd(params->pei_data);
+	copy_spd(pei_data);
 
-	sdram_initialize(params->pei_data);
+	sdram_initialize(pei_data);
 
 	timestamp_add_now(TS_AFTER_INITRAM);
 
@@ -71,7 +71,7 @@
 	if (!wake_from_s3) {
 		cbmem_initialize_empty();
 		/* Save data returned from MRC on non-S3 resumes. */
-		save_mrc_data(params->pei_data);
+		save_mrc_data(pei_data);
 	} else if (cbmem_initialize()) {
 	#if CONFIG(HAVE_ACPI_RESUME)
 		/* Failed S3 resume, reset to come up cleanly */
@@ -81,7 +81,7 @@
 
 	haswell_unhide_peg();
 
-	setup_sdram_meminfo(params->pei_data);
+	setup_sdram_meminfo(pei_data);
 
 	romstage_handoff_init(wake_from_s3);